diff options
| author | Lukasz Majewski <lukma@denx.de> | 2021-12-22 12:55:07 +0300 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2022-01-27 01:22:59 +0300 |
| commit | fc313d345a93a6a4edad62683191e11195a75e1e (patch) | |
| tree | a479d02d15660f7ec5badc649292aa33e7b97197 /drivers/usb | |
| parent | f82feb7f2788035d5ae1463ac8cc8acf0da3d23a (diff) | |
| download | u-boot-fc313d345a93a6a4edad62683191e11195a75e1e.tar.xz | |
usb: ehci: Refactor the ehci_mxs_toggle_clock function to be reused with DM
This function is going to be reused with the CONFIG_DM_USB enabled in
the imx28 mxs USB ehci driver.
No functional changes introduced.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Diffstat (limited to 'drivers/usb')
| -rw-r--r-- | drivers/usb/host/ehci-mxs.c | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c index 824c620e63..a9d5d58970 100644 --- a/drivers/usb/host/ehci-mxs.c +++ b/drivers/usb/host/ehci-mxs.c @@ -29,6 +29,27 @@ struct ehci_mxs_port { uint32_t gate_bits; }; +static int ehci_mxs_toggle_clock(const struct ehci_mxs_port *port, int enable) +{ + struct mxs_register_32 *digctl_ctrl = + (struct mxs_register_32 *)HW_DIGCTL_CTRL; + int pll_offset, dig_offset; + + if (enable) { + pll_offset = offsetof(struct mxs_register_32, reg_set); + dig_offset = offsetof(struct mxs_register_32, reg_clr); + writel(port->gate_bits, (u32)&digctl_ctrl->reg + dig_offset); + writel(port->pll_en_bits, (u32)port->pll + pll_offset); + } else { + pll_offset = offsetof(struct mxs_register_32, reg_clr); + dig_offset = offsetof(struct mxs_register_32, reg_set); + writel(port->pll_dis_bits, (u32)port->pll + pll_offset); + writel(port->gate_bits, (u32)&digctl_ctrl->reg + dig_offset); + } + + return 0; +} + static const struct ehci_mxs_port mxs_port[] = { #ifdef CONFIG_EHCI_MXS_PORT0 { @@ -56,27 +77,6 @@ static const struct ehci_mxs_port mxs_port[] = { #endif }; -static int ehci_mxs_toggle_clock(const struct ehci_mxs_port *port, int enable) -{ - struct mxs_register_32 *digctl_ctrl = - (struct mxs_register_32 *)HW_DIGCTL_CTRL; - int pll_offset, dig_offset; - - if (enable) { - pll_offset = offsetof(struct mxs_register_32, reg_set); - dig_offset = offsetof(struct mxs_register_32, reg_clr); - writel(port->gate_bits, (u32)&digctl_ctrl->reg + dig_offset); - writel(port->pll_en_bits, (u32)port->pll + pll_offset); - } else { - pll_offset = offsetof(struct mxs_register_32, reg_clr); - dig_offset = offsetof(struct mxs_register_32, reg_set); - writel(port->pll_dis_bits, (u32)port->pll + pll_offset); - writel(port->gate_bits, (u32)&digctl_ctrl->reg + dig_offset); - } - - return 0; -} - int __weak board_ehci_hcd_init(int port) { return 0; |