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authorHal Feng <hal.feng@starfivetech.com>2023-08-16 16:30:56 +0300
committerHal Feng <hal.feng@starfivetech.com>2023-11-29 05:55:16 +0300
commit4bf24b47175bd55813612f0d162defcb65b94d13 (patch)
treeb8370976a4fb56985bd6a974b1e864ae1240922e /drivers/video/starfive/mipi_dsi_host.c
parentb5cb74c2609a6d5baaf9f6eab7575f0daa2b1f5a (diff)
downloadu-boot-4bf24b47175bd55813612f0d162defcb65b94d13.tar.xz
video: starfive: Add StarFive JH7110 Devkits board support
Make the code be compatible with the StarFive Devkits board. The code is ported from tag JH7110_DVK_515_v3.9.3 of Devkits repo. Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com> Signed-off-by: Shengyang Chen <shengyang.chen@starfivetech.com> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Diffstat (limited to 'drivers/video/starfive/mipi_dsi_host.c')
-rw-r--r--drivers/video/starfive/mipi_dsi_host.c51
1 files changed, 34 insertions, 17 deletions
diff --git a/drivers/video/starfive/mipi_dsi_host.c b/drivers/video/starfive/mipi_dsi_host.c
index 2736eb329f..4960a22ee5 100644
--- a/drivers/video/starfive/mipi_dsi_host.c
+++ b/drivers/video/starfive/mipi_dsi_host.c
@@ -220,7 +220,7 @@ static ssize_t cdns_dsi_transfer(struct mipi_dsi_host *host,
ret = wait_for_send_done(dsi, MIPI_FIFO_TIMEOUT);
if (!ret) {
- printf("wait tx done timeout!\n");
+ debug("wait tx done timeout!\n");
return -ETIMEDOUT;
}
udelay(10);
@@ -285,7 +285,7 @@ static int mipi_dsi_northwest_init(struct udevice *dev,
priv->phy_base = (void *)dev_read_addr_name(device->dev, "phy");
if ((fdt_addr_t)priv->dsi_base == FDT_ADDR_T_NONE || (fdt_addr_t)priv->phy_base == FDT_ADDR_T_NONE) {
- printf("dsi dt register address error\n");
+ debug("dsi dt register address error\n");
return -EINVAL;
}
priv->link_initialized = false;
@@ -300,21 +300,38 @@ static int mipi_dsi_enable(struct udevice *dev)
priv->phy_ops->init(priv->device);
priv->phy_ops->post_set_mode(priv->device, MIPI_DSI_MODE_VIDEO);
cdns_dsi_init_link(priv, priv->device);
-
- writel(0x00670067, priv->dsi_base + 0x000000c0);
- writel(0x00cb0960, priv->dsi_base + 0x000000c4);
- writel(0x0003b145, priv->dsi_base + 0x000000b4);
- writel(0x000001e0, priv->dsi_base + 0x000000b8);
- writel(0x00000a9e, priv->dsi_base + 0x000000d0);
- writel(0x0a980000, priv->dsi_base + 0x000000f8);
- writel(0x00000b0f, priv->dsi_base + 0x000000cc);
- writel(0x7c3c0aae, priv->dsi_base + 0x000000dc);
- writel(0x0032dcd3, priv->dsi_base + 0x00000014);
- writel(0x00032dcd, priv->dsi_base + 0x00000018);
- writel(0x80b8fe00, priv->dsi_base + 0x000000b0);
- writel(0x00020027, priv->dsi_base + 0x00000004);
- writel(0x00004018, priv->dsi_base + 0x0000000c);
-
+ debug("priv->timings.hactive.typ %d----\n",priv->timings.hactive.typ);
+ debug("priv->timings.vactive.typ %d----\n",priv->timings.vactive.typ);
+ if (priv->timings.hactive.typ == 800)
+ {
+ writel(0x00670067, priv->dsi_base + 0x000000c0);
+ writel(0x00cb0960, priv->dsi_base + 0x000000c4);
+ writel(0x0003b145, priv->dsi_base + 0x000000b4);
+ writel(0x000001e0, priv->dsi_base + 0x000000b8);
+ writel(0x00000a9e, priv->dsi_base + 0x000000d0);
+ writel(0x0a980000, priv->dsi_base + 0x000000f8);
+ writel(0x00000b0f, priv->dsi_base + 0x000000cc);
+ writel(0x7c3c0aae, priv->dsi_base + 0x000000dc);
+ writel(0x0032dcd3, priv->dsi_base + 0x00000014);
+ writel(0x00032dcd, priv->dsi_base + 0x00000018);
+ writel(0x80b8fe00, priv->dsi_base + 0x000000b0);
+ writel(0x00020027, priv->dsi_base + 0x00000004);
+ writel(0x00004018, priv->dsi_base + 0x0000000c);
+ }else if (priv->timings.hactive.typ == 1920){
+ writel(0x01d30081, priv->dsi_base + 0x000000c0);
+ writel(0x01171680, priv->dsi_base + 0x000000c4);
+ writel(0x00003905, priv->dsi_base + 0x000000b4);
+ writel(0x00000438, priv->dsi_base + 0x000000b8);
+ writel(0x00001976, priv->dsi_base + 0x000000d0);
+ writel(0x19700000, priv->dsi_base + 0x000000f8);
+ writel(0x00001a01, priv->dsi_base + 0x000000cc);
+ writel(0x98900661, priv->dsi_base + 0x000000dc);
+ writel(0x003f9403, priv->dsi_base + 0x00000014);
+ writel(0x0003f940, priv->dsi_base + 0x00000018);
+ writel(0x80b8fe00, priv->dsi_base + 0x000000b0);
+ writel(0x00020027, priv->dsi_base + 0x00000004);
+ writel(0x000040f8, priv->dsi_base + 0x0000000c);
+ }
return 0;
}