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author | Jack Mitchell <ml@embed.me.uk> | 2020-09-17 12:30:40 +0300 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2020-10-08 18:42:36 +0300 |
commit | d9b9c91b5d0ee1044cc638f7ea809a3836cf168e (patch) | |
tree | 05baef29001ae5b8649a6bcdb1d9ef659096ce06 /drivers/watchdog/designware_wdt.c | |
parent | 0eabb2ff2316c5d95367b79debb8229e686de774 (diff) | |
download | u-boot-d9b9c91b5d0ee1044cc638f7ea809a3836cf168e.tar.xz |
wdt: designware: fix timeout calculation due to expecting KHz
The timeout calculation is based on the clk being in KHz but
the clk api returns the clk value in Hz. Convert this to KHz
to calculate the correct timeout value.
Signed-off-by: Jack Mitchell <ml@embed.me.uk>
Diffstat (limited to 'drivers/watchdog/designware_wdt.c')
-rw-r--r-- | drivers/watchdog/designware_wdt.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c index 12f09a7a39..7caa6c550c 100644 --- a/drivers/watchdog/designware_wdt.c +++ b/drivers/watchdog/designware_wdt.c @@ -130,7 +130,7 @@ static int designware_wdt_probe(struct udevice *dev) if (ret) return ret; - priv->clk_khz = clk_get_rate(&clk); + priv->clk_khz = clk_get_rate(&clk) / 1000; if (!priv->clk_khz) return -EINVAL; #else |