Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

- Convert qemu-ppce500 to driver model and enable additional driver
  support
- bug fixes/updates in net-dsa driver, vid driver, move configs to kconfig
- Update Maintainers of some powerpc, layerscape platforms

6 files changed, 32 insertions, 14 deletions

diff --git a/drivers/gpio/mpc8xxx_gpio.c b/drivers/gpio/mpc8xxx_gpio.c
index c733603289..f7ffd8926a 100644
--- a/drivers/gpio/mpc8xxx_gpio.c
+++ b/drivers/gpio/mpc8xxx_gpio.c
@@ -20,7 +20,7 @@ struct mpc8xxx_gpio_data {
 	/* The bank's register base in memory */
 	struct ccsr_gpio __iomem *base;
 	/* The address of the registers; used to identify the bank */
-	ulong addr;
+	phys_addr_t addr;
 	/* The GPIO count of the bank */
 	uint gpio_count;
 	/* The GPDAT register cannot be used to determine the value of output
@@ -181,7 +181,7 @@ static int mpc8xxx_gpio_of_to_plat(struct udevice *dev)
 	if (dev_read_bool(dev, "little-endian"))
 		data->little_endian = true;
 
-	plat->addr = (ulong)dev_read_addr_size_index(dev, 0, (fdt_size_t *)&plat->size);
+	plat->addr = dev_read_addr_size_index(dev, 0, (fdt_size_t *)&plat->size);
 	plat->ngpios = dev_read_u32_default(dev, "ngpios", 32);
 
 	return 0;
@@ -220,7 +220,8 @@ static int mpc8xxx_gpio_probe(struct udevice *dev)
 
 	mpc8xxx_gpio_plat_to_priv(dev);
 
-	snprintf(name, sizeof(name), "MPC@%lx_", data->addr);
+	snprintf(name, sizeof(name), "MPC@%.8llx",
+		 (unsigned long long)data->addr);
 	str = strdup(name);
 
 	if (!str)
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index e72a60c131..fc3327ec53 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -32,6 +32,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #include <asm/io.h>
 #include <asm/fsl_pci.h>
 
+#define MAX_PCI_REGIONS 7
+
 #ifndef CONFIG_SYS_PCI_MEMORY_BUS
 #define CONFIG_SYS_PCI_MEMORY_BUS 0
 #endif
@@ -80,6 +82,9 @@ int fsl_setup_hose(struct pci_controller *hose, unsigned long addr)
 	/* Reset hose to make sure its in a clean state */
 	memset(hose, 0, sizeof(struct pci_controller));
 
+	hose->regions = (struct pci_region *)
+		calloc(1, MAX_PCI_REGIONS * sizeof(struct pci_region));
+
 	pci_setup_indirect(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
 
 	return fsl_is_pci_agent(hose);
diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c
index ab6ff45a51..574cb784a8 100644
--- a/drivers/pci/pci_mpc85xx.c
+++ b/drivers/pci/pci_mpc85xx.c
@@ -46,6 +46,7 @@ static int mpc85xx_pci_dm_write_config(struct udevice *dev, pci_dev_t bdf,
 	return 0;
 }
 
+#ifdef CONFIG_FSL_LAW
 static int
 mpc85xx_pci_dm_setup_laws(struct pci_region *io, struct pci_region *mem,
 			  struct pci_region *pre)
@@ -68,6 +69,7 @@ mpc85xx_pci_dm_setup_laws(struct pci_region *io, struct pci_region *mem,
 
 	return 0;
 }
+#endif
 
 static int mpc85xx_pci_dm_probe(struct udevice *dev)
 {
@@ -85,22 +87,24 @@ static int mpc85xx_pci_dm_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
+#ifdef CONFIG_FSL_LAW
 	mpc85xx_pci_dm_setup_laws(io, mem, pre);
+#endif
 
 	pcix = priv->cfg_addr;
 	/* BAR 1: memory */
-	out_be32(&pcix->potar1, (mem->bus_start >> 12) & 0x000fffff);
-	out_be32(&pcix->potear1, 0);
-	out_be32(&pcix->powbar1, (mem->phys_start >> 12) & 0x000fffff);
-	out_be32(&pcix->powbear1, 0);
+	out_be32(&pcix->potar1, mem->bus_start >> 12);
+	out_be32(&pcix->potear1, (u64)mem->bus_start >> 44);
+	out_be32(&pcix->powbar1, mem->phys_start >> 12);
+	out_be32(&pcix->powbear1, (u64)mem->phys_start >> 44);
 	out_be32(&pcix->powar1, (POWAR_EN | POWAR_MEM_READ |
 		 POWAR_MEM_WRITE | (__ilog2(mem->size) - 1)));
 
 	/* BAR 1: IO */
-	out_be32(&pcix->potar2, (io->bus_start >> 12) & 0x000fffff);
-	out_be32(&pcix->potear2, 0);
-	out_be32(&pcix->powbar2, (io->phys_start >> 12) & 0x000fffff);
-	out_be32(&pcix->powbear2, 0);
+	out_be32(&pcix->potar2, io->bus_start >> 12);
+	out_be32(&pcix->potear2, (u64)io->bus_start >> 44);
+	out_be32(&pcix->powbar2, io->phys_start >> 12);
+	out_be32(&pcix->powbear2, (u64)io->phys_start >> 44);
 	out_be32(&pcix->powar2, (POWAR_EN | POWAR_IO_READ |
 		 POWAR_IO_WRITE | (__ilog2(io->size) - 1)));
 
@@ -130,9 +134,8 @@ static int mpc85xx_pci_of_to_plat(struct udevice *dev)
 	addr = devfdt_get_addr_index(dev, 0);
 	if (addr == FDT_ADDR_T_NONE)
 		return -EINVAL;
-	priv->cfg_addr = (void __iomem *)addr;
-	addr += 4;
-	priv->cfg_data = (void __iomem *)addr;
+	priv->cfg_addr = (void __iomem *)map_physmem(addr, 0, MAP_NOCACHE);
+	priv->cfg_data = (void __iomem *)((ulong)priv->cfg_addr + 4);
 
 	return 0;
 }
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 0e5c7c9971..968dfa4831 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -33,6 +33,12 @@ config TPL_SYSRESET
 
 if SYSRESET
 
+config SYSRESET_CMD_RESET
+	bool "sysreset implementation of the reset command"
+	default y
+	help
+	  Enable sysreset implementation of the reset command.
+
 if CMD_POWEROFF
 
 config SYSRESET_CMD_POWEROFF
diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
index a9908ebf79..6c9dc7a384 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -119,6 +119,7 @@ void reset_cpu(ulong addr)
 }
 
 
+#if IS_ENABLED(CONFIG_SYSRESET_CMD_RESET)
 int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	printf("resetting ...\n");
@@ -128,6 +129,7 @@ int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 
 	return 0;
 }
+#endif
 
 #if IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF)
 int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
diff --git a/drivers/virtio/Kconfig b/drivers/virtio/Kconfig
index e800720657..1835607083 100644
--- a/drivers/virtio/Kconfig
+++ b/drivers/virtio/Kconfig
@@ -55,6 +55,7 @@ config VIRTIO_NET
 config VIRTIO_BLK
 	bool "virtio block driver"
 	depends on VIRTIO
+	depends on BLK
 	help
 	  This is the virtual block driver for virtio. It can be used with
 	  QEMU based targets.