diff options
author | Pali Rohár <pali@kernel.org> | 2022-02-15 13:23:35 +0300 |
---|---|---|
committer | Stefan Roese <sr@denx.de> | 2022-02-17 16:17:07 +0300 |
commit | 2727e9dd2795c38a20dda9bda24c3f18fbbbb2bf (patch) | |
tree | 33bc05f0abe7482cd90e5b70327f1d71b7735dad /drivers | |
parent | 0934dddc643644ccf6e9203c8925c5573dd7779c (diff) | |
download | u-boot-2727e9dd2795c38a20dda9bda24c3f18fbbbb2bf.tar.xz |
arm: a37xx: pci: Do not try to access other buses when link is down
If a PIO request is executed while link-down, the whole controller gets
stuck in a non-functional state, and even after link comes up again, PIO
requests won't work anymore, and a reset of the whole PCIe controller is
needed. Therefore we need to prevent sending PIO requests while the link
is down.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/pci/pci-aardvark.c | 38 |
1 files changed, 21 insertions, 17 deletions
diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index 1eb257ea8b..ccaeecaca8 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -178,6 +178,23 @@ static inline uint advk_readl(struct pcie_advk *pcie, uint reg) } /** + * pcie_advk_link_up() - Check if PCIe link is up or not + * + * @pcie: The PCI device to access + * + * Return true on link up. + * Return false on link down. + */ +static bool pcie_advk_link_up(struct pcie_advk *pcie) +{ + u32 val, ltssm_state; + + val = advk_readl(pcie, ADVK_LMI_PHY_CFG0); + ltssm_state = (val & ADVK_LMI_PHY_CFG0_LTSSM_MASK) >> ADVK_LMI_PHY_CFG0_LTSSM_SHIFT; + return ltssm_state >= ADVK_LMI_PHY_CFG0_LTSSM_L0 && ltssm_state < ADVK_LMI_PHY_CFG0_LTSSM_DISABLED; +} + +/** * pcie_advk_addr_valid() - Check for valid bus address * * @pcie: Pointer to the PCI bus @@ -195,6 +212,10 @@ static bool pcie_advk_addr_valid(struct pcie_advk *pcie, if (busno == 0 && (dev != 0 || func != 0)) return false; + /* Access to other buses is possible when link is up */ + if (busno != 0 && !pcie_advk_link_up(pcie)) + return false; + /* * In PCI-E only a single device (0) can exist on the secondary bus. * Beyond the secondary bus, there might be a Switch and anything is @@ -619,23 +640,6 @@ retry: } /** - * pcie_advk_link_up() - Check if PCIe link is up or not - * - * @pcie: The PCI device to access - * - * Return 1 (true) on link up. - * Return 0 (false) on link down. - */ -static int pcie_advk_link_up(struct pcie_advk *pcie) -{ - u32 val, ltssm_state; - - val = advk_readl(pcie, ADVK_LMI_PHY_CFG0); - ltssm_state = (val & ADVK_LMI_PHY_CFG0_LTSSM_MASK) >> ADVK_LMI_PHY_CFG0_LTSSM_SHIFT; - return ltssm_state >= ADVK_LMI_PHY_CFG0_LTSSM_L0 && ltssm_state < ADVK_LMI_PHY_CFG0_LTSSM_DISABLED; -} - -/** * pcie_advk_wait_for_link() - Wait for link training to be accomplished * * @pcie: The PCI device to access |