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authorTom Rini <trini@konsulko.com>2021-09-22 21:50:33 +0300
committerTom Rini <trini@konsulko.com>2021-10-06 16:16:23 +0300
commit4884d829d72e58d3448df46325699cdc2151686e (patch)
treebddcf5355444a500155ae8169676edbcab0e20d6 /drivers
parent9d9f59dd0a97b327b784699152f7055adc7b3520 (diff)
downloadu-boot-4884d829d72e58d3448df46325699cdc2151686e.tar.xz
Convert CONFIG_SYS_NAND_5_ADDR_CYCLE to Kconfig
This converts the following to Kconfig: CONFIG_SYS_NAND_5_ADDR_CYCLE Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/nand/raw/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index dab392e983..0c536c9339 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -425,6 +425,15 @@ config SYS_NAND_MAX_CHIPS
if SPL
+config SYS_NAND_5_ADDR_CYCLE
+ bool "Wait 5 address cycles during NAND commands"
+ depends on SPL_NAND_AM33XX_BCH || SPL_NAND_SIMPLE || \
+ (SPL_NAND_SUPPORT && NAND_ATMEL)
+ default y
+ help
+ Some controllers require waiting for 5 address cycles when issuing
+ some commands, on NAND chips larger than 128MiB.
+
choice
prompt "NAND bad block marker/indicator positon in the OOB"
depends on SPL_NAND_AM33XX_BCH || SPL_NAND_DENALI || SPL_NAND_SIMPLE || \