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authorPatrice Chotard <patrice.chotard@st.com>2018-02-07 12:44:50 +0300
committerTom Rini <trini@konsulko.com>2018-03-14 04:45:37 +0300
commitaa5e3e22f4d648c09b6b63eac8eec8d7a2fc2994 (patch)
treea7e69e428ecec4158442686b671a94f788023114 /drivers
parentcd389c03f270636e581a16ba157e37b47ae75d93 (diff)
downloadu-boot-aa5e3e22f4d648c09b6b63eac8eec8d7a2fc2994.tar.xz
board: stm32: switch to DM STM32 timer
Use available DM stm32_timer driver instead of dedicated mach-stm32/stm32fx/timer.c. Remove all defines or files previously used for timer usage in arch/arm/include/asm/arch-stm32fx and in arch/arm/mach-stm32/stm32fx Enable DM STM32_TIMER for STM32F4/F7 and H7. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/clk_stm32f.c15
-rw-r--r--drivers/spi/stm32_qspi.c1
2 files changed, 0 insertions, 16 deletions
diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
index bde31607cf..f1f02995d9 100644
--- a/drivers/clk/clk_stm32f.c
+++ b/drivers/clk/clk_stm32f.c
@@ -87,10 +87,6 @@
#define RCC_APB2ENR_SYSCFGEN BIT(14)
#define RCC_APB2ENR_SAI1EN BIT(22)
-enum periph_clock {
- TIMER2_CLOCK_CFG,
-};
-
static const struct stm32_clk_info stm32f4_clk_info = {
/* 180 MHz */
.sys_pll_psc = {
@@ -438,17 +434,6 @@ static int stm32_clk_enable(struct clk *clk)
return 0;
}
-void clock_setup(int peripheral)
-{
- switch (peripheral) {
- case TIMER2_CLOCK_CFG:
- setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
- break;
- default:
- break;
- }
-}
-
static int stm32_clk_probe(struct udevice *dev)
{
struct ofnode_phandle_args args;
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index ef2b64ec5f..558708a4a7 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -16,7 +16,6 @@
#include <dm.h>
#include <errno.h>
#include <asm/arch/stm32.h>
-#include <asm/arch/stm32_defs.h>
#include <clk.h>
DECLARE_GLOBAL_DATA_PTR;