Merge git://git.denx.de/u-boot-fsl-qoriq

5 files changed, 89 insertions, 41 deletions

diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 7c22b8d209..d3137680ad 100644
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -13,6 +13,9 @@
 #ifdef CONFIG_PPC
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
+#else
+#include <asm/arch-fsl-layerscape/fsl_portals.h>
+#include <asm/arch-fsl-layerscape/fsl_icid.h>
 #endif
 #include <fsl_qbman.h>
 
@@ -24,7 +27,6 @@ void setup_qbman_portals(void)
 				CONFIG_SYS_BMAN_SWP_ISDR_REG;
 	void __iomem *qpaddr = (void *)CONFIG_SYS_QMAN_CINH_BASE +
 				CONFIG_SYS_QMAN_SWP_ISDR_REG;
-#ifdef CONFIG_PPC
 	struct ccsr_qman *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR;
 
 	/* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */
@@ -32,7 +34,6 @@ void setup_qbman_portals(void)
 	out_be32(&qman->qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32));
 #endif
 	out_be32(&qman->qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS);
-#endif
 #ifdef CONFIG_FSL_CORENET
 	int i;
 
@@ -47,6 +48,22 @@ void setup_qbman_portals(void)
 		/* set frame liodn */
 		out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) | fliodn);
 	}
+#else
+#ifdef CONFIG_ARCH_LS1046A
+	int i;
+
+	for (i = 0; i < CONFIG_SYS_QMAN_NUM_PORTALS; i++) {
+		u8 sdest = qp_info[i].sdest;
+		u16 ficid = qp_info[i].ficid;
+		u16 dicid = qp_info[i].dicid;
+		u16 icid = qp_info[i].icid;
+
+		out_be32(&qman->qcsp[i].qcsp_lio_cfg, (icid << 16) |
+					dicid);
+		/* set frame icid */
+		out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) | ficid);
+	}
+#endif
 #endif
 
 	/* Change default state of BMan ISDR portals to all 1s */
@@ -180,6 +197,10 @@ void fdt_fixup_qportals(void *blob)
 	char compat[64];
 	int compat_len;
 
+#ifdef CONFIG_ARCH_LS1046A
+	int smmu_ph = fdt_get_smmu_phandle(blob);
+#endif
+
 	maj = (rev_1 >> 8) & 0xff;
 	min = rev_1 & 0xff;
 	ip_cfg = rev_2 & 0xff;
@@ -190,7 +211,7 @@ void fdt_fixup_qportals(void *blob)
 
 	off = fdt_node_offset_by_compatible(blob, -1, "fsl,qman-portal");
 	while (off != -FDT_ERR_NOTFOUND) {
-#ifdef CONFIG_PPC
+#if defined(CONFIG_PPC) || defined(CONFIG_ARCH_LS1046A)
 #ifdef CONFIG_FSL_CORENET
 		u32 liodns[2];
 #endif
@@ -200,12 +221,12 @@ void fdt_fixup_qportals(void *blob)
 		if (!ci)
 			goto err;
 
-		i = *ci;
-#ifdef CONFIG_SYS_DPAA_FMAN
+		i = fdt32_to_cpu(*ci);
+#if defined(CONFIG_SYS_DPAA_FMAN) && defined(CONFIG_PPC)
 		int j;
 #endif
 
-#endif /* CONFIG_PPC */
+#endif /* CONFIG_PPC || CONFIG_ARCH_LS1046A */
 		err = fdt_setprop(blob, off, "compatible", compat, compat_len);
 		if (err < 0)
 			goto err;
@@ -253,6 +274,18 @@ void fdt_fixup_qportals(void *blob)
 		if (err < 0)
 			goto err;
 #endif
+#else
+#ifdef CONFIG_ARCH_LS1046A
+		if (smmu_ph >= 0) {
+			u32 icids[3];
+
+			icids[0] = qp_info[i].icid;
+			icids[1] = qp_info[i].dicid;
+			icids[2] = qp_info[i].ficid;
+
+			fdt_set_iommu_prop(blob, off, smmu_ph, icids, 3);
+		}
+#endif
 #endif /* CONFIG_PPC */
 
 err:
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index a47226bd21..29f30d8ccc 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -242,31 +242,6 @@ static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob)
 		ctrl->index += mtd->writesize;
 }
 
-static int is_blank(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,
-		    unsigned int bufnum)
-{
-	struct nand_chip *chip = mtd_to_nand(mtd);
-	struct fsl_ifc_mtd *priv = nand_get_controller_data(chip);
-	u8 __iomem *addr = priv->vbase + bufnum * (mtd->writesize * 2);
-	u32 __iomem *main = (u32 *)addr;
-	u8 __iomem *oob = addr + mtd->writesize;
-	int i;
-
-	for (i = 0; i < mtd->writesize / 4; i++) {
-		if (__raw_readl(&main[i]) != 0xffffffff)
-			return 0;
-	}
-
-	for (i = 0; i < chip->ecc.layout->eccbytes; i++) {
-		int pos = chip->ecc.layout->eccpos[i];
-
-		if (__raw_readb(&oob[pos]) != 0xff)
-			return 0;
-	}
-
-	return 1;
-}
-
 /* returns nonzero if entire page is blank */
 static int check_read_ecc(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,
 			  u32 eccstat, unsigned int bufnum)
@@ -331,16 +306,14 @@ static int fsl_ifc_run_command(struct mtd_info *mtd)
 			if (errors == 15) {
 				/*
 				 * Uncorrectable error.
-				 * OK only if the whole page is blank.
+				 * We'll check for blank pages later.
 				 *
 				 * We disable ECCER reporting due to erratum
 				 * IFC-A002770 -- so report it now if we
 				 * see an uncorrectable error in ECCSTAT.
 				 */
-				if (!is_blank(mtd, ctrl, bufnum))
-					ctrl->status |=
-						IFC_NAND_EVTER_STAT_ECCER;
-				break;
+				ctrl->status |= IFC_NAND_EVTER_STAT_ECCER;
+				continue;
 			}
 
 			mtd->ecc_stats.corrected += errors;
@@ -727,6 +700,39 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)
 	return status | NAND_STATUS_WP;
 }
 
+/*
+ * The controller does not check for bitflips in erased pages,
+ * therefore software must check instead.
+ */
+static int
+check_erased_page(struct nand_chip *chip, u8 *buf, struct mtd_info *mtd)
+{
+	u8 *ecc = chip->oob_poi;
+	const int ecc_size = chip->ecc.bytes;
+	const int pkt_size = chip->ecc.size;
+	int i, res, bitflips;
+
+	/* IFC starts ecc bytes at offset 8 in the spare area. */
+	ecc += 8;
+	bitflips = 0;
+	for (i = 0; i < chip->ecc.steps; i++) {
+		res = nand_check_erased_ecc_chunk(buf, pkt_size, ecc, ecc_size,
+						  NULL, 0, chip->ecc.strength);
+
+		if (res < 0) {
+			printf("fsl-ifc: NAND Flash ECC Uncorrectable Error\n");
+			mtd->ecc_stats.failed++;
+		} else if (res > 0) {
+			mtd->ecc_stats.corrected += res;
+		}
+		bitflips = max(res, bitflips);
+		buf += pkt_size;
+		ecc += ecc_size;
+	}
+
+	return bitflips;
+}
+
 static int fsl_ifc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
 			     uint8_t *buf, int oob_required, int page)
 {
@@ -736,6 +742,9 @@ static int fsl_ifc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
 	fsl_ifc_read_buf(mtd, buf, mtd->writesize);
 	fsl_ifc_read_buf(mtd, chip->oob_poi, mtd->oobsize);
 
+	if (ctrl->status & IFC_NAND_EVTER_STAT_ECCER)
+		return check_erased_page(chip, buf, mtd);
+
 	if (ctrl->status != IFC_NAND_EVTER_STAT_OPC)
 		mtd->ecc_stats.failed++;
 
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 982024e31e..940025a467 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -322,7 +322,7 @@ static int mc_fixup_dpc_mac_addr(void *blob, int dpmac_id,
 static int mc_fixup_mac_addrs(void *blob, enum mc_fixup_type type)
 {
 	int i, err = 0, ret = 0;
-	char ethname[10];
+	char ethname[ETH_NAME_LEN];
 	struct eth_device *eth_dev;
 
 	for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
@@ -331,8 +331,8 @@ static int mc_fixup_mac_addrs(void *blob, enum mc_fixup_type type)
 		    (wriop_get_phy_address(i) == -1))
 			continue;
 
-		sprintf(ethname, "DPMAC%d@%s", i,
-			phy_interface_strings[wriop_get_enet_if(i)]);
+		snprintf(ethname, ETH_NAME_LEN, "DPMAC%d@%s", i,
+			 phy_interface_strings[wriop_get_enet_if(i)]);
 
 		eth_dev = eth_get_dev_by_name(ethname);
 		if (eth_dev == NULL)
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c
index 79facb4a44..a25b7cd906 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.c
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -993,8 +993,8 @@ static int ldpaa_eth_netdev_init(struct eth_device *net_dev,
 	int err;
 	struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv;
 
-	sprintf(net_dev->name, "DPMAC%d@%s", priv->dpmac_id,
-		phy_interface_strings[enet_if]);
+	snprintf(net_dev->name, ETH_NAME_LEN, "DPMAC%d@%s", priv->dpmac_id,
+		 phy_interface_strings[enet_if]);
 
 	net_dev->iobase = 0;
 	net_dev->init = ldpaa_eth_open;
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index 375b8549c5..b4c8556686 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -321,6 +321,12 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info)
 
 	pci_setup_indirect(hose, cfg_addr, cfg_data);
 
+#ifdef PEX_CCB_DIV
+	/* Configure the PCIE controller core clock ratio */
+	pci_hose_write_config_dword(hose, dev, 0x440,
+				    ((gd->bus_clk / 1000000) *
+				     (16 / PEX_CCB_DIV)) / 333);
+#endif
 	block_rev = in_be32(&pci->block_rev1);
 	if (PEX_IP_BLK_REV_2_2 <= block_rev) {
 		pi = &pci->pit[2];	/* 0xDC0 */