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authoryanhong.wang <yanhong.wang@starfivetech.com>2022-04-27 11:47:53 +0300
committerYanhong Wang <yanhong.wang@linux.starfivetech.com>2022-10-18 11:24:34 +0300
commitc7889a100782db20e85f99f6471881cc51120dbc (patch)
tree9e17a0acbd54338735820880af801eb1c58ffbe4 /drivers
parentf95a5cec9fd49737ce570098be96d0c4d5c40ea8 (diff)
downloadu-boot-c7889a100782db20e85f99f6471881cc51120dbc.tar.xz
reset:starfive: Adjust judgment conditions
The serial driver will call reset driver, udelay function will be called in reset driver, but the timer is not init,so udelay function call will cases error. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/reset/reset-jh7110.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/reset/reset-jh7110.c b/drivers/reset/reset-jh7110.c
index 79d5c5cbb0..ab47557e9b 100644
--- a/drivers/reset/reset-jh7110.c
+++ b/drivers/reset/reset-jh7110.c
@@ -135,6 +135,7 @@ static int jh7110_reset_trigger(struct jh7110_reset_priv *priv,
unsigned long group;
u32 mask, value, done;
int ret;
+ u32 loop;
group = id / 32;
mask = BIT(id % 32);
@@ -156,10 +157,10 @@ static int jh7110_reset_trigger(struct jh7110_reset_priv *priv,
value &= ~mask;
writel(value, reset.assert);
- /* if the associated clock is gated, deasserting might otherwise hang forever */
- ret = readl_poll_timeout(reset.status, value, (value & mask) == done, 100000);
- if (ret)
- debug("reset %ld: timeout.\n", id);
+ loop = 10000; /*Addd loop condition inorder to avoid hang here*/
+ do{
+ value = in_le32(reset.status);
+ }while((value & mask) != done && --loop != 0);
return ret;
}