diff options
| author | Svyatoslav Ryhel <clamor95@gmail.com> | 2023-03-27 11:11:43 +0300 |
|---|---|---|
| committer | Anatolij Gustschin <agust@denx.de> | 2023-04-07 20:43:14 +0300 |
| commit | f67f23c5df10e3e1a6dfa9f96888c47647ecb6f4 (patch) | |
| tree | 10aac3e57564a868848e5b2c200476cbe3ed6e93 /drivers | |
| parent | e114f507ece4f5f40bc0e40d7a61084bbc17555e (diff) | |
| download | u-boot-f67f23c5df10e3e1a6dfa9f96888c47647ecb6f4.tar.xz | |
video: tegra-dc: request timings from panel driver first
Check if panel driver has display timings and get those.
If panel driver does not pass timing, try to find timing
under rgb node for backwards compatibility.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/video/tegra20/tegra-dc.c | 29 |
1 files changed, 17 insertions, 12 deletions
diff --git a/drivers/video/tegra20/tegra-dc.c b/drivers/video/tegra20/tegra-dc.c index ff67cc8989..91298b7b7f 100644 --- a/drivers/video/tegra20/tegra-dc.c +++ b/drivers/video/tegra20/tegra-dc.c @@ -380,18 +380,6 @@ static int tegra_lcd_of_to_plat(struct udevice *dev) return -EINVAL; } - ret = fdtdec_decode_display_timing(blob, rgb, 0, &priv->timing); - if (ret) { - debug("%s: Cannot read display timing for '%s' (ret=%d)\n", - __func__, dev->name, ret); - return -EINVAL; - } - timing = &priv->timing; - priv->width = timing->hactive.typ; - priv->height = timing->vactive.typ; - priv->pixel_clock = timing->pixelclock.typ; - priv->log2_bpp = VIDEO_BPP16; - /* * Sadly the panel phandle is in an rgb subnode so we cannot use * uclass_get_device_by_phandle(). @@ -401,6 +389,7 @@ static int tegra_lcd_of_to_plat(struct udevice *dev) debug("%s: Cannot find panel information\n", __func__); return -EINVAL; } + ret = uclass_get_device_by_of_offset(UCLASS_PANEL, panel_node, &priv->panel); if (ret) { @@ -409,6 +398,22 @@ static int tegra_lcd_of_to_plat(struct udevice *dev) return ret; } + ret = panel_get_display_timing(priv->panel, &priv->timing); + if (ret) { + ret = fdtdec_decode_display_timing(blob, rgb, 0, &priv->timing); + if (ret) { + debug("%s: Cannot read display timing for '%s' (ret=%d)\n", + __func__, dev->name, ret); + return -EINVAL; + } + } + + timing = &priv->timing; + priv->width = timing->hactive.typ; + priv->height = timing->vactive.typ; + priv->pixel_clock = timing->pixelclock.typ; + priv->log2_bpp = VIDEO_BPP16; + return 0; } |