summaryrefslogtreecommitdiff
path: root/include/configs/T102xQDS.h
diff options
context:
space:
mode:
authorBiwen Li <biwen.li@nxp.com>2020-05-01 15:04:11 +0300
committerPriyanka Jain <priyanka.jain@nxp.com>2020-05-04 06:42:36 +0300
commit9e9771a6105785189828706418945748d4db89a1 (patch)
tree0befde222d9e2aa90e22d7c90ac2b7a89330f43a /include/configs/T102xQDS.h
parentc55622540782daadfb64f90f142bd3648d9c65ef (diff)
downloadu-boot-9e9771a6105785189828706418945748d4db89a1.tar.xz
dm: powerpc: T1023/T1024: add i2c DM support
This supports i2c DM for SoC T1023/T1024 Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'include/configs/T102xQDS.h')
-rw-r--r--include/configs/T102xQDS.h10
1 files changed, 9 insertions, 1 deletions
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 20c0534f5a..7f9e0c84bb 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
*/
/*
@@ -437,14 +438,20 @@ unsigned long get_board_ddr_clk(void);
#endif
/* I2C */
+#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
+#endif
+
+#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
#define I2C_MUX_PCA_ADDR 0x77
#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
@@ -460,6 +467,7 @@ unsigned long get_board_ddr_clk(void);
/* LDI/DVI Encoder for display */
#define CONFIG_SYS_I2C_LDI_ADDR 0x38
#define CONFIG_SYS_I2C_DVI_ADDR 0x75
+#define CONFIG_SYS_I2C_DVI_BUS_NUM 0
/*
* RTC configuration