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| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2018-04-30 15:10:36 +0300 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2018-05-20 13:06:55 +0300 |
| commit | e9c891ff934324d67335f6dee601fa4f77da76a1 (patch) | |
| tree | aa13b3299da497ea1b5f816aa3f5136cc87197c2 /include/configs/blanche.h | |
| parent | decb5f66c3319bb8459be3dd01622776b91ca1e7 (diff) | |
| download | u-boot-e9c891ff934324d67335f6dee601fa4f77da76a1.tar.xz | |
ARM: rmobile: Update V2H Blanche
The V2H Blanche port was broken since some time. This patch updates
the V2H Blanche port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'include/configs/blanche.h')
| -rw-r--r-- | include/configs/blanche.h | 30 |
1 files changed, 3 insertions, 27 deletions
diff --git a/include/configs/blanche.h b/include/configs/blanche.h index 8ff82d3489..6df0e9bcc0 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -12,9 +12,9 @@ #include "rcar-gen2-common.h" /* STACK */ -#define CONFIG_SYS_INIT_SP_ADDR 0xE817FFFC -#define STACK_AREA_SIZE 0xC000 -#define LOW_LEVEL_MERAM_STACK \ +#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 +#define STACK_AREA_SIZE 0x00100000 +#define LOW_LEVEL_MERAM_STACK \ (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) /* MEMORY */ @@ -22,12 +22,6 @@ #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) -/* SCIF */ -#define CONFIG_CONS_SCIF0 - -#define CONFIG_SYS_MEMTEST_START (RCAR_GEN2_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 504 * 1024 * 1024) - #undef CONFIG_SYS_MEMTEST_SCRATCH #undef CONFIG_SYS_LOADS_BAUD_CHANGE @@ -55,7 +49,6 @@ #undef CONFIG_CMD_SPI #endif - /* Board Clock */ #define RMOBILE_XTAL_CLK 20000000u #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK @@ -73,21 +66,4 @@ #define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN) #endif -/* Module stop status bits */ -/* INTC-RT */ -#define CONFIG_SMSTP0_ENA 0x00400000 -/* SDHI0 */ -#define CONFIG_SMSTP3_ENA 0x00004000 -/* INTC-SYS, IRQC */ -#define CONFIG_SMSTP4_ENA 0x00000180 -/* SCIF0 */ -#define CONFIG_SMSTP7_ENA 0x00200000 -/* QSPI */ -#define CONFIG_SMSTP9_ENA 0x00020000 -/* SYS-DMAC0 */ -#define CONFIG_RMSTP2_ENA 0x00080000 - -/* SDHI */ -#define CONFIG_SH_SDHI_FREQ 97500000 - #endif /* __BLANCHE_H */ |