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| author | Simon Glass <sjg@chromium.org> | 2019-05-02 19:52:12 +0300 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2019-05-08 08:02:18 +0300 |
| commit | 7c03caf6fac19cfef049ec84d813e87481d48d69 (patch) | |
| tree | 3c3ddd190a200be03eda999d972e74ca79cfb198 /include/configs/chromebook_link.h | |
| parent | 49dffb7a074e9b9d2c27a303798c0e6bc5eea3ba (diff) | |
| download | u-boot-7c03caf6fac19cfef049ec84d813e87481d48d69.tar.xz | |
x86: Add a simple TPL implementation
Add the required CPU code so that TPL builds correctly. Also update the
SPL code to deal with being booted from TPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'include/configs/chromebook_link.h')
| -rw-r--r-- | include/configs/chromebook_link.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index ca59276892..f26e463fe5 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -18,9 +18,6 @@ #define CONFIG_ENV_SECT_SIZE 0x1000 #define CONFIG_ENV_OFFSET 0x003f8000 -#define BOOT_DEVICE_SPI 10 - #define CONFIG_SPL_BOARD_LOAD_IMAGE -#define BOOT_DEVICE_BOARD 11 #endif /* __CONFIG_H */ |