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| author | Rajesh Bhagat <rajesh.bhagat@nxp.com> | 2018-11-05 21:02:44 +0300 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2018-12-07 01:37:19 +0300 |
| commit | f71b5f1101f6445af9b0dc53d533f84c9e7a8a04 (patch) | |
| tree | 496175abbee64497f81da547223522a34d777d7f /include/configs/ls1043ardb.h | |
| parent | 50e2d41f6c9b252ec00b3ed33264d091db7ed479 (diff) | |
| download | u-boot-f71b5f1101f6445af9b0dc53d533f84c9e7a8a04.tar.xz | |
armv8: ls1043ardb: Add TFABOOT support
TFABOOT support includes:
- ls1043ardb_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- FMAN and QE address changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs/ls1043ardb.h')
| -rw-r--r-- | include/configs/ls1043ardb.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 54e6eef417..a0d39878b8 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -162,6 +162,25 @@ #define CONFIG_SYS_CPLD_FTIM3 0x0 /* IFC Timing Params */ +#ifdef CONFIG_TFABOOT +#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR_CSPR_EXT +#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR_CSPR +#define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 + +#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR1 CONFIG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK1 CONFIG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR1 CONFIG_SYS_NAND_CSOR +#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 +#else #ifdef CONFIG_NAND_BOOT #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR @@ -199,6 +218,7 @@ #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 #endif +#endif #define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_CPLD_CSPR_EXT #define CONFIG_SYS_CSPR2 CONFIG_SYS_CPLD_CSPR @@ -227,6 +247,14 @@ #define CONFIG_ENV_OVERWRITE #endif +#ifdef CONFIG_TFABOOT +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_OFFSET 0x500000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x500000) +#define CONFIG_ENV_SECT_SIZE 0x20000 +#else #if defined(CONFIG_NAND_BOOT) #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_OFFSET (24 * CONFIG_SYS_NAND_BLOCK_SIZE) @@ -239,6 +267,7 @@ #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x20000 #endif +#endif /* FMan */ #ifndef SPL_NO_FMAN |