diff options
| author | York Sun <york.sun@nxp.com> | 2018-06-27 00:48:29 +0300 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2018-07-26 21:51:23 +0300 |
| commit | 038b965c2b403c8087ca0515f907b730be57d739 (patch) | |
| tree | be0fddf1e2d4f96e41ba0ca94c6a25848be8787b /include/configs/ls1046a_common.h | |
| parent | 996060927540904b956513d087192f67b6419133 (diff) | |
| download | u-boot-038b965c2b403c8087ca0515f907b730be57d739.tar.xz | |
armv8: ls1046ardb: Add falcon mode for for QSPI boot
A new defconfig is introduced to support SPL boot from QSPI NOR
flash. This is to support falcon mode for faster booting into
Linux.
Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs/ls1046a_common.h')
| -rw-r--r-- | include/configs/ls1046a_common.h | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index fda3f3b206..cdb73f644a 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -16,11 +16,11 @@ #define SPL_NO_USB #define SPL_NO_SATA #endif -#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT)) +#if defined(CONFIG_SPL_BUILD) && \ + (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT)) #define SPL_NO_MMC #endif #if defined(CONFIG_SPL_BUILD) && \ - defined(CONFIG_SD_BOOT) && \ !defined(CONFIG_SPL_FSL_LS_PPA) #define SPL_NO_IFC #endif @@ -84,6 +84,21 @@ #endif /* ifdef CONFIG_SECURE_BOOT */ #endif +#if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL) +#define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl" +#define CONFIG_SPL_TEXT_BASE 0x10000000 +#define CONFIG_SPL_MAX_SIZE 0x1f000 +#define CONFIG_SPL_STACK 0x10020000 +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SPL_BSS_START_ADDR 0x8f000000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ + CONFIG_SPL_BSS_MAX_SIZE) +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 +#define CONFIG_SYS_MONITOR_LEN 0x100000 +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#endif + /* NAND SPL */ #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PBL_PAD |