diff options
author | Mason Huo <mason.huo@starfivetech.com> | 2023-03-09 11:51:05 +0300 |
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committer | Mason Huo <mason.huo@starfivetech.com> | 2023-03-09 11:57:41 +0300 |
commit | 98b917bd0c39fd2375889ab4501edb7c86cd96da (patch) | |
tree | 674d789bddbd17a85950f0a39d2649f06097921d /include/configs | |
parent | 6db3920fc403d7842bdecc660dc4df7e1cc32d3c (diff) | |
download | u-boot-98b917bd0c39fd2375889ab4501edb7c86cd96da.tar.xz |
board: starfive: jh7110: Add 1.1 & 1.02v max cpu voltage
Add two more binning IC types, and set add their
max cpu voltage accordingly.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/starfive-visionfive2.h | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/include/configs/starfive-visionfive2.h b/include/configs/starfive-visionfive2.h index 7d41c4a43f..e7d73e2fb4 100644 --- a/include/configs/starfive-visionfive2.h +++ b/include/configs/starfive-visionfive2.h @@ -98,6 +98,10 @@ #define TYPE_GUID_LOADER2 "2E54B353-1271-4842-806F-E436D6AF6985" #define TYPE_GUID_SYSTEM "0FC63DAF-8483-4772-8E79-3D69D8477DE4" +#define CPU_VOL_1020_SET \ + "cpu_vol_1020_set=" \ + "fdt set /opp-table-0/opp-1500000000 opp-microvolt <1020000>;\0" + #define CPU_VOL_1040_SET \ "cpu_vol_1040_set=" \ "fdt set /opp-table-0/opp-1500000000 opp-microvolt <1040000>;\0" @@ -110,12 +114,20 @@ "cpu_vol_1080_set=" \ "fdt set /opp-table-0/opp-1500000000 opp-microvolt <1080000>;\0" +#define CPU_VOL_1100_SET \ + "cpu_vol_1100_set=" \ + "fdt set /opp-table-0/opp-1500000000 opp-microvolt <1100000>;\0" + #define CPU_VOL_SET \ "cpu_vol_set=" \ - "if test ${cpu_max_vol} = 1080000; then " \ + "if test ${cpu_max_vol} = 1100000; then " \ + "run cpu_vol_1100_set;" \ + "elif test ${cpu_max_vol} = 1080000; then " \ "run cpu_vol_1080_set;" \ "elif test ${cpu_max_vol} = 1060000; then " \ "run cpu_vol_1060_set;" \ + "elif test ${cpu_max_vol} = 1020000; then " \ + "run cpu_vol_1020_set;" \ "else " \ "run cpu_vol_1040_set;" \ "fi; \0" @@ -240,9 +252,11 @@ VISIONFIVE2_BOOTENV \ CHIPA_GMAC_SET \ CHIPA_SET \ + CPU_VOL_1020_SET \ CPU_VOL_1040_SET \ CPU_VOL_1060_SET \ CPU_VOL_1080_SET \ + CPU_VOL_1100_SET \ CPU_VOL_SET \ CHIPA_SET_FORCE \ VISIONFIVE2_MEM_SET \ |