clk: k210: Move pll into the rest of the driver

Now that there no separate PLL driver, we can no longer make the PLL
functions static. By moving the PLL driver in with the rest of the clock
code, we can make these functions static again. We still keep the pll
header for unit testing, but it is pretty reduced.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

2 files changed, 0 insertions, 69 deletions

diff --git a/include/kendryte/clk.h b/include/kendryte/clk.h
deleted file mode 100644
index 9c6245d468..0000000000
--- a/include/kendryte/clk.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
- */
-
-#ifndef K210_CLK_H
-#define K210_CLK_H
-
-#define LOG_CATEGORY UCLASS_CLK
-#include <linux/types.h>
-#include <linux/clk-provider.h>
-
-static inline struct clk *k210_clk_gate(const char *name,
-					const char *parent_name,
-					void __iomem *reg, u8 bit_idx)
-{
-	return clk_register_gate(NULL, name, parent_name, 0, reg, bit_idx, 0,
-				 NULL);
-}
-
-static inline struct clk *k210_clk_half(const char *name,
-					const char *parent_name)
-{
-	return clk_register_fixed_factor(NULL, name, parent_name, 0, 1, 2);
-}
-
-static inline struct clk *k210_clk_div(const char *name,
-				       const char *parent_name,
-				       void __iomem *reg, u8 shift, u8 width)
-{
-	return clk_register_divider(NULL, name, parent_name, 0, reg, shift,
-				    width, 0);
-}
-
-#endif /* K210_CLK_H */
diff --git a/include/kendryte/pll.h b/include/kendryte/pll.h
index 16fd5a5b68..fd16a89cb2 100644
--- a/include/kendryte/pll.h
+++ b/include/kendryte/pll.h
@@ -5,25 +5,7 @@
 #ifndef K210_PLL_H
 #define K210_PLL_H
 
-#include <clk.h>
 #include <test/export.h>
-#include <asm/io.h>
-
-#define K210_PLL_CLKR GENMASK(3, 0)
-#define K210_PLL_CLKF GENMASK(9, 4)
-#define K210_PLL_CLKOD GENMASK(13, 10) /* Output Divider */
-#define K210_PLL_BWADJ GENMASK(19, 14) /* BandWidth Adjust */
-#define K210_PLL_RESET BIT(20)
-#define K210_PLL_PWRD BIT(21) /* PoWeReD */
-#define K210_PLL_INTFB BIT(22) /* Internal FeedBack */
-#define K210_PLL_BYPASS BIT(23)
-#define K210_PLL_TEST BIT(24)
-#define K210_PLL_EN BIT(25)
-#define K210_PLL_TEST_EN BIT(26)
-
-#define K210_PLL_LOCK 0
-#define K210_PLL_CLEAR_SLIP 2
-#define K210_PLL_TEST_OUT 3
 
 struct k210_pll_config {
 	u8 r;
@@ -34,25 +16,9 @@ struct k210_pll_config {
 #ifdef CONFIG_UNIT_TEST
 TEST_STATIC int k210_pll_calc_config(u32 rate, u32 rate_in,
 				     struct k210_pll_config *best);
-
 #ifndef nop
 #define nop()
 #endif
 
 #endif
-
-/**
- * struct k210_clk_priv - K210 clock driver private data
- * @base: The base address of the sysctl device
- * @in0: The "in0" external oscillator
- */
-struct k210_clk_priv {
-	void __iomem *base;
-	struct clk in0;
-};
-
-ulong k210_pll_set_rate(struct k210_clk_priv *priv, int id, ulong rate, ulong rate_in);
-ulong k210_pll_get_rate(struct k210_clk_priv *priv, int id, ulong rate_in);
-int k210_pll_enable(struct k210_clk_priv *priv, int id);
-int k210_pll_disable(struct k210_clk_priv *priv, int id);
 #endif /* K210_PLL_H */