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| author | Neil Armstrong <narmstrong@baylibre.com> | 2020-10-02 12:16:09 +0300 |
|---|---|---|
| committer | Anatolij Gustschin <agust@denx.de> | 2020-10-18 11:36:05 +0300 |
| commit | 01c9857fa806e23a30f2b042b32ceeac6bee9d36 (patch) | |
| tree | cd6cf04f0b5d465b065864ac778aa9ed3bdefb49 /include/mipi_dsi.h | |
| parent | b53c122631d3e88280909c04102d7859c311cdfe (diff) | |
| download | u-boot-01c9857fa806e23a30f2b042b32ceeac6bee9d36.tar.xz | |
video: dw-mipi-dsi: permit configuring the escape clock rate
The Amlogic D-PHY in the Amlogic AXG SoC Family does support a frequency
higher than 10MHz for the TX Escape Clock, thus make the target rate
configurable.
This is based on the Linux commit [1] and adapted to the U-Boot driver.
[1] a328ca7e4af3 ("drm/bridge: dw-mipi-dsi: permit configuring the escape clock rate")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Diffstat (limited to 'include/mipi_dsi.h')
| -rw-r--r-- | include/mipi_dsi.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/mipi_dsi.h b/include/mipi_dsi.h index 55c7ab3328..4ca05f71e2 100644 --- a/include/mipi_dsi.h +++ b/include/mipi_dsi.h @@ -123,6 +123,7 @@ struct mipi_dsi_phy_ops { void (*post_set_mode)(void *priv_data, unsigned long mode_flags); int (*get_timing)(void *priv_data, unsigned int lane_mbps, struct mipi_dsi_phy_timing *timing); + void (*get_esc_clk_rate)(void *priv_data, unsigned int *esc_clk_rate); }; /** |