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| author | Pratyush Yadav <p.yadav@ti.com> | 2021-06-25 22:17:03 +0300 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2021-06-28 09:23:48 +0300 |
| commit | a1eb40b70b40d208a72765c0f56cffed4e22ff30 (patch) | |
| tree | e476dec15c594135cd160ffacde6ab0ccbf2ada6 /include/spi-mem.h | |
| parent | 0d7066bce23d3732cd3a59176ccd7a3ee7be9d63 (diff) | |
| download | u-boot-a1eb40b70b40d208a72765c0f56cffed4e22ff30.tar.xz | |
spi: spi-mem: allow specifying whether an op is DTR or not
Each phase is given a separate 'dtr' field so mixed protocols like
4S-4D-4D can be supported.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'include/spi-mem.h')
| -rw-r--r-- | include/spi-mem.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/spi-mem.h b/include/spi-mem.h index e354c38897..8bd4459674 100644 --- a/include/spi-mem.h +++ b/include/spi-mem.h @@ -71,6 +71,7 @@ enum spi_mem_data_dir { * struct spi_mem_op - describes a SPI memory operation * @cmd.buswidth: number of IO lines used to transmit the command * @cmd.opcode: operation opcode + * @cmd.dtr: whether the command opcode should be sent in DTR mode or not * @addr.nbytes: number of address bytes to send. Can be zero if the operation * does not need to send an address * @addr.buswidth: number of IO lines used to transmit the address cycles @@ -78,10 +79,13 @@ enum spi_mem_data_dir { * Note that only @addr.nbytes are taken into account in this * address value, so users should make sure the value fits in the * assigned number of bytes. + * @addr.dtr: whether the address should be sent in DTR mode or not * @dummy.nbytes: number of dummy bytes to send after an opcode or address. Can * be zero if the operation does not require dummy bytes * @dummy.buswidth: number of IO lanes used to transmit the dummy bytes + * @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not * @data.buswidth: number of IO lanes used to send/receive the data + * @data.dtr: whether the data should be sent in DTR mode or not * @data.dir: direction of the transfer * @data.buf.in: input buffer * @data.buf.out: output buffer @@ -90,21 +94,25 @@ struct spi_mem_op { struct { u8 buswidth; u8 opcode; + u8 dtr : 1; } cmd; struct { u8 nbytes; u8 buswidth; + u8 dtr : 1; u64 val; } addr; struct { u8 nbytes; u8 buswidth; + u8 dtr : 1; } dummy; struct { u8 buswidth; + u8 dtr : 1; enum spi_mem_data_dir dir; unsigned int nbytes; /* buf.{in,out} must be DMA-able. */ |