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authorSimon Glass <sjg@chromium.org>2019-12-07 07:42:18 +0300
committerBin Meng <bmeng.cn@gmail.com>2019-12-15 06:44:16 +0300
commitcf87d3b5039d2e497380ccddff905cf3e58e0032 (patch)
tree09eca0761df865fe118a40f2c728847980f2e90f /include
parentf42af294cc13a4ad19eefd5801dc97bf4ee54e5c (diff)
downloadu-boot-cf87d3b5039d2e497380ccddff905cf3e58e0032.tar.xz
x86: fsp: Add FSP2 base support
Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'include')
-rw-r--r--include/bootstage.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/bootstage.h b/include/bootstage.h
index d105ae0181..82f0307ef1 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -202,6 +202,9 @@ enum bootstage_id {
BOOTSTATE_ID_ACCUM_DM_SPL,
BOOTSTATE_ID_ACCUM_DM_F,
BOOTSTATE_ID_ACCUM_DM_R,
+ BOOTSTATE_ID_ACCUM_FSP_M,
+ BOOTSTATE_ID_ACCUM_FSP_S,
+ BOOTSTAGE_ID_ACCUM_MMAP_SPI,
/* a few spare for the user, from here */
BOOTSTAGE_ID_USER,