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authorTom Rini <trini@konsulko.com>2020-03-10 20:13:08 +0300
committerTom Rini <trini@konsulko.com>2020-03-10 20:13:08 +0300
commit3a1cb953085ecca1dd2f87288375801ebd580bab (patch)
tree3a7bacdbbd6ac9a5d3fe98f1eeb67a30ffac90e4 /include
parentb62cd976543ae1b90050346c870d8357d749fe2d (diff)
parent9f656fbee3b433ae1e9daf5d92d46bbdcc9551eb (diff)
downloadu-boot-3a1cb953085ecca1dd2f87288375801ebd580bab.tar.xz
Merge tag 'u-boot-imx-20200310' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Fixes for 2020.04 ----------------- - DM : mx6sabresd - mx6ul_14x14_evk: fix video - mx8qxp; fix console for booting - sync DTS with kernel (imx6sx) - drop obsolete woodburn (mx35) Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/660550811
Diffstat (limited to 'include')
-rw-r--r--include/configs/imx8qm_rom7720.h7
-rw-r--r--include/configs/imx8qxp_mek.h6
-rw-r--r--include/configs/mx6cuboxi.h1
-rw-r--r--include/configs/mx6sabreauto.h8
-rw-r--r--include/configs/mx6sabresd.h9
-rw-r--r--include/configs/mx6slevk.h7
-rw-r--r--include/configs/woodburn.h18
-rw-r--r--include/configs/woodburn_common.h195
-rw-r--r--include/configs/woodburn_sd.h30
-rw-r--r--include/dt-bindings/clock/imx6sx-clock.h13
10 files changed, 15 insertions, 279 deletions
diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h
index 865863eb7c..ac25549a18 100644
--- a/include/configs/imx8qm_rom7720.h
+++ b/include/configs/imx8qm_rom7720.h
@@ -17,7 +17,12 @@
#undef CONFIG_BOOTM_NETBSD
#define CONFIG_FSL_USDHC
+#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#define USDHC1_BASE_ADDR 0x5B010000
+#define USDHC2_BASE_ADDR 0x5B020000
+#define USDHC3_BASE_ADDR 0x5B030000
+
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
#define CONFIG_ENV_OVERWRITE
@@ -63,11 +68,9 @@
"panel=NULL\0" \
"console=ttyLP0\0" \
"fdt_addr=0x83000000\0" \
- "fdt_high=0xffffffffffffffff\0" \
"boot_fdt=try\0" \
"fdt_file=imx8qm-rom7720-a1.dtb\0" \
"initrd_addr=0x83800000\0" \
- "initrd_high=0xffffffffffffffff\0" \
"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h
index 81ac4b52f3..0aaca3325b 100644
--- a/include/configs/imx8qxp_mek.h
+++ b/include/configs/imx8qxp_mek.h
@@ -65,7 +65,7 @@
"script=boot.scr\0" \
"image=Image\0" \
"panel=NULL\0" \
- "console=ttyLP0,${baudrate} earlycon\0" \
+ "console=ttyLP0\0" \
"fdt_addr=0x83000000\0" \
"fdt_high=0xffffffffffffffff\0" \
"boot_fdt=try\0" \
@@ -76,7 +76,7 @@
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
"mmcautodetect=yes\0" \
- "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
+ "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot}\0 " \
"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
@@ -104,7 +104,7 @@
"echo wait for boot; " \
"fi;" \
"fi;\0" \
- "netargs=setenv bootargs console=${console} " \
+ "netargs=setenv bootargs console=${console},${baudrate} " \
"root=/dev/nfs " \
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
"netboot=echo Booting from net ...; " \
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index 6d47e28fc7..a6690367f8 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -66,7 +66,6 @@
"ramdisk_addr_r=0x13000000\0" \
"ramdiskaddr=0x13000000\0" \
"initrd_high=0xffffffff\0" \
- "fdt_high=0xffffffff\0" \
"ip_dyn=yes\0" \
"console=" CONSOLE_DEV ",115200\0" \
"bootm_size=0x10000000\0" \
diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h
index c07b03984a..e444930dc8 100644
--- a/include/configs/mx6sabreauto.h
+++ b/include/configs/mx6sabreauto.h
@@ -75,12 +75,4 @@
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 1
-
-#define CONFIG_PHY_ATHEROS
-
#endif /* __MX6SABREAUTO_CONFIG_H */
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index d810202117..ec1537541a 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -62,13 +62,4 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
#endif
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 1
-
-#define CONFIG_PHY_ATHEROS
-
-
#endif /* __MX6SABRESD_CONFIG_H */
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index 6b2a174e7a..193931b91b 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -32,13 +32,6 @@
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RMII
-#define CONFIG_FEC_MXC_PHYADDR 0
-
-#define CONFIG_PHY_SMSC
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"image=zImage\0" \
diff --git a/include/configs/woodburn.h b/include/configs/woodburn.h
deleted file mode 100644
index 7f9ddb5b8e..0000000000
--- a/include/configs/woodburn.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
- *
- * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
- *
- * Configuration for the woodburn board.
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include <asm/arch/imx-regs.h>
-#include "woodburn_common.h"
-
-/* Set TEXT at the beginning of the NOR flash */
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h
deleted file mode 100644
index 194e43ecc6..0000000000
--- a/include/configs/woodburn_common.h
+++ /dev/null
@@ -1,195 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
- *
- * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
- *
- * Configuration for the woodburn board.
- */
-
-#ifndef __WOODBURN_COMMON_CONFIG_H
-#define __WOODBURN_COMMON_CONFIG_H
-
-#include <asm/arch/imx-regs.h>
-
- /* High Level Configuration Options */
-#define CONFIG_MX35
-#define CONFIG_MX35_HCLK_FREQ 24000000
-#define CONFIG_SYS_FSL_CLK
-
-#define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
-
-/* This is required to setup the ESDC controller */
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_REVISION_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
-
-/*
- * Hardware drivers
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_SPD_BUS_NUM 0
-
-/* PMIC Controller */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#define CONFIG_POWER_FSL
-#define CONFIG_POWER_FSL_MC13892
-#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
-#define CONFIG_RTC_MC13XXX
-
-/* mmc driver */
-#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_SYS_FSL_ESDHC_NUM 1
-
-/*
- * UART (console)
- */
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART1_BASE
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/*
- * Command definition
- */
-
-#define CONFIG_NET_RETRY_COUNT 100
-
-
-#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
-
-/*
- * Ethernet on SOC (FEC)
- */
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1
-
-#define CONFIG_DISCOVER_PHY
-
-#define CONFIG_ARP_TIMEOUT 200UL
-
-/*
- * Miscellaneous configurable options
- */
-
-#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x10000
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
-/*
- * Physical Memory Map
- */
-#define PHYS_SDRAM_1 CSD0_BASE_ADDR
-#define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
-
-#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
-
-#define CONFIG_SYS_GBL_DATA_OFFSET (LOW_LEVEL_SRAM_STACK - \
- IRAM_BASE_ADDR - \
- GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (IRAM_BASE_ADDR + \
- CONFIG_SYS_GBL_DATA_OFFSET)
-
-/*
- * MTD Command for mtdparts
- */
-
-/*
- * FLASH and environment organization
- */
-#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
-/* Monitor at beginning of flash */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
-
-/* Address and size of Redundant Environment Sector */
-
-/*
- * CFI FLASH driver setup
- */
-
-/* A non-standard buffered write algorithm */
-
-/*
- * NAND FLASH driver setup
- */
-#define CONFIG_NAND_MXC_V1_1
-#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
-#define CONFIG_MXC_NAND_HWECC
-#define CONFIG_SYS_NAND_LARGEPAGE
-
-#define CONFIG_SYS_NAND_ONFI_DETECTION
-
-/*
- * Default environment and default scripts
- * to update uboot and load kernel
- */
-
-#define CONFIG_HOSTNAME "woodburn"
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=eth0\0" \
- "nfsargs=setenv bootargs root=/dev/nfs rw " \
- "nfsroot=${serverip}:${rootpath}\0" \
- "ramargs=setenv bootargs root=/dev/ram rw\0" \
- "addip_sta=setenv bootargs ${bootargs} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
- ":${hostname}:${netdev}:off panic=1\0" \
- "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
- "addip=if test -n ${ipdyn};then run addip_dyn;" \
- "else run addip_sta;fi\0" \
- "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
- "addtty=setenv bootargs ${bootargs}" \
- " console=ttymxc0,${baudrate}\0" \
- "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
- "loadaddr=80800000\0" \
- "kernel_addr_r=80800000\0" \
- "hostname=" CONFIG_HOSTNAME "\0" \
- "bootfile=" CONFIG_HOSTNAME "/uImage\0" \
- "ramdisk_file=" CONFIG_HOSTNAME "/uRamdisk\0" \
- "flash_self=run ramargs addip addtty addmtd addmisc;" \
- "bootm ${kernel_addr} ${ramdisk_addr}\0" \
- "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
- "bootm ${kernel_addr}\0" \
- "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
- "run nfsargs addip addtty addmtd addmisc;" \
- "bootm ${kernel_addr_r}\0" \
- "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
- "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
- "net_self=if run net_self_load;then " \
- "run ramargs addip addtty addmtd addmisc;" \
- "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
- "else echo Images not loades;fi\0" \
- "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \
- "load=tftp ${loadaddr} ${u-boot}\0" \
- "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
- "update=protect off ${uboot_addr} +80000;" \
- "erase ${uboot_addr} +80000;" \
- "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
- "upd=if run load;then echo Updating u-boot;if run update;" \
- "then echo U-Boot updated;" \
- "else echo Error updating u-boot !;" \
- "echo Board without bootloader !!;" \
- "fi;" \
- "else echo U-Boot not downloaded..exiting;fi\0" \
- "bootcmd=run net_nfs\0"
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/woodburn_sd.h b/include/configs/woodburn_sd.h
deleted file mode 100644
index 60d8a4b8c3..0000000000
--- a/include/configs/woodburn_sd.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
- *
- * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
- *
- * Configuration for the woodburn board.
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include <asm/arch/imx-regs.h>
-#include "woodburn_common.h"
-
-/* Set TEXT in RAM */
-
-/*
- * SPL
- */
-
-#define CONFIG_SPL_MAX_SIZE (64 * 1024) /* 8 KB for stack */
-#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
-
-#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
-#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
-
-#endif /* __CONFIG_H */
diff --git a/include/dt-bindings/clock/imx6sx-clock.h b/include/dt-bindings/clock/imx6sx-clock.h
index 36f0324902..1c64997d61 100644
--- a/include/dt-bindings/clock/imx6sx-clock.h
+++ b/include/dt-bindings/clock/imx6sx-clock.h
@@ -1,10 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2014 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
*/
#ifndef __DT_BINDINGS_CLOCK_IMX6SX_H
@@ -275,6 +271,11 @@
#define IMX6SX_PLL6_BYPASS 262
#define IMX6SX_PLL7_BYPASS 263
#define IMX6SX_CLK_SPDIF_GCLK 264
-#define IMX6SX_CLK_CLK_END 265
+#define IMX6SX_CLK_LVDS2_SEL 265
+#define IMX6SX_CLK_LVDS2_OUT 266
+#define IMX6SX_CLK_LVDS2_IN 267
+#define IMX6SX_CLK_ANACLK2 268
+#define IMX6SX_CLK_MMDC_P1_IPG 269
+#define IMX6SX_CLK_CLK_END 270
#endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */