diff options
author | Tim Harvey <tharvey@gateworks.com> | 2022-02-11 21:48:56 +0300 |
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committer | Stefano Babic <sbabic@denx.de> | 2022-02-19 16:46:54 +0300 |
commit | 2cb156e126842be26d8d4d69c2652ae1097e5b9b (patch) | |
tree | b4da19a7ac72e1732a34c21819f7e3248feb96e4 /include | |
parent | d7d042e8b62d753c8b4fc4bbd1e3969448ed41a1 (diff) | |
download | u-boot-2cb156e126842be26d8d4d69c2652ae1097e5b9b.tar.xz |
board: gateworks: venice: add imx8mn-gw7902 support
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC
To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/imx8mn_venice.h | 105 |
1 files changed, 105 insertions, 0 deletions
diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h new file mode 100644 index 0000000000..e7bfcd70af --- /dev/null +++ b/include/configs/imx8mn_venice.h @@ -0,0 +1,105 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2022 Gateworks Corporation + */ + +#ifndef __IMX8MM_VENICE_H +#define __IMX8MM_VENICE_H + +#include <asm/arch/imx-regs.h> +#include <linux/sizes.h> + +#define CONFIG_SPL_MAX_SIZE (148 * 1024) +#define CONFIG_SYS_MONITOR_LEN SZ_512K +#define CONFIG_SYS_UBOOT_BASE \ + (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_STACK 0x980000 +#define CONFIG_SPL_BSS_START_ADDR 0x950000 +#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ + +/* For RAW image gives a error info not panic */ +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE +#endif + +#define MEM_LAYOUT_ENV_SETTINGS \ + "fdt_addr_r=0x44000000\0" \ + "kernel_addr_r=0x42000000\0" \ + "ramdisk_addr_r=0x46400000\0" \ + "scriptaddr=0x46000000\0" + +/* Enable Distro Boot */ +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 2) \ + func(DHCP, dhcp, na) +#include <config_distro_bootcmd.h> +#undef CONFIG_ISO_PARTITION +#else +#define BOOTENV +#endif + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + BOOTENV \ + MEM_LAYOUT_ENV_SETTINGS \ + "script=boot.scr\0" \ + "bootm_size=0x10000000\0" \ + "dev=2\0" \ + "preboot=gsc wd-disable\0" \ + "console=ttymxc1,115200\0" \ + "update_firmware=" \ + "tftpboot $loadaddr $image && " \ + "setexpr blkcnt $filesize + 0x1ff && " \ + "setexpr blkcnt $blkcnt / 0x200 && " \ + "mmc dev $dev && " \ + "mmc write $loadaddr 0x40 $blkcnt\0" \ + "boot_net=" \ + "tftpboot $kernel_addr_r $image && " \ + "booti $kernel_addr_r - $fdtcontroladdr\0" \ + "update_rootfs=" \ + "tftpboot $loadaddr $image && " \ + "gzwrite mmc $dev $loadaddr $filesize 100000 1000000\0" \ + "update_all=" \ + "tftpboot $loadaddr $image && " \ + "gzwrite mmc $dev $loadaddr $filesize\0" \ + "erase_env=mmc dev $dev; mmc erase 0x7f08 0x40\0" + +#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_SYS_SDRAM_BASE 0x40000000 + +/* SDRAM configuration */ +#define PHYS_SDRAM 0x40000000 +#define PHYS_SDRAM_SIZE SZ_1G +#define CONFIG_SYS_BOOTM_LEN SZ_256M + +/* UART */ +#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR + +/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE SZ_2K +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +/* USDHC */ +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +/* FEC */ +#define CONFIG_ETHPRIME "eth0" +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_FEC_MXC_PHYADDR 0 +#define FEC_QUIRK_ENET_MAC + +#endif |