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authorTom Rini <trini@konsulko.com>2023-07-19 14:59:34 +0300
committerTom Rini <trini@konsulko.com>2023-07-19 14:59:34 +0300
commit5dcfc99b2b17fa1497adea47a50bf7c7a6ba5709 (patch)
tree1aa4938c73f78354cbd1ba18a195dc62ac2111e4 /include
parent6f1b951500707e46f2920c0034856ada018aabcb (diff)
parent6d249769c5249774ea0e6b218279d9415108da35 (diff)
downloadu-boot-5dcfc99b2b17fa1497adea47a50bf7c7a6ba5709.tar.xz
Merge tag 'fsl-qoriq-2023-7-13' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Enable DM_SERIAL for T2080RDB, T4240RDB, T1042D4RDB, T1024RDB
Diffstat (limited to 'include')
-rw-r--r--include/configs/T102xRDB.h4
-rw-r--r--include/configs/T104xRDB.h4
-rw-r--r--include/configs/T208xRDB.h4
-rw-r--r--include/configs/T4240RDB.h4
4 files changed, 12 insertions, 4 deletions
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 7ee46abffd..284291af2f 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020-2021 NXP
+ * Copyright 2020-2023 NXP
*/
/*
@@ -283,7 +283,9 @@
#define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/* Serial Port */
+#if !CONFIG_IS_ENABLED(DM_SERIAL)
#define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2)
+#endif
#define CFG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index f196bd76e6..01db298f38 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020-2021 NXP
+ * Copyright 2020-2023 NXP
*/
#ifndef __CONFIG_H
@@ -238,7 +238,9 @@
* open - index 2
* shorted - index 1
*/
+#if !CONFIG_IS_ENABLED(DM_SERIAL)
#define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2)
+#endif
#define CFG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index f213d2de77..0b9dde3e0e 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020-2021 NXP
+ * Copyright 2020-2023 NXP
*/
/*
@@ -215,7 +215,9 @@
/*
* Serial Port
*/
+#if !CONFIG_IS_ENABLED(DM_SERIAL)
#define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2)
+#endif
#define CFG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
#define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR+0x11C500)
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 506f1b7e26..78e136224e 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020-2021 NXP
+ * Copyright 2020-2023 NXP
*/
/*
@@ -77,7 +77,9 @@
* open - index 2
* shorted - index 1
*/
+#if !CONFIG_IS_ENABLED(DM_SERIAL)
#define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2)
+#endif
#define CFG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}