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authorTom Rini <trini@konsulko.com>2022-05-21 18:26:27 +0300
committerTom Rini <trini@konsulko.com>2022-06-06 19:09:12 +0300
commit6074a536d502f638b19507536b41213c5c119e46 (patch)
tree0f54b71c68c901983337797655b54128c3e10b23 /include
parent66bda092cf2af51f2731991fe7d2d14de8aa32fa (diff)
downloadu-boot-6074a536d502f638b19507536b41213c5c119e46.tar.xz
ppc / layerscape: Clean up CONFIG_SYS_CCSR_DO_NOT_RELOCATE usage
A number of PowerPC platforms define this, for SPL. To move this to Kconfig, it needs to be CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE, so use CONFIG_IS_ENABLED() to check for usage. A number of layerscape platforms bring this logic from PowerPC, but only need a small part of it, for the fman driver. Remove their unused portion at least. Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/P1010RDB.h5
-rw-r--r--include/configs/T102xRDB.h3
-rw-r--r--include/configs/T104xRDB.h3
-rw-r--r--include/configs/T208xQDS.h3
-rw-r--r--include/configs/T208xRDB.h3
-rw-r--r--include/configs/T4240RDB.h3
-rw-r--r--include/configs/p1_p2_rdb_pc.h6
-rw-r--r--include/mpc85xx.h4
8 files changed, 2 insertions, 28 deletions
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 3b7a492512..734c33bd6a 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -189,11 +189,6 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_SYS_CCSRBAR 0xffe00000
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
-/* Don't relocate CCSRBAR while in NAND_SPL */
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#endif
-
/*
* Memory map
*
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index c912062ce4..fcc31a0401 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -23,10 +23,7 @@
#ifdef CONFIG_RAMBOOT_PBL
#define RESET_VECTOR_OFFSET 0x27FFC
#define BOOT_PAGE_OFFSET 0x27000
-#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
-#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#endif
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 81b820ee6c..9f7ba9bd80 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -15,10 +15,7 @@
#include <asm/config_mpc85xx.h>
#ifdef CONFIG_RAMBOOT_PBL
-#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
-#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#endif
#define RESET_VECTOR_OFFSET 0x27FFC
#define BOOT_PAGE_OFFSET 0x27000
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index a18f44caa3..10bbf6e76f 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -31,10 +31,7 @@
#ifdef CONFIG_RAMBOOT_PBL
#define RESET_VECTOR_OFFSET 0x27FFC
#define BOOT_PAGE_OFFSET 0x27000
-#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
-#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#endif
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 96a8ad102b..a186ae3304 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -26,10 +26,7 @@
#ifdef CONFIG_RAMBOOT_PBL
#define RESET_VECTOR_OFFSET 0x27FFC
#define BOOT_PAGE_OFFSET 0x27000
-#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
-#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#endif
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 6dd43340d6..c565e94023 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -36,10 +36,7 @@
#endif
#endif
-#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
-#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#endif
#endif
#endif /* CONFIG_RAMBOOT_PBL */
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 755775f556..2f65afe38b 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -139,12 +139,6 @@
#define CONFIG_SYS_CCSRBAR 0xffe00000
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
-/* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
- SPL code*/
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#endif
-
/* DDR Setup */
#define CONFIG_SYS_DDR_RAW_TIMING
#define CONFIG_SYS_SPD_BUS_NUM 1
diff --git a/include/mpc85xx.h b/include/mpc85xx.h
index 2c69a60de6..053b68a10a 100644
--- a/include/mpc85xx.h
+++ b/include/mpc85xx.h
@@ -26,7 +26,7 @@
* Define default values for some CCSR macros to make header files cleaner*
*
* To completely disable CCSR relocation in a board header file, define
- * CONFIG_SYS_CCSR_DO_NOT_RELOCATE. This will force CONFIG_SYS_CCSRBAR_PHYS
+ * CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE. This will force CONFIG_SYS_CCSRBAR_PHYS
* to a value that is the same as CONFIG_SYS_CCSRBAR.
*/
@@ -35,7 +35,7 @@
CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead."
#endif
-#ifdef CONFIG_SYS_CCSR_DO_NOT_RELOCATE
+#if CONFIG_IS_ENABLED(SYS_CCSR_DO_NOT_RELOCATE)
#undef CONFIG_SYS_CCSRBAR_PHYS_HIGH
#undef CONFIG_SYS_CCSRBAR_PHYS_LOW
#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0