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authorSean Anderson <seanga2@gmail.com>2020-06-24 13:41:09 +0300
committerAndes <uboot@andestech.com>2020-07-01 10:01:21 +0300
commit019ef9a3f32642abbf924931ecc9487300e74530 (patch)
tree4a592a78ca596120cabdb2de8838df947568a9a9 /include
parent675d79073cc347ba72567668da69aebd1d1915fa (diff)
downloadu-boot-019ef9a3f32642abbf924931ecc9487300e74530.tar.xz
clk: Add K210 pll support
This pll code is primarily based on the code from the kendryte standalone sdk in lib/drivers/sysctl.c. k210_pll_calc_config is roughly analogous to the algorithm used to set the pll frequency, but it has been completely rewritten to be fixed-point based. Signed-off-by: Sean Anderson <seanga2@gmail.com> CC: Lukasz Majewski <lukma@denx.de>
Diffstat (limited to 'include')
-rw-r--r--include/kendryte/pll.h57
-rw-r--r--include/test/export.h16
2 files changed, 73 insertions, 0 deletions
diff --git a/include/kendryte/pll.h b/include/kendryte/pll.h
new file mode 100644
index 0000000000..c8e3200799
--- /dev/null
+++ b/include/kendryte/pll.h
@@ -0,0 +1,57 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
+ */
+#ifndef K210_PLL_H
+#define K210_PLL_H
+
+#include <clk.h>
+#include <test/export.h>
+
+#define K210_PLL_CLKR GENMASK(3, 0)
+#define K210_PLL_CLKF GENMASK(9, 4)
+#define K210_PLL_CLKOD GENMASK(13, 10) /* Output Divider */
+#define K210_PLL_BWADJ GENMASK(19, 14) /* BandWidth Adjust */
+#define K210_PLL_RESET BIT(20)
+#define K210_PLL_PWRD BIT(21) /* PoWeReD */
+#define K210_PLL_INTFB BIT(22) /* Internal FeedBack */
+#define K210_PLL_BYPASS BIT(23)
+#define K210_PLL_TEST BIT(24)
+#define K210_PLL_EN BIT(25)
+#define K210_PLL_TEST_EN BIT(26)
+
+#define K210_PLL_LOCK 0
+#define K210_PLL_CLEAR_SLIP 2
+#define K210_PLL_TEST_OUT 3
+
+struct k210_pll {
+ struct clk clk;
+ void __iomem *reg; /* Base PLL register */
+ void __iomem *lock; /* Common PLL lock register */
+ u8 shift; /* Offset of bits in lock register */
+ u8 width; /* Width of lock bits to test against */
+};
+
+#define to_k210_pll(_clk) container_of(_clk, struct k210_pll, clk)
+
+struct k210_pll_config {
+ u8 r;
+ u8 f;
+ u8 od;
+};
+
+#ifdef CONFIG_UNIT_TEST
+TEST_STATIC int k210_pll_calc_config(u32 rate, u32 rate_in,
+ struct k210_pll_config *best);
+#define nop()
+#endif
+
+extern const struct clk_ops k210_pll_ops;
+
+struct clk *k210_register_pll_struct(const char *name, const char *parent_name,
+ struct k210_pll *pll);
+struct clk *k210_register_pll(const char *name, const char *parent_name,
+ void __iomem *reg, void __iomem *lock, u8 shift,
+ u8 width);
+
+#endif /* K210_PLL_H */
diff --git a/include/test/export.h b/include/test/export.h
new file mode 100644
index 0000000000..afc755a8ff
--- /dev/null
+++ b/include/test/export.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
+ */
+
+#ifndef TEST_EXPORT_H
+#define TEST_EXPORT_H
+
+/* Declare something static, unless we are doing unit tests */
+#ifdef CONFIG_UNIT_TEST
+#define TEST_STATIC
+#else
+#define TEST_STATIC static
+#endif
+
+#endif /* TEST_EXPORT_H */