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author | Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> | 2020-07-15 20:23:02 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2020-07-29 17:37:11 +0300 |
commit | 3ce080862576c482a8b128a36869cc49a4b3bef1 (patch) | |
tree | 3f9063810103b96898cf376954b8f91e0e89ed93 /include | |
parent | 7bd238b92ee1e9cf1aeaa5554f56ec4127e11b6d (diff) | |
download | u-boot-3ce080862576c482a8b128a36869cc49a4b3bef1.tar.xz |
dt-bindings: pinctrl: add ns3 pads definition
Add NS3 pads definitions.
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h b/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h new file mode 100644 index 0000000000..81ebd58ca5 --- /dev/null +++ b/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Broadcom. + */ + +#ifndef __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__ +#define __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__ + +/* Alternate functions available in MUX controller */ +#define MODE_NITRO 0 +#define MODE_NAND 1 +#define MODE_PNOR 2 +#define MODE_GPIO 3 + +/* Pad configuration attribute */ +#define PAD_SLEW_RATE_ENA BIT(0) +#define PAD_SLEW_RATE_ENA_MASK BIT(0) + +#define PAD_DRIVE_STRENGTH_2_MA (0 << 1) +#define PAD_DRIVE_STRENGTH_4_MA BIT(1) +#define PAD_DRIVE_STRENGTH_6_MA (2 << 1) +#define PAD_DRIVE_STRENGTH_8_MA (3 << 1) +#define PAD_DRIVE_STRENGTH_10_MA (4 << 1) +#define PAD_DRIVE_STRENGTH_12_MA (5 << 1) +#define PAD_DRIVE_STRENGTH_14_MA (6 << 1) +#define PAD_DRIVE_STRENGTH_16_MA (7 << 1) +#define PAD_DRIVE_STRENGTH_MASK (7 << 1) + +#define PAD_PULL_UP_ENA BIT(4) +#define PAD_PULL_UP_ENA_MASK BIT(4) + +#define PAD_PULL_DOWN_ENA BIT(5) +#define PAD_PULL_DOWN_ENA_MASK BIT(5) + +#define PAD_INPUT_PATH_DIS BIT(6) +#define PAD_INPUT_PATH_DIS_MASK BIT(6) + +#define PAD_HYSTERESIS_ENA BIT(7) +#define PAD_HYSTERESIS_ENA_MASK BIT(7) + +#endif |