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| author | Sam Shih <sam.shih@mediatek.com> | 2020-01-10 11:30:33 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-01-16 17:39:45 +0300 |
| commit | c7fbc62082de1f04ed230f92738d98fe1a424c40 (patch) | |
| tree | 0bb0dd4f7a8a20bb8ab80f63568fcf1adb447e67 /include | |
| parent | 25273dbd570541214ec6d687a4d6f3bfcdaa0441 (diff) | |
| download | u-boot-c7fbc62082de1f04ed230f92738d98fe1a424c40.tar.xz | |
Add support for MT7622 reference board
This adds a general board file based on MT7622 SoCs from MediaTek.
This commit is adding the basic boot support for the MT7622 rfb.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/mt7622.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h new file mode 100644 index 0000000000..dfd506ed24 --- /dev/null +++ b/include/configs/mt7622.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Configuration for MediaTek MT7629 SoC + * + * Copyright (C) 2019 MediaTek Inc. + * Author: Sam Shih <sam.shih@mediatek.com> + */ + +#ifndef __MT7622_H +#define __MT7622_H + +#include <linux/sizes.h> + +#define CONFIG_SYS_MAXARGS 8 +#define CONFIG_SYS_BOOTM_LEN SZ_64M +#define CONFIG_SYS_CBSIZE SZ_1K +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN SZ_4M +#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M + +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_SYS_MMC_ENV_DEV 0 + +/* Uboot definition */ +#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE + +/* SPL -> Uboot */ +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \ + GENERATED_GBL_DATA_SIZE) +/* UBoot -> Kernel */ +#define CONFIG_LOADADDR 0x4007ff28 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* DRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x40000000 + +/* Ethernet */ +#define CONFIG_IPADDR 192.168.1.1 +#define CONFIG_SERVERIP 192.168.1.3 + +#endif |