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| author | Weijie Gao <weijie.gao@mediatek.com> | 2021-01-12 08:44:11 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-01-18 23:23:06 +0300 |
| commit | ac7a51c0e48f2aa81ae20caf8d6b9fad976675cd (patch) | |
| tree | 912603265aac7ae1fb843c02986dbbb0835b7060 /net/eth-uclass.c | |
| parent | 63779b240711cb1a0761bbceb323f5e9558394cc (diff) | |
| download | u-boot-ac7a51c0e48f2aa81ae20caf8d6b9fad976675cd.tar.xz | |
dts: mt7622: use accurate clock source fot mtk_timer
The input system clock for mt7622 timer is 10MHz and can be retrieved
through the clk driver.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Diffstat (limited to 'net/eth-uclass.c')
0 files changed, 0 insertions, 0 deletions