powerpc: remove 4xx support

There was for long time no activity in the 4xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 4xx,
so remove it.

Signed-off-by: Heiko Schocher <hs@denx.de>

7 files changed, 0 insertions, 1272 deletions

diff --git a/post/board/lwmon5/Makefile b/post/board/lwmon5/Makefile
deleted file mode 100644
index 76262c76bc..0000000000
--- a/post/board/lwmon5/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
-#
-# Developed for DENX Software Engineering GmbH
-#
-# SPDX-License-Identifier:	GPL-2.0+
-
-obj-y += sysmon.o watchdog.o dspic.o fpga.o dsp.o gdc.o
diff --git a/post/board/lwmon5/dsp.c b/post/board/lwmon5/dsp.c
deleted file mode 100644
index 2f55f01ceb..0000000000
--- a/post/board/lwmon5/dsp.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
- *
- * Developed for DENX Software Engineering GmbH
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-
-#include <post.h>
-
-#if CONFIG_POST & CONFIG_SYS_POST_DSP
-#include <asm/io.h>
-
-/* This test verifies DSP status bits in FPGA */
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define DSP_STATUS_REG		0xC4000008
-#define FPGA_STATUS_REG		0xC400000C
-
-int dsp_post_test(int flags)
-{
-	uint   old_value;
-	uint   read_value;
-	int    ret;
-
-	/* momorize fpga status */
-	old_value = in_be32((void *)FPGA_STATUS_REG);
-	/* enable outputs */
-	out_be32((void *)FPGA_STATUS_REG, 0x30);
-
-	/* generate sync signal */
-	out_be32((void *)DSP_STATUS_REG, 0x300);
-	udelay(5);
-	out_be32((void *)DSP_STATUS_REG, 0);
-	udelay(500);
-
-	/* read status */
-	ret = 0;
-	read_value = in_be32((void *)DSP_STATUS_REG) & 0x3;
-	if (read_value != 0x03) {
-		post_log("\nDSP status read %08X\n", read_value);
-		ret = 1;
-	}
-
-	/* restore fpga status */
-	out_be32((void *)FPGA_STATUS_REG, old_value);
-
-	return ret;
-}
-
-#endif /* CONFIG_POST & CONFIG_SYS_POST_DSP */
diff --git a/post/board/lwmon5/dspic.c b/post/board/lwmon5/dspic.c
deleted file mode 100644
index c5ed190227..0000000000
--- a/post/board/lwmon5/dspic.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
- *
- * Developed for DENX Software Engineering GmbH
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-
-/* There are two tests for dsPIC currently implemented:
- * 1. dsPIC ready test. Done in board_early_init_f(). Only result verified here.
- * 2. dsPIC POST result test.  This test gets dsPIC POST codes and version.
- */
-
-#include <post.h>
-
-#include <i2c.h>
-#include <asm/io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define DSPIC_POST_ERROR_REG	0x800
-#define DSPIC_SYS_ERROR_REG	0x802
-#define DSPIC_SYS_VERSION_REG	0x804
-#define DSPIC_FW_VERSION_REG	0x808
-
-#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
-
-/* Verify that dsPIC ready test done early at hw init passed ok */
-int dspic_init_post_test(int flags)
-{
-	if (in_be32((void *)CONFIG_SYS_DSPIC_TEST_ADDR) &
-	    CONFIG_SYS_DSPIC_TEST_MASK) {
-		post_log("dsPIC init test failed\n");
-		return 1;
-	}
-
-	return 0;
-}
-
-#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC1 */
-
-#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
-/* Read a register from the dsPIC. */
-int dspic_read(ushort reg, ushort *data)
-{
-	uchar buf[sizeof(*data)];
-	int rval;
-
-	if (i2c_read(CONFIG_SYS_I2C_DSPIC_IO_ADDR, reg, 2, buf, 2))
-		return -1;
-	rval = i2c_read(CONFIG_SYS_I2C_DSPIC_IO_ADDR, reg, sizeof(reg),
-			buf, sizeof(*data));
-	*data = (buf[0] << 8) | buf[1];
-
-	return rval;
-}
-
-/* Verify error codes regs, display version */
-int dspic_post_test(int flags)
-{
-	ushort data;
-	int ret = 0;
-
-	post_log("\n");
-
-	/* read dspic FW-Version */
-	if (dspic_read(DSPIC_FW_VERSION_REG, &data)) {
-		post_log("dsPIC: failed read FW-Version\n");
-		ret = 1;
-	} else {
-		post_log("dsPIC FW-Version:  %u.%u\n",
-			 (data >> 8) & 0xFF, data & 0xFF);
-	}
-
-	/* read dspic SYS-Version */
-	if (dspic_read(DSPIC_SYS_VERSION_REG, &data)) {
-		post_log("dsPIC: failed read version\n");
-		ret = 1;
-	} else {
-		post_log("dsPIC SYS-Version: %u.%u\n",
-			 (data >> 8) & 0xFF, data & 0xFF);
-	}
-
-	/* read dspic POST error code */
-	if (dspic_read(DSPIC_POST_ERROR_REG, &data)) {
-		post_log("dsPIC: failed read POST code\n");
-		ret = 1;
-	} else {
-		post_log("dsPIC POST-ERROR   code:  0x%04X\n", data);
-	}
-
-	/* read dspic SYS error code */
-	if ((data = dspic_read(DSPIC_SYS_ERROR_REG, &data))) {
-		post_log("dsPIC: failed read system error\n");
-		ret = 1;
-	} else {
-		post_log("dsPIC SYS-ERROR    code:  0x%04X\n", data);
-	}
-
-	return ret;
-}
-
-#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC2 */
diff --git a/post/board/lwmon5/fpga.c b/post/board/lwmon5/fpga.c
deleted file mode 100644
index 1a72823968..0000000000
--- a/post/board/lwmon5/fpga.c
+++ /dev/null
@@ -1,344 +0,0 @@
-/*
- * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
- *
- * Developed for DENX Software Engineering GmbH
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-
-/* This test performs testing of FPGA SCRATCH register,
- * gets FPGA version and run get_ram_size() on FPGA memory
- */
-
-#include <post.h>
-#include <watchdog.h>
-#include <asm/io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define FPGA_SCRATCH_REG	0xC4000050
-#define FPGA_VERSION_REG	0xC4000040
-#define FPGA_RAM_START		0xC4200000
-#define FPGA_RAM_END		0xC4203FFF
-#define FPGA_STAT		0xC400000C
-#define FPGA_BUFFER		0x00800000
-#define FPGA_RAM_SIZE		(FPGA_RAM_END - FPGA_RAM_START + 1)
-
-#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
-
-const static unsigned long pattern[] = {
-	0xffffffff,
-	0xaaaaaaaa,
-	0xcccccccc,
-	0xf0f0f0f0,
-	0xff00ff00,
-	0xffff0000,
-	0x0000ffff,
-	0x00ff00ff,
-	0x0f0f0f0f,
-	0x33333333,
-	0x55555555,
-	0x00000000,
-};
-
-const static unsigned long otherpattern = 0x01234567;
-
-static int one_scratch_test(uint value)
-{
-	uint read_value;
-	int ret = 0;
-
-	out_be32((void *)FPGA_SCRATCH_REG, value);
-	/* read other location (protect against data lines capacity) */
-	ret = in_be16((void *)FPGA_VERSION_REG);
-	/* verify test pattern */
-	read_value = in_be32((void *)FPGA_SCRATCH_REG);
-	if (read_value != value) {
-		post_log("FPGA SCRATCH test failed write %08X, read %08X\n",
-			 value, read_value);
-		ret = -1;
-	}
-
-	return ret;
-}
-
-static int fpga_post_test1(ulong *start, ulong size, ulong val)
-{
-	int ret = 0;
-	ulong i = 0;
-	ulong *mem = start;
-	ulong readback;
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		mem[i] = val;
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		readback = mem[i];
-		if (readback != val) {
-			post_log("FPGA Memory error at %08x, "
-				 "wrote %08x, read %08x !\n",
-				 mem + i, val, readback);
-			ret = -1;
-			break;
-		}
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-	return ret;
-}
-
-static int fpga_post_test2(ulong *start, ulong size)
-{
-	int ret = 0;
-	ulong i = 0;
-	ulong *mem = start;
-	ulong readback;
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		mem[i] = 1 << (i % 32);
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		readback = mem[i];
-		if (readback != 1 << (i % 32)) {
-			post_log("FPGA Memory error at %08x, "
-				 "wrote %08x, read %08x !\n",
-				 mem + i, 1 << (i % 32), readback);
-			ret = -1;
-			break;
-		}
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	return ret;
-}
-
-static int fpga_post_test3(ulong *start, ulong size)
-{
-	int ret = 0;
-	ulong i = 0;
-	ulong *mem = start;
-	ulong readback;
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		mem[i] = i;
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		readback = mem[i];
-		if (readback != i) {
-			post_log("FPGA Memory error at %08x, "
-				 "wrote %08x, read %08x !\n",
-				 mem + i, i, readback);
-			ret = -1;
-			break;
-		}
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	return ret;
-}
-
-static int fpga_post_test4(ulong *start, ulong size)
-{
-	int ret = 0;
-	ulong i = 0;
-	ulong *mem = start;
-	ulong readback;
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		mem[i] = ~i;
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		readback = mem[i];
-		if (readback != ~i) {
-			post_log("FPGA Memory error at %08x, "
-				 "wrote %08x, read %08x !\n",
-				 mem + i, ~i, readback);
-			ret = -1;
-			break;
-		}
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	return ret;
-}
-
-/* FPGA Memory-pattern-test */
-static int fpga_mem_test(void)
-{
-	int ret = 0;
-	ulong* start = (ulong *)FPGA_RAM_START;
-	ulong  size  = FPGA_RAM_SIZE;
-
-	if (ret == 0)
-		ret = fpga_post_test1(start, size, 0x00000000);
-
-	if (ret == 0)
-		ret = fpga_post_test1(start, size, 0xffffffff);
-
-	if (ret == 0)
-		ret = fpga_post_test1(start, size, 0x55555555);
-
-	if (ret == 0)
-		ret = fpga_post_test1(start, size, 0xaaaaaaaa);
-
-	WATCHDOG_RESET();
-
-	if (ret == 0)
-		ret = fpga_post_test2(start, size);
-
-	if (ret == 0)
-		ret = fpga_post_test3(start, size);
-
-	if (ret == 0)
-		ret = fpga_post_test4(start, size);
-
-	return ret;
-}
-
-/* Verify FPGA addresslines */
-static int fpga_post_addrline(ulong *address, ulong *base, ulong size)
-{
-	unsigned long *target;
-	unsigned long *end;
-	unsigned long readback;
-	unsigned long xor;
-	int ret = 0;
-
-	end = (ulong *)((ulong)base + size);
-	xor = 0;
-
-	for (xor = sizeof(ulong); xor > 0; xor <<= 1) {
-		target = (ulong*)((ulong)address ^ xor);
-		if ((target >= base) && (target < end)) {
-			*address = ~*target;
-			readback = *target;
-
-			if (readback == *address) {
-				post_log("Memory (address line) error at %08x"
-					 "XOR value %08x !\n",
-					 address, target, xor);
-				ret = -1;
-				break;
-			}
-		}
-	}
-
-	return ret;
-}
-
-/* Verify FPGA addresslines */
-static int fpga_post_dataline(ulong *address)
-{
-	unsigned long temp32 = 0;
-	int i = 0;
-	int ret = 0;
-
-	for (i = 0; i < ARRAY_SIZE(pattern); i++) {
-		*address = pattern[i];
-		/*
-		 * Put a different pattern on the data lines: otherwise they
-		 * may float long enough to read back what we wrote.
-		 */
-		*(address + 1) = otherpattern;
-		temp32 = *address;
-
-		if (temp32 != pattern[i]){
-			post_log("Memory (date line) error at %08x, "
-				 "wrote %08x, read %08x !\n",
-				 address, pattern[i], temp32);
-			ret = 1;
-		}
-	}
-
-	return ret;
-}
-
-/* Verify FPGA, get version & memory size */
-int fpga_post_test(int flags)
-{
-	uint   old_value;
-	uint   version;
-	uint   read_value;
-	int    ret = 0;
-
-	post_log("\n");
-	old_value = in_be32((void *)FPGA_SCRATCH_REG);
-
-	if (one_scratch_test(0x55555555))
-		ret = 1;
-	if (one_scratch_test(0xAAAAAAAA))
-		ret = 1;
-
-	out_be32((void *)FPGA_SCRATCH_REG, old_value);
-
-	version = in_be32((void *)FPGA_VERSION_REG);
-	post_log("FPGA version %u.%u\n",
-		 (version >> 8) & 0xFF, version & 0xFF);
-
-	/* Enable write to FPGA RAM */
-	out_be32((void *)FPGA_STAT, in_be32((void *)FPGA_STAT) | 0x1000);
-
-	/* get RAM size */
-	read_value = get_ram_size((void *)CONFIG_SYS_FPGA_BASE_1, FPGA_RAM_SIZE);
-	post_log("FPGA RAM size %d bytes\n", read_value);
-	WATCHDOG_RESET();
-
-	/* copy fpga memory to DDR2 RAM*/
-	memcpy((void *)FPGA_BUFFER,(void *)FPGA_RAM_START, FPGA_RAM_SIZE);
-	WATCHDOG_RESET();
-
-	/* Test datalines */
-	if (fpga_post_dataline((ulong *)FPGA_RAM_START)) {
-		ret = 1;
-		goto out;
-	}
-	WATCHDOG_RESET();
-
-	/* Test addresslines */
-	if (fpga_post_addrline((ulong *)FPGA_RAM_START,
-			       (ulong *)FPGA_RAM_START, FPGA_RAM_SIZE)) {
-		ret = 1;
-		goto out;
-	}
-	WATCHDOG_RESET();
-	if (fpga_post_addrline((ulong *)FPGA_RAM_END - sizeof(long),
-			       (ulong *)FPGA_RAM_START, FPGA_RAM_SIZE)) {
-		ret = 1;
-		goto out;
-	}
-	WATCHDOG_RESET();
-
-	/* Memory Pattern Test */
-	if (fpga_mem_test()) {
-		ret = 1;
-		goto out;
-	}
-	WATCHDOG_RESET();
-
-	/* restore memory */
-	memcpy((void *)FPGA_RAM_START,(void *)FPGA_BUFFER, FPGA_RAM_SIZE);
-	WATCHDOG_RESET();
-
-out:
-	/* Disable write to RAM */
-	out_be32((void *)FPGA_STAT, in_be32((void *)FPGA_STAT) & 0xEFFF);
-	return ret;
-}
-
-#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC3 */
diff --git a/post/board/lwmon5/gdc.c b/post/board/lwmon5/gdc.c
deleted file mode 100644
index 9405e7d9ab..0000000000
--- a/post/board/lwmon5/gdc.c
+++ /dev/null
@@ -1,363 +0,0 @@
-/*
- * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
- *
- * Developed for DENX Software Engineering GmbH
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-
-/* This test attempts to verify board GDC. A scratch register tested, then
- * simple memory test (get_ram_size()) run over GDC memory.
- */
-
-#include <post.h>
-#include <watchdog.h>
-#include <asm/io.h>
-#include <video.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define GDC_SCRATCH_REG	0xC1FF8044
-#define GDC_VERSION_REG	0xC1FF8084
-#define GDC_HOST_BASE	0xC1FC0000
-#define GDC_RAM_START	0xC0000000
-#define GDC_RAM_END	(GDC_HOST_BASE - 1)
-#define GDC_RAM_SIZE	(GDC_RAM_END - GDC_RAM_START)
-
-#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
-
-const static unsigned long pattern[] = {
-	0xffffffff,
-	0xaaaaaaaa,
-	0xcccccccc,
-	0xf0f0f0f0,
-	0xff00ff00,
-	0xffff0000,
-	0x0000ffff,
-	0x00ff00ff,
-	0x0f0f0f0f,
-	0x33333333,
-	0x55555555,
-	0x00000000
-};
-
-const static unsigned long otherpattern = 0x01234567;
-
-/* test write/read og a given LIME Register */
-static int gdc_test_reg_one(uint value)
-{
-	uint read_value;
-
-	/* write test pattern */
-	out_be32((void *)GDC_SCRATCH_REG, value);
-	/* read other location (protect against data lines capacity) */
-	in_be32((void *)GDC_RAM_START);
-	/* verify test pattern */
-	read_value = in_be32((void *)GDC_SCRATCH_REG);
-	if (read_value != value) {
-		post_log("GDC SCRATCH test failed write %08X, read %08X\n",
-			 value, read_value);
-	}
-
-	return (read_value != value);
-}
-
-/* test with a given static 32 bit pattern in a given memory addressrange */
-static int gdc_post_test1(ulong *start, ulong size, ulong val)
-{
-	int ret = 0;
-	ulong i = 0;
-	ulong *mem = start;
-	ulong readback;
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		mem[i] = val;
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		readback = mem[i];
-		if (readback != val) {
-			post_log("GDC Memory error at %08x, "
-				 "wrote %08x, read %08x !\n",
-				 mem + i, val, readback);
-			ret = -1;
-			break;
-		}
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	return ret;
-}
-
-/* test with dynamic 32 bit pattern in a given memory addressrange */
-static int gdc_post_test2(ulong *start, ulong size)
-{
-	int ret = 0;
-	ulong i = 0;
-	ulong *mem = start;
-	ulong readback;
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		mem[i] = 1 << (i % 32);
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		readback = mem[i];
-		if (readback != 1 << (i % 32)) {
-			post_log("GDC Memory error at %08x, "
-				 "wrote %08x, read %08x !\n",
-				 mem + i, 1 << (i % 32), readback);
-			ret = -1;
-			break;
-		}
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	return ret;
-}
-
-/* test with dynamic 32 bit pattern in a given memory addressrange */
-static int gdc_post_test3(ulong *start, ulong size)
-{
-	int ret = 0;
-	ulong i = 0;
-	ulong *mem = start;
-	ulong readback;
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		mem[i] = i;
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		readback = mem[i];
-		if (readback != i) {
-			post_log("GDC Memory error at %08x, "
-				 "wrote %08x, read %08x !\n",
-				 mem + i, i, readback);
-			ret = -1;
-			break;
-		}
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	return ret;
-}
-
-/* test with dynamic 32 bit pattern in a given memory addressrange */
-static int gdc_post_test4(ulong *start, ulong size)
-{
-	int ret = 0;
-	ulong i = 0;
-	ulong *mem = start;
-	ulong readback;
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		mem[i] = ~i;
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	for (i = 0; i < size / sizeof(ulong); i++) {
-		readback = mem[i];
-		if (readback != ~i) {
-			post_log("GDC Memory error at %08x, "
-				 "wrote %08x, read %08x !\n",
-				 mem + i, ~i, readback);
-			ret = -1;
-			break;
-		}
-		if (i % 1024 == 0)
-			WATCHDOG_RESET();
-	}
-
-	return ret;
-}
-
-/* do some patterntests in a given addressrange */
-int gdc_mem_test(ulong *start, ulong size)
-{
-	int ret = 0;
-
-	/*
-	 * check addressrange and do different static and dynamic
-	 * pattern tests with it.
-	 */
-	if (((void *)start) + size <= (void *)GDC_RAM_END) {
-		if (ret == 0)
-			ret = gdc_post_test1(start, size, 0x00000000);
-
-		if (ret == 0)
-			ret = gdc_post_test1(start, size, 0xffffffff);
-
-		if (ret == 0)
-			ret = gdc_post_test1(start, size, 0x55555555);
-
-		if (ret == 0)
-			ret = gdc_post_test1(start, size, 0xaaaaaaaa);
-
-		if (ret == 0)
-			ret = gdc_post_test2(start, size);
-
-		if (ret == 0)
-			ret = gdc_post_test3(start, size);
-
-		if (ret == 0)
-			ret = gdc_post_test4(start, size);
-	}
-
-	return ret;
-}
-
-/* test function of gdc memory addresslines*/
-static int gdc_post_addrline(ulong *address, ulong *base, ulong size)
-{
-	ulong *target;
-	ulong *end;
-	ulong readback = 0;
-	ulong xor = 0;
-	int ret = 0;
-
-	end = (ulong *)((ulong)base + size);
-
-	for (xor = sizeof(long); xor > 0; xor <<= 1) {
-		target = (ulong *)((ulong)address ^ xor);
-		if ((target >= base) && (target < end)) {
-			*address = ~*target;
-			readback = *target;
-		}
-
-		if (readback == *address) {
-			post_log("GDC Memory (address line) error at %08x"
-				 "XOR value %08x !\n",
-				 address, target , xor);
-			ret = -1;
-			break;
-		}
-	}
-
-	return ret;
-}
-
-static int gdc_post_dataline(ulong *address)
-{
-	unsigned long temp32 = 0;
-	int i = 0;
-	int ret = 0;
-
-	for (i = 0; i < ARRAY_SIZE(pattern); i++) {
-		*address = pattern[i];
-		/*
-		 * Put a different pattern on the data lines: otherwise they
-		 * may float long enough to read back what we wrote.
-		 */
-		*(address + 1) = otherpattern;
-		temp32 = *address;
-
-		if (temp32 != pattern[i]){
-			post_log("GDC Memory (date line) error at %08x, "
-				 "wrote %08x, read %08x !\n",
-				 address, pattern[i], temp32);
-			ret = 1;
-		}
-	}
-
-	return ret;
-}
-
-/* Verify GDC, get memory size, verify GDC memory */
-int gdc_post_test(int flags)
-{
-	uint   	old_value;
-	int 	i = 0;
-	int    	ret = 0;
-
-	post_log("\n");
-	old_value = in_be32((void *)GDC_SCRATCH_REG);
-
-	/*
-	 * GPIOC2 register behaviour: the LIME graphics processor has a
-	 * maximum of 5 GPIO ports that can be used in this hardware
-	 * configuration. Thus only the  bits  for these 5 GPIOs can be
-	 * activated in the GPIOC2 register. All other bits will always be
-	 * read as zero.
-	 */
-	if (gdc_test_reg_one(0x00150015))
-		ret = 1;
-	if (gdc_test_reg_one(0x000A000A))
-		ret = 1;
-
-	out_be32((void *)GDC_SCRATCH_REG, old_value);
-
-	old_value = in_be32((void *)GDC_VERSION_REG);
-	post_log("GDC chip version %u.%u, year %04X\n",
-		 (old_value >> 8) & 0xFF, old_value & 0xFF,
-		 (old_value >> 16) & 0xFFFF);
-
-	old_value = get_ram_size((void *)GDC_RAM_START,
-				 0x02000000);
-
-	debug("GDC RAM size (ist):  %d bytes\n", old_value);
-	debug("GDC RAM size (soll): %d bytes\n", GDC_RAM_SIZE);
-	post_log("GDC RAM size: %d bytes\n", old_value);
-
-	/* Test SDRAM datalines */
-	if (gdc_post_dataline((ulong *)GDC_RAM_START)) {
-		ret = 1;
-		goto out;
-	}
-	WATCHDOG_RESET();
-
-	/* Test SDRAM adresslines */
-	if (gdc_post_addrline((ulong *)GDC_RAM_START,
-			      (ulong *)GDC_RAM_START, GDC_RAM_SIZE)) {
-		ret = 1;
-		goto out;
-	}
-	WATCHDOG_RESET();
-	if (gdc_post_addrline((ulong *)GDC_RAM_END - sizeof(long),
-			      (ulong *)GDC_RAM_START, GDC_RAM_SIZE)) {
-		ret = 1;
-		goto out;
-	}
-	WATCHDOG_RESET();
-
-	/* memory pattern test */
-	debug("GDC Memory test (flags %8x:%8x)\n", flags,
-	      POST_SLOWTEST | POST_MANUAL);
-
-	if (flags & POST_MANUAL) {
-		debug("Full memory test\n");
-		if (gdc_mem_test((ulong *)GDC_RAM_START, GDC_RAM_SIZE)) {
-			ret = 1;
-			goto out;
-		}
-		/* load splashscreen again */
-	} else {
-		debug("smart memory test\n");
-		for (i = 0; i < (GDC_RAM_SIZE >> 20) && ret == 0; i++) {
-			if (ret == 0)
-				ret = gdc_mem_test((ulong *)(GDC_RAM_START +
-							     (i << 20)),
-						   0x800);
-			if (ret == 0)
-				ret = gdc_mem_test((ulong *)(GDC_RAM_START +
-							     (i << 20) + 0xff800),
-						   0x800);
-		}
-	}
-	WATCHDOG_RESET();
-
-out:
-	return ret;
-}
-#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC4 */
diff --git a/post/board/lwmon5/sysmon.c b/post/board/lwmon5/sysmon.c
deleted file mode 100644
index cca1a26235..0000000000
--- a/post/board/lwmon5/sysmon.c
+++ /dev/null
@@ -1,277 +0,0 @@
-/*
- * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
- *
- * Developed for DENX Software Engineering GmbH
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <post.h>
-#include <common.h>
-
-/*
- * SYSMON test
- *
- * This test performs the system hardware monitoring.
- * The test passes when all the following voltages and temperatures
- * are within allowed ranges:
- *
- * Temperature		  -40 .. +90 C
- * +5V			+4.50 .. +5.50 V
- * +5V standby		+3.50 .. +5.50 V
- *
- * LCD backlight is not enabled if temperature values are not within
- * allowed ranges (-30 .. + 80). The brightness of backlite can be
- * controlled by setting "brightness" environment variable. Default value is 50%
- *
- * See the list of all parameters in the sysmon_table below
- */
-
-#include <post.h>
-#include <watchdog.h>
-#include <i2c.h>
-
-#if defined(CONFIG_VIDEO)
-#include <mb862xx.h>
-#endif
-
-#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* from dspic.c */
-extern int dspic_read(ushort reg, ushort *data);
-
-#define REG_TEMPERATURE			0x12BC
-#define REG_VOLTAGE_5V			0x12CA
-#define REG_VOLTAGE_5V_STANDBY		0x12C6
-
-#define TEMPERATURE_MIN			(-40)	/* degr. C */
-#define TEMPERATURE_MAX			(+90)	/* degr. C */
-#define TEMPERATURE_DISPLAY_MIN		(-35)	/* degr. C */
-#define TEMPERATURE_DISPLAY_MAX		(+85)	/* degr. C */
-
-#define VOLTAGE_5V_MIN			(+4500)	/* mV */
-#define VOLTAGE_5V_MAX			(+5500)	/* mV */
-
-#define VOLTAGE_5V_STANDBY_MIN		(+3500)	/* mV */
-#define VOLTAGE_5V_STANDBY_MAX		(+5500)	/* mV */
-
-typedef struct sysmon_s sysmon_t;
-typedef struct sysmon_table_s sysmon_table_t;
-
-static void sysmon_dspic_init(sysmon_t *this);
-static int sysmon_dspic_read(sysmon_t *this, uint addr, int *val);
-static int sysmon_dspic_read_sgn(sysmon_t *this, uint addr,  int *val);
-static void sysmon_backlight_disable(sysmon_table_t *this);
-
-struct sysmon_s {
-	uchar	chip;
-	void	(*init)(sysmon_t *);
-	int	(*read)(sysmon_t *, uint, int *);
-};
-
-static sysmon_t sysmon_dspic = {
-	CONFIG_SYS_I2C_DSPIC_IO_ADDR,
-	sysmon_dspic_init,
-	sysmon_dspic_read
-};
-
-static sysmon_t sysmon_dspic_sgn = {
-	CONFIG_SYS_I2C_DSPIC_IO_ADDR,
-	sysmon_dspic_init,
-	sysmon_dspic_read_sgn
-};
-
-static sysmon_t *sysmon_list[] = {
-	&sysmon_dspic,
-	NULL
-};
-
-struct sysmon_table_s {
-	char		*name;
-	char		*unit_name;
-	sysmon_t	*sysmon;
-	void		(*exec_before)(sysmon_table_t *);
-	void		(*exec_after)(sysmon_table_t *);
-
-	int		unit_precision;
-	int		unit_div;
-	int		unit_min;
-	int		unit_max;
-	uint		val_mask;
-	uint		val_min;
-	uint		val_max;
-	int		val_valid;
-	uint		val_min_alt;
-	uint		val_max_alt;
-	int		val_valid_alt;
-	uint		addr;
-};
-
-static sysmon_table_t sysmon_table[] = {
-	{
-		"Temperature", " C", &sysmon_dspic, NULL, sysmon_backlight_disable,
-		1, 1, -32768, 32767, 0xFFFF,
-		0x8000 + TEMPERATURE_MIN,	  0x8000 + TEMPERATURE_MAX,	    0,
-		0x8000 + TEMPERATURE_DISPLAY_MIN, 0x8000 + TEMPERATURE_DISPLAY_MAX, 0,
-		REG_TEMPERATURE,
-	},
-
-	{
-		"+ 5 V", "V", &sysmon_dspic, NULL, NULL,
-		100, 1000, -0x8000, 0x7FFF, 0xFFFF,
-		0x8000 + VOLTAGE_5V_MIN, 0x8000 + VOLTAGE_5V_MAX, 0,
-		0x8000 + VOLTAGE_5V_MIN, 0x8000 + VOLTAGE_5V_MAX, 0,
-		REG_VOLTAGE_5V,
-	},
-
-	{
-		"+ 5 V standby", "V", &sysmon_dspic, NULL, NULL,
-		100, 1000, -0x8000, 0x7FFF, 0xFFFF,
-		0x8000 + VOLTAGE_5V_STANDBY_MIN, 0x8000 + VOLTAGE_5V_STANDBY_MAX, 0,
-		0x8000 + VOLTAGE_5V_STANDBY_MIN, 0x8000 + VOLTAGE_5V_STANDBY_MAX, 0,
-		REG_VOLTAGE_5V_STANDBY,
-	},
-
-	{
-		"Temperature", "°C", &sysmon_dspic_sgn, NULL, sysmon_backlight_disable,
-		1, 1, -32768, 32767, 0xFFFF,
-		0x8000 + TEMPERATURE_MIN,	  0x8000 + TEMPERATURE_MAX,	    0,
-		0x8000 + TEMPERATURE_DISPLAY_MIN, 0x8000 + TEMPERATURE_DISPLAY_MAX, 0,
-		REG_TEMPERATURE,
-	},
-};
-
-int sysmon_init_f(void)
-{
-	sysmon_t **l;
-
-	for (l = sysmon_list; *l; l++)
-		(*l)->init(*l);
-
-	return 0;
-}
-
-void sysmon_reloc(void)
-{
-	/* Do nothing for now, sysmon_reloc() is required by the sysmon post */
-}
-
-static char *sysmon_unit_value(sysmon_table_t *s, uint val)
-{
-	static char buf[32];
-	char *p, sign;
-	int decimal, frac;
-	int unit_val;
-
-	unit_val = s->unit_min + (s->unit_max - s->unit_min) * val / s->val_mask;
-
-	if (val == -1)
-		return "I/O ERROR";
-
-	if (unit_val < 0) {
-		sign = '-';
-		unit_val = -unit_val;
-	} else {
-		sign = '+';
-	}
-
-	p = buf + sprintf(buf, "%c%2d", sign, unit_val / s->unit_div);
-
-	frac = unit_val % s->unit_div;
-	frac /= (s->unit_div / s->unit_precision);
-
-	decimal = s->unit_precision;
-
-	if (decimal != 1)
-		*p++ = '.';
-	for (decimal /= 10; decimal != 0; decimal /= 10)
-		*p++ = '0' + (frac / decimal) % 10;
-	strcpy(p, s->unit_name);
-
-	return buf;
-}
-
-static void sysmon_dspic_init(sysmon_t *this)
-{
-}
-
-static int sysmon_dspic_read(sysmon_t *this, uint addr, int *val)
-{
-	ushort data;
-
-	if (dspic_read(addr, &data) == 0){
-		/* To fit into the table range we should add 0x8000 */
-		*val = data + 0x8000;
-		return 0;
-	}
-
-	return -1;
-}
-
-static int sysmon_dspic_read_sgn(sysmon_t *this, uint addr, int *val)
-{
-	ushort data;
-
-	if (dspic_read(addr, &data) == 0){
-		/* To fit into the table range we should add 0x8000 */
-		*val = (signed short)data + 0x8000;
-		return 0;
-	}
-
-	return -1;
-}
-
-static void sysmon_backlight_disable(sysmon_table_t *this)
-{
-#if defined(CONFIG_VIDEO)
-	board_backlight_switch(this->val_valid_alt);
-#endif
-}
-
-int sysmon_post_test(int flags)
-{
-	int res = 0;
-	sysmon_table_t * t;
-	int val;
-
-	for (t = sysmon_table; t < sysmon_table + ARRAY_SIZE(sysmon_table); t++) {
-		t->val_valid = 1;
-		if (t->exec_before)
-			t->exec_before(t);
-
-		if (t->sysmon->read(t->sysmon, t->addr, &val) != 0) {
-			t->val_valid = 0;
-			t->val_valid_alt = 0;
-			post_log(": read failed\n");
-			res = 1;
-			break;
-		}
-
-		if (t->val_valid != 0) {
-			t->val_valid = val >= t->val_min && val <= t->val_max;
-			t->val_valid_alt = val >= t->val_min_alt && val <= t->val_max_alt;
-		}
-
-		if (t->exec_after)
-			t->exec_after(t);
-
-		if ((!t->val_valid) || (flags)) {
-			post_log("\n\t%-17s = %-10s ", t->name, sysmon_unit_value(t, val));
-			post_log("allowed range");
-			post_log(" %-8s ..", sysmon_unit_value(t, t->val_min));
-			post_log(" %-8s", sysmon_unit_value(t, t->val_max));
-			post_log("     %s", t->val_valid ? "OK" : "FAIL");
-		}
-
-		if (!t->val_valid) {
-			res = 1;
-			break;
-		}
-	}
-	post_log("\n");
-
-	return res;
-}
-#endif /* CONFIG_POST & CONFIG_SYS_POST_SYSMON */
diff --git a/post/board/lwmon5/watchdog.c b/post/board/lwmon5/watchdog.c
deleted file mode 100644
index 1332da21d0..0000000000
--- a/post/board/lwmon5/watchdog.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
- *
- * Developed for DENX Software Engineering GmbH
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-
-/* This test verifies if the reason of last reset was an abnormal voltage
- * condition, than it performs watchdog test, measuing time required to
- * trigger watchdog reset.
- */
-
-#include <post.h>
-
-#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
-
-#include <watchdog.h>
-#include <asm/ppc4xx-gpio.h>
-#include <asm/io.h>
-
-static uint watchdog_magic_read(void)
-{
-	return in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) &
-		CONFIG_SYS_WATCHDOG_MAGIC_MASK;
-}
-
-static void watchdog_magic_write(uint value)
-{
-	out_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR, value |
-		(in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) &
-			~CONFIG_SYS_WATCHDOG_MAGIC_MASK));
-}
-
-int sysmon1_post_test(int flags)
-{
-	if (gpio_read_in_bit(CONFIG_SYS_GPIO_SYSMON_STATUS) == 0) {
-		/*
-		 * 3.1. GPIO62 is low
-		 * Assuming system voltage failure.
-		 */
-		post_log("sysmon1 Abnormal voltage detected (GPIO62)\n");
-		post_log("POST sysmon1 FAILED\n");
-		return 1;
-	} else {
-		post_log("sysmon1 PASSED\n");
-	}
-
-	return 0;
-}
-
-int lwmon5_watchdog_post_test(int flags)
-{
-	/* On each reset scratch register 1 should be tested,
-	 * but first test GPIO62:
-	 */
-	if (!(flags & POST_MANUAL) && sysmon1_post_test(flags)) {
-		/* 3.1. GPIO62 is low
-		 * Assuming system voltage failure.
-		 */
-		/* 3.1.1. Set scratch register 1 to 0x0000xxxx */
-		watchdog_magic_write(0);
-		/* 3.1.2. Mark test as failed due to voltage?! */
-		return 1;
-	}
-
-	if (watchdog_magic_read() != CONFIG_SYS_WATCHDOG_MAGIC) {
-		/* 3.2. Scratch register 1 differs from magic value 0x1248xxxx
-		 * Assuming PowerOn
-		 */
-		int ints;
-		ulong base;
-		ulong time;
-
-		/* 3.2.1. Set magic value to scratch register */
-		watchdog_magic_write(CONFIG_SYS_WATCHDOG_MAGIC);
-
-		ints = disable_interrupts ();
-		/* 3.2.2. strobe watchdog once */
-		WATCHDOG_RESET();
-		out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, 0);
-		/* 3.2.3. save time of strobe in scratch register 2 */
-		base = post_time_ms (0);
-
-		/* 3.2.4. Wait for 150 ms (enough for reset to happen) */
-		while ((time = post_time_ms (base)) < 150)
-			out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, time);
-		if (ints)
-			enable_interrupts ();
-
-		/* 3.2.5. Reset didn't happen. - Set 0x0000xxxx
-		 * into scratch register 1
-		 */
-		watchdog_magic_write(0);
-		/* 3.2.6. Mark test as failed. */
-		post_log("hw watchdog time : %u ms, failed ", time);
-		return 2;
-	} else {
-		/* 3.3. Scratch register matches magic value 0x1248xxxx
-		 * Assume this is watchdog-initiated reset
-		 */
-		ulong time;
-		/* 3.3.1. So, the test succeed, save measured time to syslog. */
-		time = in_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR);
-		if (time > 90 ) { /* ms*/
-			post_log("hw watchdog time : %u ms, passed ", time);
-			/* 3.3.2. Set scratch register 1 to 0x0000xxxx */
-			watchdog_magic_write(0);
-			return 0;
-		} else {
-			/*test minimum watchdogtime */
-			post_log("hw watchdog time : %u ms, failed ", time);
-			return 2;
-		}
-	}
-	return -1;
-}
-
-#endif /* CONFIG_POST & CONFIG_SYS_POST_WATCHDOG */