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authorTom Rini <trini@konsulko.com>2022-10-03 22:39:46 +0300
committerTom Rini <trini@konsulko.com>2022-10-03 22:39:46 +0300
commit2d4591353452638132d711551fec3495b7644731 (patch)
treee12058de7f553e84f8d13e545f130c7a48973589 /tools
parent4debc57a3da6c3f4d3f89a637e99206f4cea0a96 (diff)
parent6ee6e15975cad3c99fad3a66223f3fd9287a369b (diff)
downloadu-boot-2d4591353452638132d711551fec3495b7644731.tar.xz
Merge branch 'next'
Diffstat (limited to 'tools')
-rw-r--r--tools/Makefile1
-rw-r--r--tools/binman/ftest.py4
-rw-r--r--tools/default_image.c31
-rwxr-xr-xtools/dtoc/test_fdt.py1
-rw-r--r--tools/fit_image.c4
-rw-r--r--tools/imx8mimage.c8
-rw-r--r--tools/mkimage.c2
-rw-r--r--tools/mtk_image.c387
-rw-r--r--tools/mtk_image.h25
-rw-r--r--tools/mtk_nand_headers.c668
-rw-r--r--tools/mtk_nand_headers.h165
11 files changed, 940 insertions, 356 deletions
diff --git a/tools/Makefile b/tools/Makefile
index 3626919633..34a1aa7a8b 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -147,6 +147,7 @@ dumpimage-mkimage-objs := aisimage.o \
gpimage.o \
gpimage-common.o \
mtk_image.o \
+ mtk_nand_headers.o \
$(ECDSA_OBJS-y) \
$(RSA_OBJS-y) \
$(AES_OBJS-y)
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index ecb3595603..261107b335 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -5782,7 +5782,7 @@ fdt fdtmap Extract the devicetree blob from the fdtmap
# Check that the data appears in the file somewhere
self.assertIn(U_BOOT_SPL_DATA, data)
- # Get struct image_header -> ih_name
+ # Get struct legacy_img_hdr -> ih_name
name = data[0x20:0x40]
# Build the filename that we expect to be placed in there, by virtue of
@@ -5799,7 +5799,7 @@ fdt fdtmap Extract the devicetree blob from the fdtmap
# Check that the data appears in the file somewhere
self.assertIn(U_BOOT_SPL_DATA, data)
- # Get struct image_header -> ih_name
+ # Get struct legacy_img_hdr -> ih_name
name = data[0x20:0x40]
# Build the filename that we expect to be placed in there, by virtue of
diff --git a/tools/default_image.c b/tools/default_image.c
index e164c0c27d..4a067e6586 100644
--- a/tools/default_image.c
+++ b/tools/default_image.c
@@ -22,7 +22,7 @@
#include <u-boot/crc.h>
#include <imximage.h>
-static image_header_t header;
+static struct legacy_img_hdr header;
static int image_check_image_types(uint8_t type)
{
@@ -46,15 +46,15 @@ static int image_verify_header(unsigned char *ptr, int image_size,
uint32_t len;
const unsigned char *data;
uint32_t checksum;
- image_header_t header;
- image_header_t *hdr = &header;
+ struct legacy_img_hdr header;
+ struct legacy_img_hdr *hdr = &header;
/*
* create copy of header so that we can blank out the
* checksum field for checking - this can't be done
* on the PROT_READ mapped data.
*/
- memcpy(hdr, ptr, sizeof(image_header_t));
+ memcpy(hdr, ptr, sizeof(struct legacy_img_hdr));
if (be32_to_cpu(hdr->ih_magic) != IH_MAGIC) {
debug("%s: Bad Magic Number: \"%s\" is no valid image\n",
@@ -63,7 +63,7 @@ static int image_verify_header(unsigned char *ptr, int image_size,
}
data = (const unsigned char *)hdr;
- len = sizeof(image_header_t);
+ len = sizeof(struct legacy_img_hdr);
checksum = be32_to_cpu(hdr->ih_hcrc);
hdr->ih_hcrc = cpu_to_be32(0); /* clear for re-calculation */
@@ -74,8 +74,8 @@ static int image_verify_header(unsigned char *ptr, int image_size,
return -FDT_ERR_BADSTATE;
}
- data = (const unsigned char *)ptr + sizeof(image_header_t);
- len = image_size - sizeof(image_header_t) ;
+ data = (const unsigned char *)ptr + sizeof(struct legacy_img_hdr);
+ len = image_size - sizeof(struct legacy_img_hdr);
checksum = be32_to_cpu(hdr->ih_dcrc);
if (crc32(0, data, len) != checksum) {
@@ -94,13 +94,12 @@ static void image_set_header(void *ptr, struct stat *sbuf, int ifd,
uint32_t imagesize;
uint32_t ep;
uint32_t addr;
-
- image_header_t * hdr = (image_header_t *)ptr;
+ struct legacy_img_hdr *hdr = (struct legacy_img_hdr *)ptr;
checksum = crc32(0,
(const unsigned char *)(ptr +
- sizeof(image_header_t)),
- sbuf->st_size - sizeof(image_header_t));
+ sizeof(struct legacy_img_hdr)),
+ sbuf->st_size - sizeof(struct legacy_img_hdr));
time = imagetool_get_source_date(params->cmdname, sbuf->st_mtime);
ep = params->ep;
@@ -108,11 +107,11 @@ static void image_set_header(void *ptr, struct stat *sbuf, int ifd,
if (params->type == IH_TYPE_FIRMWARE_IVT)
/* Add size of CSF minus IVT */
- imagesize = sbuf->st_size - sizeof(image_header_t)
+ imagesize = sbuf->st_size - sizeof(struct legacy_img_hdr)
+ 0x2060 - sizeof(flash_header_v2_t);
else
- imagesize = sbuf->st_size - sizeof(image_header_t);
+ imagesize = sbuf->st_size - sizeof(struct legacy_img_hdr);
if (params->os == IH_OS_TEE) {
addr = optee_image_get_load_addr(hdr);
@@ -134,14 +133,14 @@ static void image_set_header(void *ptr, struct stat *sbuf, int ifd,
image_set_name(hdr, params->imagename);
checksum = crc32(0, (const unsigned char *)hdr,
- sizeof(image_header_t));
+ sizeof(struct legacy_img_hdr));
image_set_hcrc(hdr, checksum);
}
static int image_extract_subimage(void *ptr, struct image_tool_params *params)
{
- const image_header_t *hdr = (const image_header_t *)ptr;
+ const struct legacy_img_hdr *hdr = (const struct legacy_img_hdr *)ptr;
ulong file_data;
ulong file_len;
@@ -175,7 +174,7 @@ static int image_extract_subimage(void *ptr, struct image_tool_params *params)
U_BOOT_IMAGE_TYPE(
defimage,
"Default Image support",
- sizeof(image_header_t),
+ sizeof(struct legacy_img_hdr),
(void *)&header,
image_check_params,
image_verify_header,
diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py
index 8a990b8bd7..a3e36ea363 100755
--- a/tools/dtoc/test_fdt.py
+++ b/tools/dtoc/test_fdt.py
@@ -851,4 +851,3 @@ def main():
if __name__ == '__main__':
sys.exit(main())
-sys.exit(1)
diff --git a/tools/fit_image.c b/tools/fit_image.c
index 979f2411ee..923a9755b7 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -22,7 +22,7 @@
#include <version.h>
#include <u-boot/crc.h>
-static image_header_t header;
+static struct legacy_img_hdr header;
static int fit_add_file_data(struct image_tool_params *params, size_t size_inc,
const char *tmpfile)
@@ -915,7 +915,7 @@ static int fit_check_params(struct image_tool_params *params)
U_BOOT_IMAGE_TYPE(
fitimage,
"FIT Image support",
- sizeof(image_header_t),
+ sizeof(struct legacy_img_hdr),
(void *)&header,
fit_check_params,
fit_verify_header,
diff --git a/tools/imx8mimage.c b/tools/imx8mimage.c
index a4699decf9..35d0a92bfd 100644
--- a/tools/imx8mimage.c
+++ b/tools/imx8mimage.c
@@ -318,7 +318,7 @@ err_mmap:
static int generate_ivt_for_fit(int fd, int fit_offset, uint32_t ep,
uint32_t *fit_load_addr)
{
- image_header_t image_header;
+ struct legacy_img_hdr image_header;
int ret;
uint32_t fit_size, load_addr;
@@ -330,8 +330,8 @@ static int generate_ivt_for_fit(int fd, int fit_offset, uint32_t ep,
exit(EXIT_FAILURE);
}
- if (read(fd, (char *)&image_header, sizeof(image_header_t)) !=
- sizeof(image_header_t)) {
+ if (read(fd, (char *)&image_header, sizeof(struct legacy_img_hdr)) !=
+ sizeof(struct legacy_img_hdr)) {
fprintf(stderr, "generate_ivt_for_fit read failed: %s\n",
strerror(errno));
exit(EXIT_FAILURE);
@@ -600,7 +600,7 @@ void build_image(int ofd)
close(sld_fd);
file_off = sld_header_off;
- file_off += sbuf.st_size + sizeof(image_header_t);
+ file_off += sbuf.st_size + sizeof(struct legacy_img_hdr);
}
}
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 597cb3a5ce..30c6df7708 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -845,7 +845,7 @@ copy_file (int ifd, const char *datafile, int pad)
if (params.xflag) {
unsigned char *p = NULL;
/*
- * XIP: do not append the image_header_t at the
+ * XIP: do not append the struct legacy_img_hdr at the
* beginning of the file, but consume the space
* reserved for it.
*/
diff --git a/tools/mtk_image.c b/tools/mtk_image.c
index de5ce4d964..5ef9334163 100644
--- a/tools/mtk_image.c
+++ b/tools/mtk_image.c
@@ -12,216 +12,7 @@
#include <u-boot/sha256.h>
#include "imagetool.h"
#include "mtk_image.h"
-
-/* NAND header for SPI-NAND with 2KB page + 64B spare */
-static const union nand_boot_header snand_hdr_2k_64_data = {
- .data = {
- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
- 0x00, 0x00, 0x00, 0x08, 0x03, 0x00, 0x40, 0x00,
- 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x7B, 0xC4, 0x17, 0x9D,
- 0xCA, 0x42, 0x90, 0xD0, 0x98, 0xD0, 0xE0, 0xF7,
- 0xDB, 0xCD, 0x16, 0xF6, 0x03, 0x73, 0xD2, 0xB8,
- 0x93, 0xB2, 0x56, 0x5A, 0x84, 0x6E, 0x00, 0x00
- }
-};
-
-/* NAND header for SPI-NAND with 2KB page + 120B/128B spare */
-static const union nand_boot_header snand_hdr_2k_128_data = {
- .data = {
- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
- 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
- 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x90, 0x28, 0xED, 0x13,
- 0x7F, 0x12, 0x22, 0xCD, 0x3D, 0x06, 0xF1, 0xB3,
- 0x6F, 0x2E, 0xD9, 0xA0, 0x9D, 0x7A, 0xBD, 0xD7,
- 0xB3, 0x28, 0x3C, 0x13, 0xDB, 0x4E, 0x00, 0x00
- }
-};
-
-/* NAND header for SPI-NAND with 4KB page + 256B spare */
-static const union nand_boot_header snand_hdr_4k_256_data = {
- .data = {
- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
- 0x00, 0x00, 0x00, 0x10, 0x05, 0x00, 0xE0, 0x00,
- 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x47, 0xED, 0x0E, 0xC3,
- 0x83, 0xBF, 0x41, 0xD2, 0x85, 0x21, 0x97, 0x57,
- 0xC4, 0x2E, 0x6B, 0x7A, 0x40, 0xE0, 0xCF, 0x8F,
- 0x37, 0xBD, 0x17, 0xB6, 0xC7, 0xFE, 0x00, 0x00
- }
-};
-
-/* NAND header for Parallel NAND 1Gb with 2KB page + 64B spare */
-static const union nand_boot_header nand_hdr_1gb_2k_64_data = {
- .data = {
- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
- 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
- 0x40, 0x00, 0x00, 0x04, 0x0B, 0x00, 0x11, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x12, 0x28, 0x1C, 0x12,
- 0x8F, 0xFD, 0xF8, 0x32, 0x6F, 0x6D, 0xCF, 0x6C,
- 0xDA, 0x21, 0x70, 0x8C, 0xDA, 0x0A, 0x22, 0x82,
- 0xAA, 0x59, 0xFA, 0x7C, 0x42, 0x2D, 0x00, 0x00
- }
-};
-
-/* NAND header for Parallel NAND 2Gb with 2KB page + 64B spare */
-static const union nand_boot_header nand_hdr_2gb_2k_64_data = {
- .data = {
- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
- 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
- 0x40, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x11, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x20, 0x9C, 0x3D, 0x2D,
- 0x7B, 0x68, 0x63, 0x52, 0x2E, 0x04, 0x63, 0xF1,
- 0x35, 0x4E, 0x44, 0x3E, 0xF8, 0xAC, 0x9B, 0x95,
- 0xAB, 0xFE, 0xE4, 0xE1, 0xD5, 0xF9, 0x00, 0x00
- }
-};
-
-/* NAND header for Parallel NAND 4Gb with 2KB page + 64B spare */
-static const union nand_boot_header nand_hdr_4gb_2k_64_data = {
- .data = {
- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
- 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
- 0x40, 0x00, 0x00, 0x10, 0x0B, 0x00, 0x11, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0xE3, 0x0F, 0x86, 0x32,
- 0x68, 0x05, 0xD9, 0xC8, 0x13, 0xDF, 0xC5, 0x0B,
- 0x35, 0x3A, 0x68, 0xA5, 0x3C, 0x0C, 0x73, 0x87,
- 0x63, 0xB0, 0xBE, 0xCC, 0x84, 0x47, 0x00, 0x00
- }
-};
-
-/* NAND header for Parallel NAND 2Gb with 2KB page + 128B spare */
-static const union nand_boot_header nand_hdr_2gb_2k_128_data = {
- .data = {
- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
- 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
- 0x40, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x11, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x01, 0xA5, 0xE9, 0x5A,
- 0xDF, 0x58, 0x62, 0x41, 0xD6, 0x26, 0x77, 0xBC,
- 0x76, 0x1F, 0x27, 0x4E, 0x4F, 0x6C, 0xC3, 0xF0,
- 0x36, 0xDE, 0xD9, 0xB3, 0xFF, 0x93, 0x00, 0x00
- }
-};
-
-/* NAND header for Parallel NAND 4Gb with 2KB page + 128B spare */
-static const union nand_boot_header nand_hdr_4gb_2k_128_data = {
- .data = {
- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
- 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
- 0x40, 0x00, 0x00, 0x10, 0x0B, 0x00, 0x11, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0xC2, 0x36, 0x52, 0x45,
- 0xCC, 0x35, 0xD8, 0xDB, 0xEB, 0xFD, 0xD1, 0x46,
- 0x76, 0x6B, 0x0B, 0xD5, 0x8B, 0xCC, 0x2B, 0xE2,
- 0xFE, 0x90, 0x83, 0x9E, 0xAE, 0x2D, 0x00, 0x00
- }
-};
-
-static const struct nand_header_type {
- const char *name;
- const union nand_boot_header *data;
-} nand_headers[] = {
- {
- .name = "2k+64",
- .data = &snand_hdr_2k_64_data
- }, {
- .name = "2k+120",
- .data = &snand_hdr_2k_128_data
- }, {
- .name = "2k+128",
- .data = &snand_hdr_2k_128_data
- }, {
- .name = "4k+256",
- .data = &snand_hdr_4k_256_data
- }, {
- .name = "1g:2k+64",
- .data = &nand_hdr_1gb_2k_64_data
- }, {
- .name = "2g:2k+64",
- .data = &nand_hdr_2gb_2k_64_data
- }, {
- .name = "4g:2k+64",
- .data = &nand_hdr_4gb_2k_64_data
- }, {
- .name = "2g:2k+128",
- .data = &nand_hdr_2gb_2k_128_data
- }, {
- .name = "4g:2k+128",
- .data = &nand_hdr_4gb_2k_128_data
- }
-};
+#include "mtk_nand_headers.h"
static const struct brom_img_type {
const char *name;
@@ -242,6 +33,9 @@ static const struct brom_img_type {
}, {
.name = "snand",
.type = BRLYT_TYPE_SNAND
+ }, {
+ .name = "spim-nand",
+ .type = BRLYT_TYPE_SNAND
}
};
@@ -263,7 +57,8 @@ static char lk_name[32] = "U-Boot";
static uint32_t crc32tbl[256];
/* NAND header selected by user */
-static const union nand_boot_header *hdr_nand;
+static const struct nand_header_type *hdr_nand;
+static uint32_t hdr_nand_size;
/* GFH header + 2 * 4KB pages of NAND */
static char hdr_tmp[sizeof(struct gfh_header) + 0x2000];
@@ -402,12 +197,7 @@ static int mtk_brom_parse_imagename(const char *imagename)
}
/* parse nand header type */
- for (i = 0; i < ARRAY_SIZE(nand_headers); i++) {
- if (!strcmp(nand_headers[i].name, nandinfo)) {
- hdr_nand = nand_headers[i].data;
- break;
- }
- }
+ hdr_nand = mtk_nand_header_find(nandinfo);
/* parse device header offset */
if (hdr_offs && hdr_offs[0])
@@ -432,6 +222,9 @@ static int mtk_brom_parse_imagename(const char *imagename)
return -EINVAL;
}
+ if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND)
+ hdr_nand_size = mtk_nand_header_size(hdr_nand);
+
return 0;
}
@@ -468,7 +261,7 @@ static int mtk_image_vrec_header(struct image_tool_params *params,
}
if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND)
- tparams->header_size = 2 * le16_to_cpu(hdr_nand->pagesize);
+ tparams->header_size = hdr_nand_size;
else
tparams->header_size = sizeof(struct gen_device_header);
@@ -480,6 +273,25 @@ static int mtk_image_vrec_header(struct image_tool_params *params,
return SHA256_SUM_LEN;
}
+static int mtk_image_verify_gfh(struct gfh_header *gfh, uint32_t type, int print)
+{
+ if (strcmp(gfh->file_info.name, GFH_FILE_INFO_NAME))
+ return -1;
+
+ if (le32_to_cpu(gfh->file_info.flash_type) != type)
+ return -1;
+
+ if (print)
+ printf("Load Address: %08x\n",
+ le32_to_cpu(gfh->file_info.load_addr) +
+ le32_to_cpu(gfh->file_info.jump_offset));
+
+ if (print)
+ printf("Architecture: %s\n", is_arm64_image ? "ARM64" : "ARM");
+
+ return 0;
+}
+
static int mtk_image_verify_gen_header(const uint8_t *ptr, int print)
{
union gen_boot_header *gbh = (union gen_boot_header *)ptr;
@@ -542,89 +354,57 @@ static int mtk_image_verify_gen_header(const uint8_t *ptr, int print)
gfh = (struct gfh_header *)(ptr + gfh_offset);
- if (strcmp(gfh->file_info.name, GFH_FILE_INFO_NAME))
- return -1;
-
- if (le32_to_cpu(gfh->file_info.flash_type) != GFH_FLASH_TYPE_GEN)
- return -1;
-
- if (print)
- printf("Load Address: %08x\n",
- le32_to_cpu(gfh->file_info.load_addr) +
- le32_to_cpu(gfh->file_info.jump_offset));
-
- if (print)
- printf("Architecture: %s\n", is_arm64_image ? "ARM64" : "ARM");
-
- return 0;
+ return mtk_image_verify_gfh(gfh, GFH_FLASH_TYPE_GEN, print);
}
static int mtk_image_verify_nand_header(const uint8_t *ptr, int print)
{
- union nand_boot_header *nh = (union nand_boot_header *)ptr;
struct brom_layout_header *bh;
+ struct nand_header_info info;
struct gfh_header *gfh;
const char *bootmedia;
+ int ret;
- if (strncmp(nh->version, NAND_BOOT_VERSION, sizeof(nh->version)) ||
- strcmp(nh->id, NAND_BOOT_ID))
- return -1;
+ ret = mtk_nand_header_info(ptr, &info);
+ if (ret < 0)
+ return ret;
- bh = (struct brom_layout_header *)(ptr + le16_to_cpu(nh->pagesize));
+ if (!ret) {
+ bh = (struct brom_layout_header *)(ptr + info.page_size);
- if (strcmp(bh->name, BRLYT_NAME))
- return -1;
+ if (strcmp(bh->name, BRLYT_NAME))
+ return -1;
+
+ if (le32_to_cpu(bh->magic) != BRLYT_MAGIC)
+ return -1;
- if (le32_to_cpu(bh->magic) != BRLYT_MAGIC) {
- return -1;
- } else {
if (le32_to_cpu(bh->type) == BRLYT_TYPE_NAND)
bootmedia = "Parallel NAND";
else if (le32_to_cpu(bh->type) == BRLYT_TYPE_SNAND)
- bootmedia = "Serial NAND";
+ bootmedia = "Serial NAND (SNFI/AP)";
else
return -1;
+ } else {
+ if (info.snfi)
+ bootmedia = "Serial NAND (SNFI/HSM)";
+ else
+ bootmedia = "Serial NAND (SPIM)";
}
if (print) {
- printf("Boot Media: %s\n", bootmedia);
-
- if (le32_to_cpu(bh->type) == BRLYT_TYPE_NAND) {
- uint64_t capacity =
- (uint64_t)le16_to_cpu(nh->numblocks) *
- (uint64_t)le16_to_cpu(nh->pages_of_block) *
- (uint64_t)le16_to_cpu(nh->pagesize) * 8;
- printf("Capacity: %dGb\n",
- (uint32_t)(capacity >> 30));
- }
+ printf("Boot Media: %s\n", bootmedia);
- if (le16_to_cpu(nh->pagesize) >= 1024)
- printf("Page Size: %dKB\n",
- le16_to_cpu(nh->pagesize) >> 10);
+ if (info.page_size >= 1024)
+ printf("Page Size: %dKB\n", info.page_size >> 10);
else
- printf("Page Size: %dB\n",
- le16_to_cpu(nh->pagesize));
+ printf("Page Size: %dB\n", info.page_size);
- printf("Spare Size: %dB\n", le16_to_cpu(nh->oobsize));
+ printf("Spare Size: %dB\n", info.spare_size);
}
- gfh = (struct gfh_header *)(ptr + 2 * le16_to_cpu(nh->pagesize));
-
- if (strcmp(gfh->file_info.name, GFH_FILE_INFO_NAME))
- return -1;
-
- if (le32_to_cpu(gfh->file_info.flash_type) != GFH_FLASH_TYPE_NAND)
- return -1;
-
- if (print)
- printf("Load Address: %08x\n",
- le32_to_cpu(gfh->file_info.load_addr) +
- le32_to_cpu(gfh->file_info.jump_offset));
+ gfh = (struct gfh_header *)(ptr + info.gfh_offset);
- if (print)
- printf("Architecture: %s\n", is_arm64_image ? "ARM64" : "ARM");
-
- return 0;
+ return mtk_image_verify_gfh(gfh, GFH_FLASH_TYPE_NAND, print);
}
static uint32_t crc32be_cal(const void *data, size_t length)
@@ -647,10 +427,10 @@ static uint32_t crc32be_cal(const void *data, size_t length)
static int mtk_image_verify_mt7621_header(const uint8_t *ptr, int print)
{
- const image_header_t *hdr = (const image_header_t *)ptr;
+ const struct legacy_img_hdr *hdr = (const struct legacy_img_hdr *)ptr;
struct mt7621_nand_header *nhdr;
uint32_t spl_size, crcval;
- image_header_t header;
+ struct legacy_img_hdr header;
int ret;
spl_size = image_get_size(hdr);
@@ -710,7 +490,7 @@ static int mtk_image_verify_mt7621_header(const uint8_t *ptr, int print)
static int mtk_image_verify_header(unsigned char *ptr, int image_size,
struct image_tool_params *params)
{
- image_header_t *hdr = (image_header_t *)ptr;
+ struct legacy_img_hdr *hdr = (struct legacy_img_hdr *)ptr;
union lk_hdr *lk = (union lk_hdr *)ptr;
/* nothing to verify for LK image header */
@@ -722,7 +502,7 @@ static int mtk_image_verify_header(unsigned char *ptr, int image_size,
if (image_get_magic(hdr) == IH_MAGIC)
return mtk_image_verify_mt7621_header(ptr, 0);
- if (!strcmp((char *)ptr, NAND_BOOT_NAME))
+ if (is_mtk_nand_header(ptr))
return mtk_image_verify_nand_header(ptr, 0);
else
return mtk_image_verify_gen_header(ptr, 0);
@@ -732,7 +512,7 @@ static int mtk_image_verify_header(unsigned char *ptr, int image_size,
static void mtk_image_print_header(const void *ptr)
{
- image_header_t *hdr = (image_header_t *)ptr;
+ struct legacy_img_hdr *hdr = (struct legacy_img_hdr *)ptr;
union lk_hdr *lk = (union lk_hdr *)ptr;
if (le32_to_cpu(lk->magic) == LK_PART_MAGIC) {
@@ -748,7 +528,7 @@ static void mtk_image_print_header(const void *ptr)
return;
}
- if (!strcmp((char *)ptr, NAND_BOOT_NAME))
+ if (is_mtk_nand_header(ptr))
mtk_image_verify_nand_header(ptr, 1);
else
mtk_image_verify_gen_header(ptr, 1);
@@ -879,42 +659,39 @@ static void mtk_image_set_gen_header(void *ptr, off_t filesize,
static void mtk_image_set_nand_header(void *ptr, off_t filesize,
uint32_t loadaddr)
{
- union nand_boot_header *nh = (union nand_boot_header *)ptr;
struct brom_layout_header *brlyt;
struct gfh_header *gfh;
- uint32_t payload_pages;
- int i;
+ uint32_t payload_pages, nand_page_size;
- /* NAND device header, repeat 4 times */
- for (i = 0; i < 4; i++)
- memcpy(nh + i, hdr_nand, sizeof(union nand_boot_header));
+ /* NAND header */
+ nand_page_size = mtk_nand_header_put(hdr_nand, ptr);
- /* BRLYT header */
- payload_pages = (filesize + le16_to_cpu(hdr_nand->pagesize) - 1) /
- le16_to_cpu(hdr_nand->pagesize);
- brlyt = (struct brom_layout_header *)
- (ptr + le16_to_cpu(hdr_nand->pagesize));
- put_brom_layout_header(brlyt, hdr_media);
- brlyt->header_size = cpu_to_le32(2);
- brlyt->total_size = cpu_to_le32(payload_pages);
- brlyt->header_size_2 = brlyt->header_size;
- brlyt->total_size_2 = brlyt->total_size;
- brlyt->unused = cpu_to_le32(1);
+ if (nand_page_size) {
+ /* BRLYT header */
+ payload_pages = (filesize + nand_page_size - 1) /
+ nand_page_size;
+ brlyt = (struct brom_layout_header *)(ptr + nand_page_size);
+ put_brom_layout_header(brlyt, hdr_media);
+ brlyt->header_size = cpu_to_le32(2);
+ brlyt->total_size = cpu_to_le32(payload_pages);
+ brlyt->header_size_2 = brlyt->header_size;
+ brlyt->total_size_2 = brlyt->total_size;
+ brlyt->unused = cpu_to_le32(1);
+ }
/* GFH header */
- gfh = (struct gfh_header *)(ptr + 2 * le16_to_cpu(hdr_nand->pagesize));
- put_ghf_header(gfh, filesize, 2 * le16_to_cpu(hdr_nand->pagesize),
- loadaddr, GFH_FLASH_TYPE_NAND);
+ gfh = (struct gfh_header *)(ptr + hdr_nand_size);
+ put_ghf_header(gfh, filesize, hdr_nand_size, loadaddr,
+ GFH_FLASH_TYPE_NAND);
/* Generate SHA256 hash */
- put_hash((uint8_t *)gfh,
- filesize - 2 * le16_to_cpu(hdr_nand->pagesize) - SHA256_SUM_LEN);
+ put_hash((uint8_t *)gfh, filesize - hdr_nand_size - SHA256_SUM_LEN);
}
static void mtk_image_set_mt7621_header(void *ptr, off_t filesize,
uint32_t loadaddr)
{
- image_header_t *hdr = (image_header_t *)ptr;
+ struct legacy_img_hdr *hdr = (struct legacy_img_hdr *)ptr;
struct mt7621_stage1_header *shdr;
struct mt7621_nand_header *nhdr;
uint32_t datasize, crcval;
diff --git a/tools/mtk_image.h b/tools/mtk_image.h
index d868545a33..fad9372100 100644
--- a/tools/mtk_image.h
+++ b/tools/mtk_image.h
@@ -26,31 +26,6 @@ union gen_boot_header {
#define SF_BOOT_NAME "SF_BOOT"
#define SDMMC_BOOT_NAME "SDMMC_BOOT"
-/* Header for NAND */
-union nand_boot_header {
- struct {
- char name[12];
- char version[4];
- char id[8];
- uint16_t ioif;
- uint16_t pagesize;
- uint16_t addrcycles;
- uint16_t oobsize;
- uint16_t pages_of_block;
- uint16_t numblocks;
- uint16_t writesize_shift;
- uint16_t erasesize_shift;
- uint8_t dummy[60];
- uint8_t ecc_parity[28];
- };
-
- uint8_t data[0x80];
-};
-
-#define NAND_BOOT_NAME "BOOTLOADER!"
-#define NAND_BOOT_VERSION "V006"
-#define NAND_BOOT_ID "NFIINFO"
-
/* BootROM layout header */
struct brom_layout_header {
char name[8];
diff --git a/tools/mtk_nand_headers.c b/tools/mtk_nand_headers.c
new file mode 100644
index 0000000000..2fa91e7af0
--- /dev/null
+++ b/tools/mtk_nand_headers.c
@@ -0,0 +1,668 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * MediaTek BootROM NAND header definitions
+ *
+ * Copyright (C) 2022 MediaTek Inc.
+ * Author: Weijie Gao <weijie.gao@mediatek.com>
+ */
+
+#include <stdint.h>
+#include <string.h>
+#include "imagetool.h"
+#include "mtk_image.h"
+#include "mtk_nand_headers.h"
+
+/* NAND header for SPI-NAND with 2KB page + 64B spare */
+static const union nand_boot_header snand_hdr_2k_64_data = {
+ .data = {
+ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x03, 0x00, 0x40, 0x00,
+ 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x7B, 0xC4, 0x17, 0x9D,
+ 0xCA, 0x42, 0x90, 0xD0, 0x98, 0xD0, 0xE0, 0xF7,
+ 0xDB, 0xCD, 0x16, 0xF6, 0x03, 0x73, 0xD2, 0xB8,
+ 0x93, 0xB2, 0x56, 0x5A, 0x84, 0x6E, 0x00, 0x00
+ }
+};
+
+/* NAND header for SPI-NAND with 2KB page + 120B/128B spare */
+static const union nand_boot_header snand_hdr_2k_128_data = {
+ .data = {
+ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
+ 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x90, 0x28, 0xED, 0x13,
+ 0x7F, 0x12, 0x22, 0xCD, 0x3D, 0x06, 0xF1, 0xB3,
+ 0x6F, 0x2E, 0xD9, 0xA0, 0x9D, 0x7A, 0xBD, 0xD7,
+ 0xB3, 0x28, 0x3C, 0x13, 0xDB, 0x4E, 0x00, 0x00
+ }
+};
+
+/* NAND header for SPI-NAND with 4KB page + 256B spare */
+static const union nand_boot_header snand_hdr_4k_256_data = {
+ .data = {
+ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+ 0x00, 0x00, 0x00, 0x10, 0x05, 0x00, 0xE0, 0x00,
+ 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x47, 0xED, 0x0E, 0xC3,
+ 0x83, 0xBF, 0x41, 0xD2, 0x85, 0x21, 0x97, 0x57,
+ 0xC4, 0x2E, 0x6B, 0x7A, 0x40, 0xE0, 0xCF, 0x8F,
+ 0x37, 0xBD, 0x17, 0xB6, 0xC7, 0xFE, 0x00, 0x00
+ }
+};
+
+/* NAND header for Parallel NAND 1Gb with 2KB page + 64B spare */
+static const union nand_boot_header nand_hdr_1gb_2k_64_data = {
+ .data = {
+ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
+ 0x40, 0x00, 0x00, 0x04, 0x0B, 0x00, 0x11, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x12, 0x28, 0x1C, 0x12,
+ 0x8F, 0xFD, 0xF8, 0x32, 0x6F, 0x6D, 0xCF, 0x6C,
+ 0xDA, 0x21, 0x70, 0x8C, 0xDA, 0x0A, 0x22, 0x82,
+ 0xAA, 0x59, 0xFA, 0x7C, 0x42, 0x2D, 0x00, 0x00
+ }
+};
+
+/* NAND header for Parallel NAND 2Gb with 2KB page + 64B spare */
+static const union nand_boot_header nand_hdr_2gb_2k_64_data = {
+ .data = {
+ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
+ 0x40, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x11, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x20, 0x9C, 0x3D, 0x2D,
+ 0x7B, 0x68, 0x63, 0x52, 0x2E, 0x04, 0x63, 0xF1,
+ 0x35, 0x4E, 0x44, 0x3E, 0xF8, 0xAC, 0x9B, 0x95,
+ 0xAB, 0xFE, 0xE4, 0xE1, 0xD5, 0xF9, 0x00, 0x00
+ }
+};
+
+/* NAND header for Parallel NAND 4Gb with 2KB page + 64B spare */
+static const union nand_boot_header nand_hdr_4gb_2k_64_data = {
+ .data = {
+ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
+ 0x40, 0x00, 0x00, 0x10, 0x0B, 0x00, 0x11, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0xE3, 0x0F, 0x86, 0x32,
+ 0x68, 0x05, 0xD9, 0xC8, 0x13, 0xDF, 0xC5, 0x0B,
+ 0x35, 0x3A, 0x68, 0xA5, 0x3C, 0x0C, 0x73, 0x87,
+ 0x63, 0xB0, 0xBE, 0xCC, 0x84, 0x47, 0x00, 0x00
+ }
+};
+
+/* NAND header for Parallel NAND 2Gb with 2KB page + 128B spare */
+static const union nand_boot_header nand_hdr_2gb_2k_128_data = {
+ .data = {
+ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
+ 0x40, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x11, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x01, 0xA5, 0xE9, 0x5A,
+ 0xDF, 0x58, 0x62, 0x41, 0xD6, 0x26, 0x77, 0xBC,
+ 0x76, 0x1F, 0x27, 0x4E, 0x4F, 0x6C, 0xC3, 0xF0,
+ 0x36, 0xDE, 0xD9, 0xB3, 0xFF, 0x93, 0x00, 0x00
+ }
+};
+
+/* NAND header for Parallel NAND 4Gb with 2KB page + 128B spare */
+static const union nand_boot_header nand_hdr_4gb_2k_128_data = {
+ .data = {
+ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+ 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
+ 0x40, 0x00, 0x00, 0x10, 0x0B, 0x00, 0x11, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0xC2, 0x36, 0x52, 0x45,
+ 0xCC, 0x35, 0xD8, 0xDB, 0xEB, 0xFD, 0xD1, 0x46,
+ 0x76, 0x6B, 0x0B, 0xD5, 0x8B, 0xCC, 0x2B, 0xE2,
+ 0xFE, 0x90, 0x83, 0x9E, 0xAE, 0x2D, 0x00, 0x00
+ }
+};
+
+/* HSM BROM NAND header for SPI NAND with 2KB page + 64B spare */
+static const union hsm_nand_boot_header hsm_nand_hdr_2k_64_data = {
+ .data = {
+ 0x4E, 0x41, 0x4E, 0x44, 0x43, 0x46, 0x47, 0x21,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x04, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x08, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
+ 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+ 0xFF, 0x00, 0x00, 0x00, 0x21, 0xD2, 0xEE, 0xF6,
+ 0xAE, 0xDD, 0x5E, 0xC2, 0x82, 0x8E, 0x9A, 0x62,
+ 0x09, 0x8E, 0x80, 0xE2, 0x37, 0x0D, 0xC9, 0xFA,
+ 0xA9, 0xDD, 0xFC, 0x92, 0x34, 0x2A, 0xED, 0x51,
+ 0xA4, 0x1B, 0xF7, 0x63, 0xCC, 0x5A, 0xC7, 0xFB,
+ 0xED, 0x21, 0x02, 0x23, 0x51, 0x31
+ }
+};
+
+/* HSM BROM NAND header for SPI NAND with 2KB page + 128B spare */
+static const union hsm_nand_boot_header hsm_nand_hdr_2k_128_data = {
+ .data = {
+ 0x4E, 0x41, 0x4E, 0x44, 0x43, 0x46, 0x47, 0x21,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x04, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x08, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
+ 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+ 0xFF, 0x00, 0x00, 0x00, 0x71, 0x7f, 0x71, 0xAC,
+ 0x42, 0xD0, 0x5B, 0xD2, 0x12, 0x81, 0x15, 0x0A,
+ 0x0C, 0xD4, 0xF6, 0x32, 0x1E, 0x63, 0xE7, 0x81,
+ 0x8A, 0x7F, 0xDE, 0xF9, 0x4B, 0x91, 0xEC, 0xC2,
+ 0x70, 0x00, 0x7F, 0x57, 0xAF, 0xDC, 0xE4, 0x24,
+ 0x57, 0x09, 0xBC, 0xC5, 0x35, 0xDC
+ }
+};
+
+/* HSM BROM NAND header for SPI NAND with 4KB page + 256B spare */
+static const union hsm_nand_boot_header hsm_nand_hdr_4k_256_data = {
+ .data = {
+ 0x4E, 0x41, 0x4E, 0x44, 0x43, 0x46, 0x47, 0x21,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x04, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x10, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
+ 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+ 0xFF, 0x00, 0x00, 0x00, 0x62, 0x04, 0xD6, 0x1F,
+ 0x2B, 0x57, 0x7A, 0x2D, 0xFE, 0xBB, 0x4A, 0x50,
+ 0xEC, 0xF8, 0x70, 0x1A, 0x44, 0x15, 0xF6, 0xA2,
+ 0x8E, 0xB0, 0xFD, 0xFA, 0xDC, 0xAA, 0x5A, 0x4E,
+ 0xCB, 0x8E, 0xC9, 0x72, 0x08, 0xDC, 0x20, 0xB9,
+ 0x98, 0xC8, 0x82, 0xD8, 0xBE, 0x44
+ }
+};
+
+/* HSM2.0 BROM NAND header for SPI NAND with 2KB page + 64B spare */
+static const union hsm20_nand_boot_header hsm20_nand_hdr_2k_64_data = {
+ .data = {
+ 0x4E, 0x41, 0x4E, 0x44, 0x43, 0x46, 0x47, 0x21,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
+ 0x00, 0x04, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x08, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
+ 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0x01, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x5F, 0x4B, 0xB2, 0x5B, 0x8B, 0x1C, 0x35, 0xDA,
+ 0x83, 0xE6, 0x6C, 0xC3, 0xFB, 0x8C, 0x78, 0x23,
+ 0xD0, 0x89, 0x24, 0xD9, 0x6C, 0x35, 0x2C, 0x5D,
+ 0x8F, 0xBB, 0xFC, 0x10, 0xD0, 0xE2, 0x22, 0x7D,
+ 0xC8, 0x97, 0x9A, 0xEF, 0xC6, 0xB5, 0xA7, 0x4E,
+ 0x4E, 0x0E
+ }
+};
+
+/* HSM2.0 BROM NAND header for SPI NAND with 2KB page + 128B spare */
+static const union hsm20_nand_boot_header hsm20_nand_hdr_2k_128_data = {
+ .data = {
+ 0x4E, 0x41, 0x4E, 0x44, 0x43, 0x46, 0x47, 0x21,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
+ 0x00, 0x04, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x08, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
+ 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0x01, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0xF8, 0x7E, 0xC1, 0x5D, 0x61, 0x54, 0xEA, 0x9F,
+ 0x5E, 0x66, 0x39, 0x66, 0x21, 0xFF, 0x8C, 0x3B,
+ 0xBE, 0xA7, 0x5A, 0x9E, 0xD7, 0xBD, 0x9E, 0x89,
+ 0xEE, 0x7E, 0x10, 0x31, 0x9A, 0x1D, 0x82, 0x49,
+ 0xA3, 0x4E, 0xD8, 0x47, 0xD7, 0x19, 0xF4, 0x2D,
+ 0x8E, 0x53
+ }
+};
+
+/* HSM2.0 BROM NAND header for SPI NAND with 4KB page + 256B spare */
+static const union hsm20_nand_boot_header hsm20_nand_hdr_4k_256_data = {
+ .data = {
+ 0x4E, 0x41, 0x4E, 0x44, 0x43, 0x46, 0x47, 0x21,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
+ 0x00, 0x04, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x10, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
+ 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0x01, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00,
+ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x79, 0x01, 0x1F, 0x86, 0x62, 0x6A, 0x43, 0xAE,
+ 0xE6, 0xF8, 0xDD, 0x5B, 0x29, 0xB7, 0xA2, 0x7F,
+ 0x29, 0x72, 0x54, 0x37, 0xBE, 0x50, 0xD4, 0x24,
+ 0xAB, 0x60, 0xF4, 0x44, 0x97, 0x3B, 0x65, 0x21,
+ 0x73, 0x24, 0x1F, 0x93, 0x0E, 0x9E, 0x96, 0x88,
+ 0x78, 0x6C
+ }
+};
+
+/* SPIM-NAND header for SPI NAND with 2KB page + 64B spare */
+static const union spim_nand_boot_header spim_nand_hdr_2k_64_data = {
+ .data = {
+ 0x53, 0x50, 0x49, 0x4e, 0x41, 0x4e, 0x44, 0x21,
+ 0x01, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
+ 0x00, 0x08, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x20, 0x30,
+ 0x01, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }
+};
+
+/* SPIM-NAND header for SPI NAND with 2KB page + 128B spare */
+static const union spim_nand_boot_header spim_nand_hdr_2k_128_data = {
+ .data = {
+ 0x53, 0x50, 0x49, 0x4e, 0x41, 0x4e, 0x44, 0x21,
+ 0x01, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
+ 0x00, 0x08, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x20, 0x30,
+ 0x01, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }
+};
+
+/* SPIM-NAND header for SPI NAND with 4KB page + 256B spare */
+static const union spim_nand_boot_header spim_nand_hdr_4k_256_data = {
+ .data = {
+ 0x53, 0x50, 0x49, 0x4e, 0x41, 0x4e, 0x44, 0x21,
+ 0x01, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
+ 0x00, 0x10, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x40, 0x00, 0x0d, 0x00, 0x00, 0x00, 0x20, 0x30,
+ 0x01, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }
+};
+
+struct nand_header_type {
+ const char *name;
+ enum nand_boot_header_type type;
+ union {
+ const union nand_boot_header *ap;
+ const union hsm_nand_boot_header *hsm;
+ const union hsm20_nand_boot_header *hsm20;
+ const union spim_nand_boot_header *spim;
+ };
+} nand_headers[] = {
+ {
+ .name = "2k+64",
+ .type = NAND_BOOT_AP_HEADER,
+ .ap = &snand_hdr_2k_64_data,
+ }, {
+ .name = "2k+120",
+ .type = NAND_BOOT_AP_HEADER,
+ .ap = &snand_hdr_2k_128_data,
+ }, {
+ .name = "2k+128",
+ .type = NAND_BOOT_AP_HEADER,
+ .ap = &snand_hdr_2k_128_data,
+ }, {
+ .name = "4k+256",
+ .type = NAND_BOOT_AP_HEADER,
+ .ap = &snand_hdr_4k_256_data,
+ }, {
+ .name = "1g:2k+64",
+ .type = NAND_BOOT_AP_HEADER,
+ .ap = &nand_hdr_1gb_2k_64_data,
+ }, {
+ .name = "2g:2k+64",
+ .type = NAND_BOOT_AP_HEADER,
+ .ap = &nand_hdr_2gb_2k_64_data,
+ }, {
+ .name = "4g:2k+64",
+ .type = NAND_BOOT_AP_HEADER,
+ .ap = &nand_hdr_4gb_2k_64_data,
+ }, {
+ .name = "2g:2k+128",
+ .type = NAND_BOOT_AP_HEADER,
+ .ap = &nand_hdr_2gb_2k_128_data,
+ }, {
+ .name = "4g:2k+128",
+ .type = NAND_BOOT_AP_HEADER,
+ .ap = &nand_hdr_4gb_2k_128_data,
+ }, {
+ .name = "hsm:2k+64",
+ .type = NAND_BOOT_HSM_HEADER,
+ .hsm = &hsm_nand_hdr_2k_64_data,
+ }, {
+ .name = "hsm:2k+128",
+ .type = NAND_BOOT_HSM_HEADER,
+ .hsm = &hsm_nand_hdr_2k_128_data,
+ }, {
+ .name = "hsm:4k+256",
+ .type = NAND_BOOT_HSM_HEADER,
+ .hsm = &hsm_nand_hdr_4k_256_data,
+ }, {
+ .name = "hsm20:2k+64",
+ .type = NAND_BOOT_HSM20_HEADER,
+ .hsm20 = &hsm20_nand_hdr_2k_64_data,
+ }, {
+ .name = "hsm20:2k+128",
+ .type = NAND_BOOT_HSM20_HEADER,
+ .hsm20 = &hsm20_nand_hdr_2k_128_data,
+ }, {
+ .name = "hsm20:4k+256",
+ .type = NAND_BOOT_HSM20_HEADER,
+ .hsm20 = &hsm20_nand_hdr_4k_256_data,
+ }, {
+ .name = "spim:2k+64",
+ .type = NAND_BOOT_SPIM_HEADER,
+ .spim = &spim_nand_hdr_2k_64_data,
+ }, {
+ .name = "spim:2k+128",
+ .type = NAND_BOOT_SPIM_HEADER,
+ .spim = &spim_nand_hdr_2k_128_data,
+ }, {
+ .name = "spim:4k+256",
+ .type = NAND_BOOT_SPIM_HEADER,
+ .spim = &spim_nand_hdr_4k_256_data,
+ }
+};
+
+const struct nand_header_type *mtk_nand_header_find(const char *name)
+{
+ uint32_t i;
+
+ for (i = 0; i < ARRAY_SIZE(nand_headers); i++) {
+ if (!strcmp(nand_headers[i].name, name))
+ return &nand_headers[i];
+ }
+
+ return NULL;
+}
+
+uint32_t mtk_nand_header_size(const struct nand_header_type *hdr_nand)
+{
+ switch (hdr_nand->type) {
+ case NAND_BOOT_HSM_HEADER:
+ return le32_to_cpu(hdr_nand->hsm->page_size);
+
+ case NAND_BOOT_HSM20_HEADER:
+ return le32_to_cpu(hdr_nand->hsm20->page_size);
+
+ case NAND_BOOT_SPIM_HEADER:
+ return le32_to_cpu(hdr_nand->spim->page_size);
+
+ default:
+ return 2 * le16_to_cpu(hdr_nand->ap->pagesize);
+ }
+}
+
+static int mtk_nand_header_ap_info(const void *ptr,
+ struct nand_header_info *info)
+{
+ union nand_boot_header *nh = (union nand_boot_header *)ptr;
+
+ if (strncmp(nh->version, NAND_BOOT_VERSION, sizeof(nh->version)) ||
+ strcmp(nh->id, NAND_BOOT_ID))
+ return -1;
+
+ info->page_size = le16_to_cpu(nh->pagesize);
+ info->spare_size = le16_to_cpu(nh->oobsize);
+ info->gfh_offset = 2 * info->page_size;
+ info->snfi = true;
+
+ return 0;
+}
+
+static int mtk_nand_header_hsm_info(const void *ptr,
+ struct nand_header_info *info)
+{
+ union hsm_nand_boot_header *nh = (union hsm_nand_boot_header *)ptr;
+
+ info->page_size = le16_to_cpu(nh->page_size);
+ info->spare_size = le16_to_cpu(nh->spare_size);
+ info->gfh_offset = info->page_size;
+ info->snfi = true;
+
+ return 1;
+}
+
+static int mtk_nand_header_spim_info(const void *ptr,
+ struct nand_header_info *info)
+{
+ union spim_nand_boot_header *nh = (union spim_nand_boot_header *)ptr;
+
+ info->page_size = le16_to_cpu(nh->page_size);
+ info->spare_size = le16_to_cpu(nh->spare_size);
+ info->gfh_offset = info->page_size;
+ info->snfi = false;
+
+ return 1;
+}
+
+int mtk_nand_header_info(const void *ptr, struct nand_header_info *info)
+{
+ if (!strcmp((char *)ptr, NAND_BOOT_NAME))
+ return mtk_nand_header_ap_info(ptr, info);
+ else if (!strncmp((char *)ptr, HSM_NAND_BOOT_NAME, 8))
+ return mtk_nand_header_hsm_info(ptr, info);
+ else if (!strncmp((char *)ptr, SPIM_NAND_BOOT_NAME, 8))
+ return mtk_nand_header_spim_info(ptr, info);
+
+ return -1;
+}
+
+bool is_mtk_nand_header(const void *ptr)
+{
+ struct nand_header_info info;
+
+ if (mtk_nand_header_info(ptr, &info) >= 0)
+ return true;
+
+ return false;
+}
+
+static uint16_t crc16(const uint8_t *p, uint32_t len)
+{
+ uint16_t crc = 0x4f4e;
+ uint32_t i;
+
+ while (len--) {
+ crc ^= *p++ << 8;
+ for (i = 0; i < 8; i++)
+ crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);
+ }
+
+ return crc;
+}
+
+static uint32_t mtk_nand_header_put_ap(const struct nand_header_type *hdr_nand,
+ void *ptr)
+{
+ int i;
+
+ /* NAND device header, repeat 4 times */
+ for (i = 0; i < 4; i++) {
+ memcpy(ptr, hdr_nand->ap, sizeof(*hdr_nand->ap));
+ ptr += sizeof(*hdr_nand->ap);
+ }
+
+ return le16_to_cpu(hdr_nand->ap->pagesize);
+}
+
+static uint32_t mtk_nand_header_put_hsm(const struct nand_header_type *hdr_nand,
+ void *ptr)
+{
+ memcpy(ptr, hdr_nand->hsm, sizeof(*hdr_nand->hsm));
+ return 0;
+}
+
+static uint32_t mtk_nand_header_put_hsm20(const struct nand_header_type *hdr_nand,
+ void *ptr)
+{
+ memcpy(ptr, hdr_nand->hsm20, sizeof(*hdr_nand->hsm20));
+ return 0;
+}
+
+static uint32_t mtk_nand_header_put_spim(const struct nand_header_type *hdr_nand,
+ void *ptr)
+{
+ uint16_t crc;
+
+ memcpy(ptr, hdr_nand->spim, sizeof(*hdr_nand->spim));
+
+ crc = crc16(ptr, 0x4e);
+ memcpy(ptr + 0x4e, &crc, sizeof(uint16_t));
+
+ return 0;
+}
+
+uint32_t mtk_nand_header_put(const struct nand_header_type *hdr_nand, void *ptr)
+{
+ switch (hdr_nand->type) {
+ case NAND_BOOT_HSM_HEADER:
+ return mtk_nand_header_put_hsm(hdr_nand, ptr);
+
+ case NAND_BOOT_HSM20_HEADER:
+ return mtk_nand_header_put_hsm20(hdr_nand, ptr);
+
+ case NAND_BOOT_SPIM_HEADER:
+ return mtk_nand_header_put_spim(hdr_nand, ptr);
+
+ default:
+ return mtk_nand_header_put_ap(hdr_nand, ptr);
+ }
+}
diff --git a/tools/mtk_nand_headers.h b/tools/mtk_nand_headers.h
new file mode 100644
index 0000000000..9b1c4bab11
--- /dev/null
+++ b/tools/mtk_nand_headers.h
@@ -0,0 +1,165 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * MediaTek BootROM NAND header definitions
+ *
+ * Copyright (C) 2022 MediaTek Inc.
+ * Author: Weijie Gao <weijie.gao@mediatek.com>
+ */
+
+#ifndef _MTK_NAND_HEADERS_H
+#define _MTK_NAND_HEADERS_H
+
+#include <stdint.h>
+#include <stdbool.h>
+
+struct nand_header_info {
+ uint32_t page_size;
+ uint32_t spare_size;
+ uint32_t gfh_offset;
+ bool snfi;
+};
+
+/* AP BROM Header for NAND */
+union nand_boot_header {
+ struct {
+ char name[12];
+ char version[4];
+ char id[8];
+ uint16_t ioif; /* I/O interface */
+ uint16_t pagesize; /* NAND page size */
+ uint16_t addrcycles; /* Address cycles */
+ uint16_t oobsize; /* NAND page spare size */
+ uint16_t pages_of_block; /* Pages of one block */
+ uint16_t numblocks; /* Total blocks of NAND chip */
+ uint16_t writesize_shift;
+ uint16_t erasesize_shift;
+ uint8_t dummy[60];
+ uint8_t ecc_parity[28]; /* ECC parity of this header */
+ };
+
+ uint8_t data[0x80];
+};
+
+/* HSM BROM Header for NAND */
+union hsm_nand_boot_header {
+ struct {
+ char id[8];
+ uint32_t version; /* Header version */
+ uint32_t config; /* Header config */
+ uint32_t sector_size; /* ECC step size */
+ uint32_t fdm_size; /* User OOB size of a step */
+ uint32_t fdm_ecc_size; /* ECC parity size of a step */
+ uint32_t lbs;
+ uint32_t page_size; /* NAND page size */
+ uint32_t spare_size; /* NAND page spare size */
+ uint32_t page_per_block; /* Pages of one block */
+ uint32_t blocks; /* Total blocks of NAND chip */
+ uint32_t plane_sel_position; /* Plane bit position */
+ uint32_t pll; /* Value of pll reg */
+ uint32_t acccon; /* Value of access timing reg */
+ uint32_t strobe_sel; /* Value of DQS selection reg*/
+ uint32_t acccon1; /* Value of access timing reg */
+ uint32_t dqs_mux; /* Value of DQS mux reg */
+ uint32_t dqs_ctrl; /* Value of DQS control reg */
+ uint32_t delay_ctrl; /* Value of delay ctrl reg */
+ uint32_t latch_lat; /* Value of latch latency reg */
+ uint32_t sample_delay; /* Value of sample delay reg */
+ uint32_t driving; /* Value of driving reg */
+ uint32_t bl_start; /* Bootloader start addr */
+ uint32_t bl_end; /* Bootloader end addr */
+ uint8_t ecc_parity[42]; /* ECC parity of this header */
+ };
+
+ uint8_t data[0x8E];
+};
+
+/* HSM2.0 BROM Header for NAND */
+union hsm20_nand_boot_header {
+ struct {
+ char id[8];
+ uint32_t version; /* Header version */
+ uint32_t config; /* Header config */
+ uint32_t sector_size; /* ECC step size */
+ uint32_t fdm_size; /* User OOB size of a step */
+ uint32_t fdm_ecc_size; /* ECC parity size of a step */
+ uint32_t lbs;
+ uint32_t page_size; /* NAND page size */
+ uint32_t spare_size; /* NAND page spare size */
+ uint32_t page_per_block; /* Pages of one block */
+ uint32_t blocks; /* Total blocks of NAND chip */
+ uint32_t plane_sel_position; /* Plane bit position */
+ uint32_t pll; /* Value of pll reg */
+ uint32_t acccon; /* Value of access timing reg */
+ uint32_t strobe_sel; /* Value of DQS selection reg*/
+ uint32_t acccon1; /* Value of access timing reg */
+ uint32_t dqs_mux; /* Value of DQS mux reg */
+ uint32_t dqs_ctrl; /* Value of DQS control reg */
+ uint32_t delay_ctrl; /* Value of delay ctrl reg */
+ uint32_t latch_lat; /* Value of latch latency reg */
+ uint32_t sample_delay; /* Value of sample delay reg */
+ uint32_t driving; /* Value of driving reg */
+ uint32_t reserved;
+ uint32_t bl0_start; /* Bootloader start addr */
+ uint32_t bl0_end; /* Bootloader end addr */
+ uint32_t bl0_type; /* Bootloader type */
+ uint8_t bl_reserve[84];
+ uint8_t ecc_parity[42]; /* ECC parity of this header */
+ };
+
+ uint8_t data[0xEA];
+};
+
+/* SPIM BROM Header for SPI-NAND */
+union spim_nand_boot_header {
+ struct {
+ char id[8];
+ uint32_t version; /* Header version */
+ uint32_t config; /* Header config */
+ uint32_t page_size; /* NAND page size */
+ uint32_t spare_size; /* NAND page spare size */
+ uint16_t page_per_block; /* Pages of one block */
+ uint16_t plane_sel_position; /* Plane bit position */
+ uint16_t reserve_reg;
+ uint16_t reserve_val;
+ uint16_t ecc_error; /* ECC error reg addr */
+ uint16_t ecc_mask; /* ECC error bit mask */
+ uint32_t bl_start; /* Bootloader start addr */
+ uint32_t bl_end; /* Bootloader end addr */
+ uint8_t ecc_parity[32]; /* ECC parity of this header */
+ uint32_t integrity_crc; /* CRC of this header */
+ };
+
+ uint8_t data[0x50];
+};
+
+enum nand_boot_header_type {
+ NAND_BOOT_AP_HEADER,
+ NAND_BOOT_HSM_HEADER,
+ NAND_BOOT_HSM20_HEADER,
+ NAND_BOOT_SPIM_HEADER
+};
+
+#define NAND_BOOT_NAME "BOOTLOADER!"
+#define NAND_BOOT_VERSION "V006"
+#define NAND_BOOT_ID "NFIINFO"
+
+#define HSM_NAND_BOOT_NAME "NANDCFG!"
+#define SPIM_NAND_BOOT_NAME "SPINAND!"
+
+/* Find nand header data by name */
+const struct nand_header_type *mtk_nand_header_find(const char *name);
+
+/* Device header size using this nand header */
+uint32_t mtk_nand_header_size(const struct nand_header_type *hdr_nand);
+
+/* Get nand info from nand header (page size, spare size, ...) */
+int mtk_nand_header_info(const void *ptr, struct nand_header_info *info);
+
+/* Whether given header data is valid */
+bool is_mtk_nand_header(const void *ptr);
+
+/* Generate Device header using give nand header */
+uint32_t mtk_nand_header_put(const struct nand_header_type *hdr_nand,
+ void *ptr);
+
+#endif /* _MTK_NAND_HEADERS_H */