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-rw-r--r--doc/device-tree-bindings/clock/ti,sci-clk.txt53
-rw-r--r--drivers/clk/Kconfig8
-rw-r--r--drivers/clk/Makefile1
-rw-r--r--drivers/clk/clk-ti-sci.c217
4 files changed, 279 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/clock/ti,sci-clk.txt b/doc/device-tree-bindings/clock/ti,sci-clk.txt
new file mode 100644
index 0000000000..c6fe48200c
--- /dev/null
+++ b/doc/device-tree-bindings/clock/ti,sci-clk.txt
@@ -0,0 +1,53 @@
+Texas Instruments TI SCI Clock Controller
+=========================================
+
+All clocks on Texas Instruments' SoCs that contain a System Controller,
+are only controlled by this entity. Communication between a host processor
+running an OS and the System Controller happens through a protocol known
+as TI SCI[1]. This clock implementation plugs into the common clock
+framework and makes use of the TI SCI protocol on clock API requests.
+
+[1] http://processors.wiki.ti.com/index.php/TISCI
+
+Clock Controller Node
+=====================
+The clock controller node represents the clocks managed by the SYSFW. Because
+this relies on the TI SCI protocol to communicate with the SYSFW it must be a
+child of the sysfw node.
+
+Required Properties:
+--------------------
+- compatible: Must be "ti,k2g-sci-clk"
+- #clock-cells: Must be be 2. In clock consumers, this cell represents the
+ device ID and clock ID exposed by the SYSFW firmware.
+
+Example (AM65x):
+----------------
+ dmsc: dmsc {
+ compatible = "ti,k2g-sci";
+ ...
+ k3_clks: clocks {
+ compatible = "ti,k2g-sci-clk";
+ #clock-cells = <2>;
+ };
+ };
+
+Clock Consumers
+===============
+Hardware blocks supplied by a clock should contain a "clocks" property that is
+a phandle pointing to the clock controller node along with an index representing
+the device id together with a clock ID to be passed to the SYSFW for device
+control.
+
+Required Properties:
+--------------------
+- clocks: phandle pointing to the corresponding clock node, an ID representing
+ the device, and an index representing a clock.
+
+Example (AM65x):
+----------------
+ uart2: serial@02800000 {
+ compatible = "ti,omap4-uart";
+ ...
+ clocks = <&k3_clks 0x0007 1>;
+ };
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index a99abed9e9..809eb3dacf 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -54,6 +54,14 @@ config CLK_STM32F
This clock driver adds support for RCC clock management
for STM32F4 and STM32F7 SoCs.
+config CLK_TI_SCI
+ bool "TI System Control Interface (TI SCI) clock driver"
+ depends on CLK && TI_SCI_PROTOCOL && OF_CONTROL
+ help
+ This enables the clock driver support over TI System Control Interface
+ available on some new TI's SoCs. If you wish to use clock resources
+ managed by the TI System Controller, say Y here. Otherwise, say N.
+
config CLK_HSDK
bool "Enable cgu clock driver for HSDK"
depends on CLK
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 034bf44078..82c36b7478 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -30,3 +30,4 @@ obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
obj-$(CONFIG_SANDBOX) += clk_sandbox.o
obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
obj-$(CONFIG_STM32H7) += clk_stm32h7.o
+obj-$(CONFIG_CLK_TI_SCI) += clk-ti-sci.o
diff --git a/drivers/clk/clk-ti-sci.c b/drivers/clk/clk-ti-sci.c
new file mode 100644
index 0000000000..c25415d410
--- /dev/null
+++ b/drivers/clk/clk-ti-sci.c
@@ -0,0 +1,217 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Texas Instruments System Control Interface (TI SCI) clock driver
+ *
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ * Andreas Dannenberg <dannenberg@ti.com>
+ *
+ * Loosely based on Linux kernel sci-clk.c...
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <clk-uclass.h>
+#include <linux/soc/ti/ti_sci_protocol.h>
+
+/**
+ * struct ti_sci_clk_data - clock controller information structure
+ * @sci: TI SCI handle used for communication with system controller
+ */
+struct ti_sci_clk_data {
+ const struct ti_sci_handle *sci;
+};
+
+static int ti_sci_clk_probe(struct udevice *dev)
+{
+ struct ti_sci_clk_data *data = dev_get_priv(dev);
+
+ debug("%s(dev=%p)\n", __func__, dev);
+
+ if (!data)
+ return -ENOMEM;
+
+ /* Store handle for communication with the system controller */
+ data->sci = ti_sci_get_handle(dev);
+ if (IS_ERR(data->sci))
+ return PTR_ERR(data->sci);
+
+ return 0;
+}
+
+static int ti_sci_clk_of_xlate(struct clk *clk,
+ struct ofnode_phandle_args *args)
+{
+ debug("%s(clk=%p, args_count=%d)\n", __func__, clk, args->args_count);
+
+ if (args->args_count != 2) {
+ debug("Invalid args_count: %d\n", args->args_count);
+ return -EINVAL;
+ }
+
+ /*
+ * On TI SCI-based devices, the clock provider id field is used as a
+ * device ID, and the data field is used as the associated sub-ID.
+ */
+ clk->id = args->args[0];
+ clk->data = args->args[1];
+
+ return 0;
+}
+
+static int ti_sci_clk_request(struct clk *clk)
+{
+ debug("%s(clk=%p)\n", __func__, clk);
+ return 0;
+}
+
+static int ti_sci_clk_free(struct clk *clk)
+{
+ debug("%s(clk=%p)\n", __func__, clk);
+ return 0;
+}
+
+static ulong ti_sci_clk_get_rate(struct clk *clk)
+{
+ struct ti_sci_clk_data *data = dev_get_priv(clk->dev);
+ const struct ti_sci_handle *sci = data->sci;
+ const struct ti_sci_clk_ops *cops = &sci->ops.clk_ops;
+ u64 current_freq;
+ int ret;
+
+ debug("%s(clk=%p)\n", __func__, clk);
+
+ ret = cops->get_freq(sci, clk->id, clk->data, &current_freq);
+ if (ret) {
+ dev_err(clk->dev, "%s: get_freq failed (%d)\n", __func__, ret);
+ return ret;
+ }
+
+ debug("%s(current_freq=%llu)\n", __func__, current_freq);
+
+ return current_freq;
+}
+
+static ulong ti_sci_clk_set_rate(struct clk *clk, ulong rate)
+{
+ struct ti_sci_clk_data *data = dev_get_priv(clk->dev);
+ const struct ti_sci_handle *sci = data->sci;
+ const struct ti_sci_clk_ops *cops = &sci->ops.clk_ops;
+ int ret;
+
+ debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
+
+ /* Ask for exact frequency by using same value for min/target/max */
+ ret = cops->set_freq(sci, clk->id, clk->data, rate, rate, rate);
+ if (ret)
+ dev_err(clk->dev, "%s: set_freq failed (%d)\n", __func__, ret);
+
+ return ret;
+}
+
+static int ti_sci_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+ struct ti_sci_clk_data *data = dev_get_priv(clk->dev);
+ const struct ti_sci_handle *sci = data->sci;
+ const struct ti_sci_clk_ops *cops = &sci->ops.clk_ops;
+ u8 num_parents;
+ u8 parent_cid;
+ int ret;
+
+ debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
+
+ /* Make sure the clock parent is valid for a given device ID */
+ if (clk->id != parent->id)
+ return -EINVAL;
+
+ /* Make sure clock has parents that can be set */
+ ret = cops->get_num_parents(sci, clk->id, clk->data, &num_parents);
+ if (ret) {
+ dev_err(clk->dev, "%s: get_num_parents failed (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ if (num_parents < 2) {
+ dev_err(clk->dev, "%s: clock has no settable parents!\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ /* Make sure parent clock ID is valid */
+ parent_cid = parent->data - clk->data - 1;
+ if (parent_cid >= num_parents) {
+ dev_err(clk->dev, "%s: invalid parent clock!\n", __func__);
+ return -EINVAL;
+ }
+
+ /* Ready to proceed to configure the new clock parent */
+ ret = cops->set_parent(sci, clk->id, clk->data, parent->data);
+ if (ret)
+ dev_err(clk->dev, "%s: set_parent failed (%d)\n", __func__,
+ ret);
+
+ return ret;
+}
+
+static int ti_sci_clk_enable(struct clk *clk)
+{
+ struct ti_sci_clk_data *data = dev_get_priv(clk->dev);
+ const struct ti_sci_handle *sci = data->sci;
+ const struct ti_sci_clk_ops *cops = &sci->ops.clk_ops;
+ int ret;
+
+ debug("%s(clk=%p)\n", __func__, clk);
+
+ /*
+ * Allow the System Controller to automatically manage the state of
+ * this clock. If the device is enabled, then the clock is enabled.
+ */
+ ret = cops->put_clock(sci, clk->id, clk->data);
+ if (ret)
+ dev_err(clk->dev, "%s: put_clock failed (%d)\n", __func__, ret);
+
+ return ret;
+}
+
+static int ti_sci_clk_disable(struct clk *clk)
+{
+ struct ti_sci_clk_data *data = dev_get_priv(clk->dev);
+ const struct ti_sci_handle *sci = data->sci;
+ const struct ti_sci_clk_ops *cops = &sci->ops.clk_ops;
+ int ret;
+
+ debug("%s(clk=%p)\n", __func__, clk);
+
+ /* Unconditionally disable clock, regardless of state of the device */
+ ret = cops->idle_clock(sci, clk->id, clk->data);
+ if (ret)
+ dev_err(clk->dev, "%s: idle_clock failed (%d)\n", __func__,
+ ret);
+
+ return ret;
+}
+
+static const struct udevice_id ti_sci_clk_of_match[] = {
+ { .compatible = "ti,k2g-sci-clk" },
+ { /* sentinel */ },
+};
+
+static struct clk_ops ti_sci_clk_ops = {
+ .of_xlate = ti_sci_clk_of_xlate,
+ .request = ti_sci_clk_request,
+ .free = ti_sci_clk_free,
+ .get_rate = ti_sci_clk_get_rate,
+ .set_rate = ti_sci_clk_set_rate,
+ .set_parent = ti_sci_clk_set_parent,
+ .enable = ti_sci_clk_enable,
+ .disable = ti_sci_clk_disable,
+};
+
+U_BOOT_DRIVER(ti_sci_clk) = {
+ .name = "ti-sci-clk",
+ .id = UCLASS_CLK,
+ .of_match = ti_sci_clk_of_match,
+ .probe = ti_sci_clk_probe,
+ .priv_auto_alloc_size = sizeof(struct ti_sci_clk_data),
+ .ops = &ti_sci_clk_ops,
+};
generated by cgit v1.2.3 (git 2.39.0) at 2024-10-15 22:19:13 +0300