diff options
| -rw-r--r-- | arch/riscv/cpu/jh7110/Makefile | 2 | ||||
| -rw-r--r-- | arch/riscv/cpu/jh7110/spl.c | 6 | ||||
| -rw-r--r-- | drivers/ram/starfive/starfive_ddr.c | 2 |
3 files changed, 7 insertions, 3 deletions
diff --git a/arch/riscv/cpu/jh7110/Makefile b/arch/riscv/cpu/jh7110/Makefile index 57a76f06b5..74ce2d8fbc 100644 --- a/arch/riscv/cpu/jh7110/Makefile +++ b/arch/riscv/cpu/jh7110/Makefile @@ -5,8 +5,8 @@ ifeq ($(CONFIG_SPL_BUILD),y) obj-y += spl.o else -obj-y += dram.o obj-y += cpu.o obj-$(CONFIG_STARFIVE_JH7110_L2CC_FLUSH) += cache.o endif +obj-y += dram.o obj-y += pll.o diff --git a/arch/riscv/cpu/jh7110/spl.c b/arch/riscv/cpu/jh7110/spl.c index 2a49fbee10..cba9874459 100644 --- a/arch/riscv/cpu/jh7110/spl.c +++ b/arch/riscv/cpu/jh7110/spl.c @@ -8,6 +8,7 @@ #include <dm.h> #include <log.h> #include <asm/csr.h> +#include <init.h> #define CSR_U74_FEATURE_DISABLE 0x7c1 @@ -16,6 +17,11 @@ int spl_soc_init(void) int ret; struct udevice *dev; + /*read memory size info from eeprom and + *init gd->ram_size variable + */ + dram_init(); + /* DDR init */ ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret) { diff --git a/drivers/ram/starfive/starfive_ddr.c b/drivers/ram/starfive/starfive_ddr.c index d66d23a93d..251969a58f 100644 --- a/drivers/ram/starfive/starfive_ddr.c +++ b/drivers/ram/starfive/starfive_ddr.c @@ -127,8 +127,6 @@ static int starfive_ddr_probe(struct udevice *dev) if (ret) goto err_osc; - /* Read memory base and size from DT */ - fdtdec_setup_mem_size_base(); priv->info.base = gd->ram_base; priv->info.size = gd->ram_size; |