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-rw-r--r--drivers/pci/pcie_layerscape.h9
-rw-r--r--drivers/pci/pcie_layerscape_ep.c8
2 files changed, 15 insertions, 2 deletions
diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h
index 5f5c51d3d6..593798e3e3 100644
--- a/drivers/pci/pcie_layerscape.h
+++ b/drivers/pci/pcie_layerscape.h
@@ -100,7 +100,7 @@
#define PCIE_SRIOV_VFBAR0 0x19C
-#define PCIE_MASK_OFFSET(flag, pf) ((flag) ? 0 : (0x1000 + 0x20000 * (pf)))
+#define PCIE_MASK_OFFSET(flag, pf, off) ((flag) ? 0 : (0x1000 + (off) * (pf)))
/* LUT registers */
#define PCIE_LUT_UDR(n) (0x800 + (n) * 8)
@@ -139,6 +139,12 @@
#define LS1021_PEXMSCPORTSR(pex_idx) (0x94 + (pex_idx) * 4)
#define LS1021_LTSSM_STATE_SHIFT 20
+/* LX2160a PF1 offset */
+#define LX2160_PCIE_PF1_OFFSET 0x8000
+
+/* layerscape PF1 offset */
+#define LS_PCIE_PF1_OFFSET 0x20000
+
struct ls_pcie {
void __iomem *dbi;
void __iomem *lut;
@@ -170,6 +176,7 @@ struct ls_pcie_ep {
void __iomem *addr;
u32 cfg2_flag;
u32 sriov_flag;
+ u32 pf1_offset;
u32 num_ib_wins;
u32 num_ob_wins;
u8 max_functions;
diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c
index 52d6397064..eba230e3a5 100644
--- a/drivers/pci/pcie_layerscape_ep.c
+++ b/drivers/pci/pcie_layerscape_ep.c
@@ -198,7 +198,8 @@ static void ls_pcie_setup_ep(struct ls_pcie_ep *pcie_ep)
writel(0, pcie->dbi + PCIE_MISC_CONTROL_1_OFF);
bar_base = pcie->dbi +
- PCIE_MASK_OFFSET(pcie_ep->cfg2_flag, pf);
+ PCIE_MASK_OFFSET(pcie_ep->cfg2_flag, pf,
+ pcie_ep->pf1_offset);
if (pcie_ep->cfg2_flag) {
ctrl_writel(pcie,
@@ -271,6 +272,11 @@ static int ls_pcie_ep_probe(struct udevice *dev)
svr = SVR_SOC_VER(get_svr());
+ if (svr == SVR_LX2160A)
+ pcie_ep->pf1_offset = LX2160_PCIE_PF1_OFFSET;
+ else
+ pcie_ep->pf1_offset = LS_PCIE_PF1_OFFSET;
+
if (svr == SVR_LS2080A || svr == SVR_LS2085A)
pcie_ep->cfg2_flag = 1;
else