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-rw-r--r--drivers/video/Kconfig8
-rw-r--r--drivers/video/fsl_dcu_fb.c45
-rw-r--r--include/fsl_dcu_fb.h1
3 files changed, 51 insertions, 3 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 6aab8af1b3..d1b017cfad 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -402,6 +402,14 @@ config VIDEO_FSL_DCU_FB
This enables support for Freescale Display Control Unit (DCU4)
module found on Freescale Vybrid and QorIQ family of SoCs.
+config VIDEO_FSL_DCU_MAX_FB_SIZE_MB
+ int "Freescale DCU framebuffer size"
+ depends on VIDEO_FSL_DCU_FB
+ default 4194304
+ help
+ Set maximum framebuffer size to be used for Freescale Display
+ Controller Unit (DCU4).
+
config VIDEO_ROCKCHIP
bool "Enable Rockchip video support"
depends on DM_VIDEO
diff --git a/drivers/video/fsl_dcu_fb.c b/drivers/video/fsl_dcu_fb.c
index d4cd382776..7f03290b74 100644
--- a/drivers/video/fsl_dcu_fb.c
+++ b/drivers/video/fsl_dcu_fb.c
@@ -8,6 +8,7 @@
#include <asm/io.h>
#include <common.h>
+#include <fdt_support.h>
#include <fsl_dcu_fb.h>
#include <linux/fb.h>
#include <malloc.h>
@@ -79,6 +80,8 @@
#define BPP_24_RGB888 5
#define BPP_32_ARGB8888 6
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* This setting is used for the TWR_LCD_RGB card
*/
@@ -254,11 +257,19 @@ int fsl_dcu_init(unsigned int xres, unsigned int yres,
struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR;
unsigned int div, mode;
- /* Memory allocation for framebuffer */
info.screen_size =
info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8);
- info.screen_base = (char *)memalign(ARCH_DMA_MINALIGN,
- roundup(info.screen_size, ARCH_DMA_MINALIGN));
+
+ if (info.screen_size > CONFIG_VIDEO_FSL_DCU_MAX_FB_SIZE_MB) {
+ info.screen_size = 0;
+ return -ENOMEM;
+ }
+
+ /* Reserve framebuffer at the end of memory */
+ gd->fb_base = gd->bd->bi_dram[0].start +
+ gd->bd->bi_dram[0].size - info.screen_size;
+ info.screen_base = (char *)gd->fb_base;
+
memset(info.screen_base, 0, info.screen_size);
reset_total_layers();
@@ -305,6 +316,11 @@ int fsl_dcu_init(unsigned int xres, unsigned int yres,
return 0;
}
+ulong board_get_usable_ram_top(ulong total_size)
+{
+ return gd->ram_top - CONFIG_VIDEO_FSL_DCU_MAX_FB_SIZE_MB;
+}
+
void *video_hw_init(void)
{
static GraphicDevice ctfb;
@@ -363,3 +379,26 @@ void *video_hw_init(void)
return &ctfb;
}
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+int fsl_dcu_fixedfb_setup(void *blob)
+{
+ u64 start, size;
+ int ret;
+
+ start = gd->bd->bi_dram[0].start;
+ size = gd->bd->bi_dram[0].size - info.screen_size;
+
+ /*
+ * Align size on section size (1 MiB).
+ */
+ size &= 0xfff00000;
+ ret = fdt_fixup_memory_banks(blob, &start, &size, 1);
+ if (ret) {
+ eprintf("Cannot setup fb: Error reserving memory\n");
+ return ret;
+ }
+
+ return 0;
+}
+#endif
diff --git a/include/fsl_dcu_fb.h b/include/fsl_dcu_fb.h
index 42632984d3..67e29e74e6 100644
--- a/include/fsl_dcu_fb.h
+++ b/include/fsl_dcu_fb.h
@@ -9,6 +9,7 @@
int fsl_dcu_init(unsigned int xres, unsigned int yres,
unsigned int pixel_format);
+int fsl_dcu_fixedfb_setup(void *blob);
/* Prototypes for external board-specific functions */
int platform_dcu_init(unsigned int xres, unsigned int yres,