diff options
| -rwxr-xr-x[-rw-r--r--] | arch/riscv/include/asm/arch-jh7110/jh7110-regs.h | 16 | ||||
| -rwxr-xr-x[-rw-r--r--] | board/starfive/visionfive/starfive_visionfive.c | 38 |
2 files changed, 53 insertions, 1 deletions
diff --git a/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h b/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h index 9b17e8bfe6..89724813d8 100644..100755 --- a/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h +++ b/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h @@ -13,6 +13,10 @@ #define SYS_SYSCON_BASE 0x13030000 #define SYS_IOMUX_BASE 0x13040000 #define AON_SYSCON_BASE 0x17010000 +#define SYS_CRG_BASE 0x13020000 +#define CLK_ENABLE_MASK 0x80000000U +#define SYS_CRG_RESET_ASSERT3_SHIFT 0X304U +#define SYS_CRG_RESET_STATUS3_SHIFT 0X314U /*gmac cfg*/ #define AON_SYSCFG_12 0xCU @@ -41,5 +45,17 @@ #define IOMUX_USB_SHIFT 0x10U #define IOMUX_USB_MASK 0x7F0000U +/*timer cfg*/ +#define TIMER_CLK_APB_SHIFT 0x1F0U +#define TIMER_CLK_TIMER0_SHIFT 0x1F4U +#define TIMER_CLK_TIMER1_SHIFT 0x1F8U +#define TIMER_CLK_TIMER2_SHIFT 0x1FCU +#define TIMER_CLK_TIMER3_SHIFT 0x200U +#define TIMER_RSTN_APB_SHIFT 21 +#define TIMER_RSTN_TIMER0_SHIFT 22 +#define TIMER_RSTN_TIMER1_SHIFT 23 +#define TIMER_RSTN_TIMER2_SHIFT 24 +#define TIMER_RSTN_TIMER3_SHIFT 25 + #endif /* __STARFIVE_JH7110_REGS_H */ diff --git a/board/starfive/visionfive/starfive_visionfive.c b/board/starfive/visionfive/starfive_visionfive.c index 6a8f8319a0..7f9de3d9de 100644..100755 --- a/board/starfive/visionfive/starfive_visionfive.c +++ b/board/starfive/visionfive/starfive_visionfive.c @@ -37,6 +37,39 @@ SYS_IOMUX_DOUT(gpio, gpo);\ SYS_IOMUX_DIN(gpio, gpi); }while(0) +#define SYS_CLOCK_ENABLE(clk) \ + setbits_le32(SYS_CRG_BASE + clk, CLK_ENABLE_MASK) + +static void sys_reset_clear(ulong assert, ulong status, u32 rst) +{ + volatile u32 value; + + clrbits_le32(SYS_CRG_BASE + assert, BIT(rst)); + do{ + value = in_le32(SYS_CRG_BASE + status); + }while((value & BIT(rst)) != BIT(rst)); +} + +static void jh7110_timer_init(void) +{ + SYS_CLOCK_ENABLE(TIMER_CLK_APB_SHIFT); + SYS_CLOCK_ENABLE(TIMER_CLK_TIMER0_SHIFT); + SYS_CLOCK_ENABLE(TIMER_CLK_TIMER1_SHIFT); + SYS_CLOCK_ENABLE(TIMER_CLK_TIMER2_SHIFT); + SYS_CLOCK_ENABLE(TIMER_CLK_TIMER3_SHIFT); + + sys_reset_clear(SYS_CRG_RESET_ASSERT3_SHIFT, + SYS_CRG_RESET_STATUS3_SHIFT, TIMER_RSTN_APB_SHIFT); + sys_reset_clear(SYS_CRG_RESET_ASSERT3_SHIFT, + SYS_CRG_RESET_STATUS3_SHIFT, TIMER_RSTN_TIMER0_SHIFT); + sys_reset_clear(SYS_CRG_RESET_ASSERT3_SHIFT, + SYS_CRG_RESET_STATUS3_SHIFT, TIMER_RSTN_TIMER1_SHIFT); + sys_reset_clear(SYS_CRG_RESET_ASSERT3_SHIFT, + SYS_CRG_RESET_STATUS3_SHIFT, TIMER_RSTN_TIMER2_SHIFT); + sys_reset_clear(SYS_CRG_RESET_ASSERT3_SHIFT, + SYS_CRG_RESET_STATUS3_SHIFT, TIMER_RSTN_TIMER3_SHIFT); +} + static void jh7110_gmac_init(int id) { switch (id) { @@ -129,6 +162,8 @@ int board_init(void) jh7110_gmac_init(0); jh7110_gmac_init(1); + jh7110_timer_init(); + jh7110_usb_init(); jh7110_mmc_init(0); @@ -160,7 +195,8 @@ int misc_init_r(void) if (ret) printf("%s: error reading mac from OTP\n", __func__); else - memcpy(mac, buf, 6); + if (buf[0] != 0xff) + memcpy(mac, buf, 6); err: #endif eth_env_set_enetaddr("ethaddr", mac); |