diff options
858 files changed, 1639 insertions, 3997 deletions
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 8801ff7d81..670bbc0e16 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -49,6 +49,33 @@ jobs: -j$(sysctl -n hw.logicalcpu) displayName: 'Perform tools-only build' + - job: check_for_migrated_symbols_in_board_header + displayName: 'Check for migrated symbols in board header' + pool: + vmImage: $(ubuntu_vm) + container: + image: $(ci_runner_image) + options: $(container_option) + steps: + - script: | + KSYMLST=`mktemp` + KUSEDLST=`mktemp` + cat `find . -name "Kconfig*"` | \ + sed -n -e 's/^\s*config *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \ + -e 's/^\s*menuconfig *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \ + | sort -u > $KSYMLST + for CFG in `find include/configs -name "*.h"`; do + grep '#define[[:blank:]]CONFIG_' $CFG | \ + sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' | \ + sort -u > ${KUSEDLST} || true + NUM=`comm -12 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} | \ + cut -d , -f 3` + if [[ $NUM -ne 0 ]]; then + echo "Unmigrated symbols found in $CFG" + exit 1 + fi + done + - job: cppcheck displayName: 'Static code analysis with cppcheck' pool: diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 4c89daeadc..d06cca45fd 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -105,6 +105,27 @@ build all other platforms: exit $ret; fi; +check for migrated symbols in board header: + stage: testsuites + script: + - KSYMLST=`mktemp`; + KUSEDLST=`mktemp`; + cat `find . -name "Kconfig*"` | + sed -n -e 's/^\s*config *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' + -e 's/^\s*menuconfig *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' + | sort -u > $KSYMLST; + for CFG in `find include/configs -name "*.h"`; do + grep '#define[[:blank:]]CONFIG_' $CFG | + sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' | + sort -u > ${KUSEDLST} || true; + NUM=`comm -12 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} | + cut -d , -f 3`; + if [[ $NUM -ne 0 ]]; then + echo "Unmigrated symbols found in $CFG"; + exit 1; + fi; + done + # QA jobs for code analytics # static code analysis with cppcheck (we can add --enable=all later) cppcheck: @@ -565,11 +565,6 @@ The following options need to be configured: boards with QUICC Engines require OF_QE to set UCC MAC addresses - CONFIG_OF_BOARD_SETUP - - Board code has addition modification that it wants to make - to the flat device tree before handing it off to the kernel - CONFIG_OF_SYSTEM_SETUP Other code has addition modification that it wants to make @@ -596,9 +591,6 @@ The following options need to be configured: Note: If a "bootargs" environment is defined, it will override the defaults discussed just above. -- Cache Configuration: - CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot - - Cache Configuration for ARM: CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache controller @@ -647,20 +639,6 @@ The following options need to be configured: example "env grep" and "setexpr". - Watchdog: - CONFIG_WATCHDOG - If this variable is defined, it enables watchdog - support for the SoC. There must be support in the SoC - specific code for a watchdog. For the 8xx - CPUs, the SIU Watchdog feature is enabled in the SYPCR - register. When supported for a specific SoC is - available, then no further board specific code should - be needed to use it. - - CONFIG_HW_WATCHDOG - When using a watchdog circuitry external to the used - SoC, then define this variable and provide board - specific code for the "hw_watchdog_reset" function. - CONFIG_SYS_WATCHDOG_FREQ Some platforms automatically call WATCHDOG_RESET() from the timer interrupt handler every @@ -1021,9 +999,6 @@ The following options need to be configured: sending again an USB request to the device. - Journaling Flash filesystem support: - CONFIG_JFFS2_NAND - Define these for a default partition on a NAND device - CONFIG_SYS_JFFS2_FIRST_SECTOR, CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS Define these for a default partition on a NOR device @@ -1520,16 +1495,6 @@ The following options need to be configured: SPI EEPROM, also an instance works with Crystal A/D and D/As on the SACSng board) - CONFIG_SOFT_SPI - - Enables a software (bit-bang) SPI driver rather than - using hardware support. This is a general purpose - driver that only requires three general I/O port pins - (two outputs, one input) to function. If this is - defined, the board configuration must define several - SPI configuration items (port pins to use, etc). For - an example, see include/configs/sacsng.h. - CONFIG_SYS_SPI_MXC_WAIT Timeout for waiting until spi transfer completed. default: (CONFIG_SYS_HZ/100) /* 10 ms */ @@ -1595,13 +1560,6 @@ The following options need to be configured: Time to wait after FPGA configuration. The default is 200 ms. -- Configuration Management: - - CONFIG_IDENT_STRING - - If defined, this string will be added to the U-Boot - version information (U_BOOT_VERSION) - - Vendor Parameter Protection: U-Boot considers the values of the environment @@ -1922,10 +1880,6 @@ The following options need to be configured: CONFIG_SPL_INIT_MINIMAL Arch init code should be built for a very small image - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION - Partition on the MMC to load U-Boot from when the MMC is being - used in raw mode - CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR Sector to load kernel uImage from when MMC is being used in raw mode (for Falcon mode) diff --git a/arch/Kconfig b/arch/Kconfig index 39156067b2..ee32e8366e 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1,3 +1,7 @@ +config ARCH_MAP_SYSMEM + depends on SANDBOX || NDS32 + def_bool y + config CREATE_ARCH_SYMLINK bool @@ -353,6 +357,18 @@ config SYS_DISABLE_DCACHE_OPS Note that, its up to the individual architectures to implement this functionality. +config SYS_IMMR + hex + depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A + default 0xFF000000 if MPC8xx + default 0xF0000000 if ARCH_MPC8313 + default 0xE0000000 if MPC83xx && !ARCH_MPC8313 + default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 + default SYS_CCSRBAR_DEFAULT + help + Address for the Internal Memory-Mapped Registers (IMMR) window used + to configure the features of many Freescale / NXP SoCs. + config SKIP_LOWLEVEL_INIT bool "Skip the calls to certain low level initialization functions" depends on ARM || NDS32 || MIPS || RISCV diff --git a/arch/arc/lib/cpu.c b/arch/arc/lib/cpu.c index 07f57878ef..6b215206a2 100644 --- a/arch/arc/lib/cpu.c +++ b/arch/arc/lib/cpu.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <init.h> #include <malloc.h> #include <vsprintf.h> @@ -18,7 +19,7 @@ int arch_cpu_init(void) { timer_init(); - gd->cpu_clk = CONFIG_SYS_CLK_FREQ; + gd->cpu_clk = get_board_sys_clk(); gd->ram_size = CONFIG_SYS_SDRAM_SIZE; cache_init(); diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 85c964b7a1..7264d72bde 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -311,6 +311,10 @@ config CPU_PXA select SYS_CACHE_SHIFT_5 imply SYS_ARM_MMU +config CPU_PXA27X + bool + select CPU_PXA + config CPU_SA1100 bool select SYS_CACHE_SHIFT_5 @@ -1767,7 +1771,7 @@ config TARGET_SL28 config TARGET_COLIBRI_PXA270 bool "Support colibri_pxa270" - select CPU_PXA + select CPU_PXA27X select GPIO_EXTRA_HEADER config ARCH_UNIPHIER @@ -1909,6 +1913,7 @@ config ARCH_OCTEONTX select OF_LIVE select BOARD_LATE_INIT select SYS_CACHE_SHIFT_7 + select SYS_PCI_64BIT if PCI imply OF_HAS_PRIOR_STAGE config ARCH_OCTEONTX2 @@ -1921,6 +1926,7 @@ config ARCH_OCTEONTX2 select OF_LIVE select BOARD_LATE_INIT select SYS_CACHE_SHIFT_7 + select SYS_PCI_64BIT if PCI imply OF_HAS_PRIOR_STAGE config TARGET_THUNDERX_88XX @@ -2046,6 +2052,14 @@ config ISW_ENTRY_ADDR image headers. endif +config SYS_KWD_CONFIG + string "kwbimage config file path" + depends on ARCH_KIRKWOOD || ARCH_MVEBU + default "arch/arm/mach-mvebu/kwbimage.cfg" + help + Path within the source directory to the kwbimage.cfg file to use + when packaging the U-Boot image for use. + source "arch/arm/mach-apple/Kconfig" source "arch/arm/mach-aspeed/Kconfig" diff --git a/arch/arm/cpu/arm920t/ep93xx/speed.c b/arch/arm/cpu/arm920t/ep93xx/speed.c index 51e9dda055..8dd3904e82 100644 --- a/arch/arm/cpu/arm920t/ep93xx/speed.c +++ b/arch/arm/cpu/arm920t/ep93xx/speed.c @@ -6,12 +6,13 @@ */ #include <common.h> +#include <clock_legacy.h> #include <asm/arch/ep93xx.h> #include <asm/io.h> #include <div64.h> /* - * CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL. + * get_board_sys_clk() should be defined as the input frequency of the PLL. * * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of * the specified bus in HZ. @@ -20,14 +21,14 @@ /* * return the PLL output frequency * - * PLL rate = CONFIG_SYS_CLK_FREQ * (X1FBD + 1) * (X2FBD + 1) + * PLL rate = get_board_sys_clk() * (X1FBD + 1) * (X2FBD + 1) * / (X2IPD + 1) / 2^PS */ static ulong get_PLLCLK(uint32_t *pllreg) { uint8_t i; const uint32_t clkset = readl(pllreg); - uint64_t rate = CONFIG_SYS_CLK_FREQ; + uint64_t rate = get_board_sys_clk(); rate *= ((clkset >> SYSCON_CLKSET_PLL_X1FBD1_SHIFT) & 0x1f) + 1; rate *= ((clkset >> SYSCON_CLKSET_PLL_X2FBD2_SHIFT) & 0x3f) + 1; do_div(rate, (clkset & 0x1f) + 1); /* X2IPD */ @@ -87,9 +88,9 @@ ulong get_UCLK(void) const uint32_t value = readl(&syscon->pwrcnt); if (value & SYSCON_PWRCNT_UART_BAUD) - uclk_rate = CONFIG_SYS_CLK_FREQ; + uclk_rate = get_board_sys_clk(); else - uclk_rate = CONFIG_SYS_CLK_FREQ / 2; + uclk_rate = get_board_sys_clk() / 2; return uclk_rate; } diff --git a/arch/arm/cpu/arm920t/imx/speed.c b/arch/arm/cpu/arm920t/imx/speed.c index eff611319d..c19206ac39 100644 --- a/arch/arm/cpu/arm920t/imx/speed.c +++ b/arch/arm/cpu/arm920t/imx/speed.c @@ -7,13 +7,14 @@ #include <common.h> #if defined (CONFIG_IMX) +#include <clock_legacy.h> #include <asm/arch/imx-regs.h> /* ------------------------------------------------------------------------- */ /* NOTE: This describes the proper use of this file. * - * CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL. + * get_board_sys_clk() should be defined as the input frequency of the PLL. * SH FIXME: 16780000 in our case * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of * the specified bus in HZ. @@ -45,7 +46,7 @@ ulong get_mcuPLLCLK(void) mfi = mfi<=5 ? 5 : mfi; - return (2*(CONFIG_SYS_CLK_FREQ>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1); + return (2*(get_board_sys_clk()>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1); } ulong get_FCLK(void) diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index f919d02db4..6a948d7ba7 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -1,5 +1,6 @@ config ARCH_LS1021A bool + select FSL_IFC if !QSPI_BOOT && !SD_BOOT_QSPI select SYS_FSL_DDR_BE if SYS_FSL_DDR select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR select SYS_FSL_ERRATUM_A008378 diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c b/arch/arm/cpu/armv7/ls102xa/clock.c index 984ae8b87b..c5e6118cba 100644 --- a/arch/arm/cpu/armv7/ls102xa/clock.c +++ b/arch/arm/cpu/armv7/ls102xa/clock.c @@ -39,7 +39,7 @@ void get_sys_info(struct sys_info *sys_info) uint i; uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS]; uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; - unsigned long sysclk = CONFIG_SYS_CLK_FREQ; + unsigned long sysclk = get_board_sys_clk(); sys_info->freq_systembus = sysclk; #if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ) diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c index bf6cc6d4e7..e63a905eda 100644 --- a/arch/arm/cpu/armv7/ls102xa/fdt.c +++ b/arch/arm/cpu/armv7/ls102xa/fdt.c @@ -131,9 +131,9 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) sysclk_path = fdt_get_alias(blob, "sysclk"); if (sysclk_path) do_fixup_by_path_u32(blob, sysclk_path, "clock-frequency", - CONFIG_SYS_CLK_FREQ, 1); + get_board_sys_clk(), 1); do_fixup_by_compat_u32(blob, "fsl,qoriq-sysclk-2.0", - "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); + "clock-frequency", get_board_sys_clk(), 1); #if defined(CONFIG_DEEP_SLEEP) && defined(CONFIG_SD_BOOT) #define UBOOT_HEAD_LEN 0x1000 diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index a6ac897ab3..da53afcea9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -41,6 +41,7 @@ config ARCH_LS1028A select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_LE select FSL_TZASC_1 + select FSL_TZPC_BP147 select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC @@ -59,6 +60,7 @@ config ARCH_LS1043A bool select ARMV8_SET_SMPEN select ARM_ERRATA_855873 if !TFABOOT + select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI) select FSL_LAYERSCAPE select FSL_LSCH2 select GICV2 @@ -94,6 +96,7 @@ config ARCH_LS1043A config ARCH_LS1046A bool select ARMV8_SET_SMPEN + select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI) select FSL_LAYERSCAPE select FSL_LSCH2 select GICV2 @@ -134,6 +137,7 @@ config ARCH_LS1088A bool select ARMV8_SET_SMPEN select ARM_ERRATA_855873 if !TFABOOT + select FSL_IFC select FSL_LAYERSCAPE select FSL_LSCH3 select GICV3 @@ -182,6 +186,7 @@ config ARCH_LS2080A select ARM_ERRATA_828024 select ARM_ERRATA_829520 select ARM_ERRATA_833471 + select FSL_IFC select FSL_LAYERSCAPE select FSL_LSCH3 select GICV3 @@ -237,6 +242,7 @@ config ARCH_LX2162A select FSL_DDR_INTERACTIVE select FSL_LAYERSCAPE select FSL_LSCH3 + select FSL_TZPC_BP147 select GICV3 select NXP_LSCH3_2 select SYS_HAS_SERDES @@ -256,6 +262,7 @@ config ARCH_LX2162A select SYS_FSL_HAS_DDR4 select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_LE + select SYS_PCI_64BIT if PCI select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC @@ -273,6 +280,7 @@ config ARCH_LX2160A select FSL_DDR_INTERACTIVE select FSL_LAYERSCAPE select FSL_LSCH3 + select FSL_TZPC_BP147 select GICV3 select HAS_FSL_XHCI_USB if USB_HOST select NXP_LSCH3_2 @@ -294,6 +302,7 @@ config ARCH_LX2160A select SYS_FSL_HAS_DDR4 select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_LE + select SYS_PCI_64BIT if PCI select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC @@ -521,10 +530,6 @@ endmenu menu "Layerscape clock tree configuration" depends on FSL_LSCH2 || FSL_LSCH3 -config SYS_FSL_CLK - bool "Enable clock tree initialization" - default y - config CLUSTER_CLK_FREQ int "Reference clock of core cluster" depends on ARCH_LS1012A diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 1a359d060e..2ded3e4efc 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <cpu_func.h> #include <env.h> #include <fsl_ddr_sdram.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index 4ec0dbf516..4354aa251e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -161,7 +161,7 @@ void fsl_fdt_disable_usb(void *blob) * controller is used, SYSCLK must meet the additional requirement * of 100 MHz. */ - if (CONFIG_SYS_CLK_FREQ != 100000000) { + if (get_board_sys_clk() != 100000000) { off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3"); while (off != -FDT_ERR_NOTFOUND) { fdt_status_disabled(blob, off); @@ -655,7 +655,7 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) #endif do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency", - CONFIG_SYS_CLK_FREQ, 1); + get_board_sys_clk(), 1); #ifdef CONFIG_GIC_V3_ITS ls_gic_rd_tables_init(blob); diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c index 3f97c8aee4..570105a75e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c @@ -52,12 +52,12 @@ void get_sys_info(struct sys_info *sys_info) uint i, cluster; uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS]; uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; - unsigned long sysclk = CONFIG_SYS_CLK_FREQ; + unsigned long sysclk = get_board_sys_clk(); unsigned long cluster_clk; sys_info->freq_systembus = sysclk; #ifndef CONFIG_CLUSTER_CLK_FREQ -#define CONFIG_CLUSTER_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_CLUSTER_CLK_FREQ get_board_sys_clk() #endif cluster_clk = CONFIG_CLUSTER_CLK_FREQ; diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c index 6f50cbad2b..1c04a5b5b7 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c @@ -72,7 +72,7 @@ void get_sys_info(struct sys_info *sys_info) #endif uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS]; uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; - unsigned long sysclk = CONFIG_SYS_CLK_FREQ; + unsigned long sysclk = get_board_sys_clk(); int cc_group[12] = CONFIG_SYS_FSL_CLUSTER_CLOCKS; u32 c_pll_sel, cplx_pll; void *offset; diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c index d28ab26533..2e2688eadc 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <cpu_func.h> #include <image.h> #include <log.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index 68111b6eff..564cc27c8b 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -93,7 +93,9 @@ void board_init_f(ulong dummy) i2c_init_all(); #endif #endif -#ifdef CONFIG_VID +#if defined(CONFIG_VID) && (defined(CONFIG_ARCH_LS1088A) || \ + defined(CONFIG_ARCH_LX2160A) || \ + defined(CONFIG_ARCH_LX2162A)) init_func_vid(); #endif dram_init(); diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 733373ecf0..1315bebb56 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -234,7 +234,6 @@ #elif defined(CONFIG_ARCH_LS1028A) #define CONFIG_SYS_FSL_NUM_CC_PLLS 3 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 } -#define CONFIG_FSL_TZPC_BP147 #define CONFIG_FSL_TZASC_400 /* TZ Protection Controller Definitions */ diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index c9be0768e3..06adf66939 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -11,7 +11,6 @@ #include <linux/bitops.h> #endif -#define CONFIG_SYS_IMMR 0x01000000 #define CONFIG_SYS_DCSRBAR 0x20000000 #define CONFIG_SYS_DCSR_DCFG_ADDR (CONFIG_SYS_DCSRBAR + 0x00140000) #define CONFIG_SYS_DCSR_COP_CCP_ADDR (CONFIG_SYS_DCSRBAR + 0x02008040) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index b64d7fbc1b..863618a5f3 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -9,7 +9,6 @@ #ifndef __ARCH_FSL_LSCH3_IMMAP_H_ #define __ARCH_FSL_LSCH3_IMMAP_H_ -#define CONFIG_SYS_IMMR 0x01000000 #define CONFIG_SYS_FSL_DDR_ADDR (CONFIG_SYS_IMMR + 0x00080000) #define CONFIG_SYS_FSL_DDR2_ADDR (CONFIG_SYS_IMMR + 0x00090000) #define CONFIG_SYS_FSL_DDR3_ADDR 0x08210000 diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 3884948a2c..0e1f9e0c0d 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -11,7 +11,6 @@ #define OCRAM_BASE_S_ADDR 0x10010000 #define OCRAM_S_SIZE 0x00010000 -#define CONFIG_SYS_IMMR 0x01000000 #define CONFIG_SYS_DCSRBAR 0x20000000 #define CONFIG_SYS_DCSR_DCFG_ADDR (CONFIG_SYS_DCSRBAR + 0x00220000) diff --git a/arch/arm/mach-apple/Kconfig b/arch/arm/mach-apple/Kconfig index 66cab91b2a..80e8eb2307 100644 --- a/arch/arm/mach-apple/Kconfig +++ b/arch/arm/mach-apple/Kconfig @@ -15,4 +15,7 @@ config SYS_MALLOC_LEN config SYS_MALLOC_F_LEN default 0x4000 +config LNX_KRNL_IMG_TEXT_OFFSET_BASE + default SYS_TEXT_BASE + endif diff --git a/arch/arm/mach-davinci/cpu.c b/arch/arm/mach-davinci/cpu.c index aefd21dc45..0f68f9fe59 100644 --- a/arch/arm/mach-davinci/cpu.c +++ b/arch/arm/mach-davinci/cpu.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <init.h> #include <asm/arch/hardware.h> #include <asm/global_data.h> @@ -91,3 +92,8 @@ int set_cpu_clk_info(void) gd->bd->bi_dsp_freq = 0; return 0; } + +unsigned long get_board_sys_clk(void) +{ + return clk_get(DAVINCI_ARM_CLKID); +} diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c index ef48d35aa4..99bca549b6 100644 --- a/arch/arm/mach-exynos/clock.c +++ b/arch/arm/mach-exynos/clock.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <log.h> #include <asm/io.h> #include <asm/arch/clock.h> @@ -136,7 +137,7 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k) /* SDIV [2:0] */ s = r & 0x7; - freq = CONFIG_SYS_CLK_FREQ; + freq = get_board_sys_clk(); if (pllreg == EPLL || pllreg == RPLL) { k = k & 0xffff; @@ -1051,7 +1052,7 @@ static unsigned long exynos5800_get_lcd_clk(void) RPLL}; sclk = get_pll_clk(reg_map[sel]); } else - sclk = CONFIG_SYS_CLK_FREQ; + sclk = get_board_sys_clk(); /* * CLK_DIV_DISP10 * FIMD1_RATIO [3:0] diff --git a/arch/arm/mach-imx/imxrt/Kconfig b/arch/arm/mach-imx/imxrt/Kconfig index d275fdf72e..8c89133965 100644 --- a/arch/arm/mach-imx/imxrt/Kconfig +++ b/arch/arm/mach-imx/imxrt/Kconfig @@ -2,6 +2,7 @@ if ARCH_IMXRT config IMXRT bool + select SYS_FSL_ERRATUM_ESDHC135 config IMXRT1020 bool diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index cb4e9f29ef..c060cc8546 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -1,66 +1,115 @@ if ARCH_KIRKWOOD +config FEROCEON_88FR131 + bool + +config KW88F6192 + bool + +config KW88F6281 + bool + +config SHEEVA_88SV131 + bool + choice prompt "Marvell Kirkwood board select" optional config TARGET_OPENRD bool "Marvell OpenRD Board" + select KW88F6281 + select SHEEVA_88SV131 config TARGET_DREAMPLUG bool "DreamPlug Board" + select KW88F6281 + select SHEEVA_88SV131 config TARGET_DS109 bool "Synology DS109" + select KW88F6281 + select SHEEVA_88SV131 config TARGET_GURUPLUG bool "GuruPlug Board" + select KW88F6281 + select SHEEVA_88SV131 config TARGET_SHEEVAPLUG bool "SheevaPlug Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_LSXL bool "lsxl Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_POGO_E02 bool "pogo_e02 Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_DNS325 bool "dns325 Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_ICONNECT bool "iconnect Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_KM_KIRKWOOD bool "KM Kirkwood Board" + select FEROCEON_88FR131 + select KW88F6281 select VENDOR_KM config TARGET_NET2BIG_V2 bool "LaCie 2Big Network v2 NAS Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_NETSPACE_V2 bool "LaCie netspace_v2 Board" + select FEROCEON_88FR131 config TARGET_IB62X0 bool "ib62x0 Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_DOCKSTAR bool "Dockstar Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_GOFLEXHOME bool "GoFlex Home Board" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_NAS220 bool "BlackArmor NAS220" + select FEROCEON_88FR131 + select KW88F6192 config TARGET_NSA310S bool "Zyxel NSA310S" + select FEROCEON_88FR131 + select KW88F6192 config TARGET_SBx81LIFKW bool "Allied Telesis SBx81GS24/SBx81GT40/SBx81XS6/SBx81XS16" + select FEROCEON_88FR131 + select KW88F6281 config TARGET_SBx81LIFXCAT bool "Allied Telesis SBx81GP24/SBx81GT24" + select FEROCEON_88FR131 + select KW88F6281 endchoice diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index 9fd90611bd..eb9502361e 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -27,15 +27,6 @@ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ #define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */ -/* - * By default kwbimage.cfg from board specific folder is used - * If for some board, different configuration file need to be used, - * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file - */ -#ifndef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg -#endif /* CONFIG_SYS_KWD_CONFIG */ - /* Kirkwood has 2k of Security SRAM, use it for SP */ #define CONFIG_SYS_INIT_SP_ADDR 0xC8012000 diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 6ecd394a53..681f64961f 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -27,15 +27,6 @@ #define CONFIG_SYS_L2_PL310 -/* - * By default the generated mvebu kwbimage.cfg is used - * If for some board, different configuration file need to be used, - * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file - */ -#ifndef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG arch/arm/mach-mvebu/kwbimage.cfg -#endif /* CONFIG_SYS_KWD_CONFIG */ - /* end of 16M scrubbed by training in bootrom */ #define CONFIG_SYS_INIT_SP_ADDR 0x00FF0000 diff --git a/arch/arm/mach-nexell/Kconfig b/arch/arm/mach-nexell/Kconfig index ffa4d4865a..86a2398637 100644 --- a/arch/arm/mach-nexell/Kconfig +++ b/arch/arm/mach-nexell/Kconfig @@ -33,6 +33,12 @@ config TARGET_NANOPI2 endchoice +config SYS_PLLFIN + int + +config TIMER_SYS_TICK_CH + int + config SYS_BOARD default "nanopi2" @@ -45,13 +51,13 @@ config SYS_SOC config SYS_CONFIG_NAME default "s5p4418_nanopi2" -endmenu - config SYS_PLLFIN - int + default 24000000 config TIMER_SYS_TICK_CH - int + default 0 + +endmenu source "board/friendlyarm/Kconfig" diff --git a/arch/arm/mach-octeontx/Kconfig b/arch/arm/mach-octeontx/Kconfig index 28ecf9821f..542f480476 100644 --- a/arch/arm/mach-octeontx/Kconfig +++ b/arch/arm/mach-octeontx/Kconfig @@ -16,8 +16,4 @@ config SYS_SOC string default "octeontx" -config SYS_PCI_64BIT - bool - default y - endif diff --git a/arch/arm/mach-octeontx2/Kconfig b/arch/arm/mach-octeontx2/Kconfig index 8e5cb0f638..f6158df908 100644 --- a/arch/arm/mach-octeontx2/Kconfig +++ b/arch/arm/mach-octeontx2/Kconfig @@ -16,8 +16,4 @@ config SYS_SOC string default "octeontx2" -config SYS_PCI_64BIT - bool - default y - endif diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig index 5baa6fb935..b8b45a048c 100644 --- a/arch/arm/mach-orion5x/Kconfig +++ b/arch/arm/mach-orion5x/Kconfig @@ -1,11 +1,19 @@ if ARCH_ORION5X +config 88F5182 + bool + +config FEROCEON + bool + choice prompt "Marvell Orion board select" optional config TARGET_EDMINIV2 bool "LaCie Ethernet Disk mini V2" + select 88F5182 + select FEROCEON select SUPPORT_SPL endchoice diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index da6871eb18..c4645a0e4c 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -8,7 +8,6 @@ config ROCKCHIP_PX30 select SPL select TPL select TPL_TINY_FRAMEWORK if TPL - select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL select TPL_NEEDS_SEPARATE_STACK if TPL imply SPL_SEPARATE_BSS select SPL_SERIAL @@ -80,7 +79,6 @@ config ROCKCHIP_RK322X select TPL select TPL_DM select TPL_OF_LIBFDT - select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL select TPL_NEEDS_SEPARATE_STACK if TPL select SPL_DRIVERS_MISC imply ROCKCHIP_COMMON_BOARD @@ -112,7 +110,6 @@ config ROCKCHIP_RK3288 imply TPL_DRIVERS_MISC imply TPL_LIBCOMMON_SUPPORT imply TPL_LIBGENERIC_SUPPORT - imply TPL_NEEDS_SEPARATE_TEXT_BASE imply TPL_NEEDS_SEPARATE_STACK imply TPL_OF_CONTROL imply TPL_OF_PLATDATA @@ -160,7 +157,6 @@ config ROCKCHIP_RK3328 select SPL select SUPPORT_TPL select TPL - select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL select TPL_NEEDS_SEPARATE_STACK if TPL imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_SDRAM_COMMON @@ -183,7 +179,6 @@ config ROCKCHIP_RK3368 select ARM64 select SUPPORT_SPL select SUPPORT_TPL - select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL select TPL_NEEDS_SEPARATE_STACK if TPL imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD @@ -216,7 +211,6 @@ config ROCKCHIP_RK3399 select SPL_RAM if SPL select SPL_REGMAP if SPL select SPL_SYSCON if SPL - select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL select TPL_NEEDS_SEPARATE_STACK if TPL select SPL_SEPARATE_BSS select SPL_SERIAL diff --git a/arch/arm/mach-s5pc1xx/clock.c b/arch/arm/mach-s5pc1xx/clock.c index 555228a520..c90c341b50 100644 --- a/arch/arm/mach-s5pc1xx/clock.c +++ b/arch/arm/mach-s5pc1xx/clock.c @@ -14,12 +14,8 @@ #define CLK_D 1 #define CLK_P 2 -#ifndef CONFIG_SYS_CLK_FREQ_C100 -#define CONFIG_SYS_CLK_FREQ_C100 12000000 -#endif -#ifndef CONFIG_SYS_CLK_FREQ_C110 -#define CONFIG_SYS_CLK_FREQ_C110 24000000 -#endif +#define CFG_SYS_CLK_FREQ_C100 12000000 +#define CFG_SYS_CLK_FREQ_C110 24000000 /* s5pc110: return pll clock frequency */ static unsigned long s5pc100_get_pll_clk(int pllreg) @@ -66,7 +62,7 @@ static unsigned long s5pc100_get_pll_clk(int pllreg) s = r & 0x7; /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ - freq = CONFIG_SYS_CLK_FREQ_C100; + freq = CFG_SYS_CLK_FREQ_C100; fout = m * (freq / (p * (1 << s))); return fout; @@ -116,7 +112,7 @@ static unsigned long s5pc110_get_pll_clk(int pllreg) /* SDIV [2:0] */ s = r & 0x7; - freq = CONFIG_SYS_CLK_FREQ_C110; + freq = CFG_SYS_CLK_FREQ_C110; if (pllreg == APLL) { if (s < 1) s = 1; diff --git a/arch/arm/mach-zynqmp-r5/Kconfig b/arch/arm/mach-zynqmp-r5/Kconfig index 5e01754133..f14514b3c7 100644 --- a/arch/arm/mach-zynqmp-r5/Kconfig +++ b/arch/arm/mach-zynqmp-r5/Kconfig @@ -21,6 +21,12 @@ config SYS_CONFIG_NAME Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header will be used for board configuration. +config CPU_FREQ_HZ + int "CPU frequency" + default 800000000 + help + The value, in Hz, that the CPU clock is running at. + config SYS_MALLOC_F_LEN default 0x600 diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 1ab37cc9fc..97c0b7b834 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -128,6 +128,7 @@ config TARGET_COBRA5272 config TARGET_EB_CPU5282 bool "Support eb_cpu5282" select M5282 + select HW_WATCHDOG config TARGET_M5208EVBE bool "Support M5208EVBE" diff --git a/arch/nds32/cpu/n1213/ag101/timer.c b/arch/nds32/cpu/n1213/ag101/timer.c index 394fc10ec3..f6dcbf199c 100644 --- a/arch/nds32/cpu/n1213/ag101/timer.c +++ b/arch/nds32/cpu/n1213/ag101/timer.c @@ -9,6 +9,7 @@ */ #ifndef CONFIG_TIMER #include <common.h> +#include <clock_legacy.h> #include <init.h> #include <irq_func.h> #include <log.h> @@ -76,7 +77,7 @@ void reset_timer_masked(void) lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ); #else lastdec = readl(&tmr->timer3_counter) / - (CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ); + (get_board_sys_clk() / 2 / CONFIG_SYS_HZ); #endif timestamp = 0; /* start "advancing" time stamp from 0 */ @@ -101,7 +102,7 @@ ulong get_timer_masked(void) ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ); #else ulong now = readl(&tmr->timer3_counter) / - (CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ); + (get_board_sys_clk() / 2 / CONFIG_SYS_HZ); #endif debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec); @@ -155,7 +156,7 @@ void __udelay(unsigned long usec) #ifdef CONFIG_FTTMR010_EXT_CLK long tmo = usec * (TIMER_CLOCK / 1000) / 1000; #else - long tmo = usec * ((CONFIG_SYS_CLK_FREQ / 2) / 1000) / 1000; + long tmo = usec * ((get_board_sys_clk() / 2) / 1000) / 1000; #endif unsigned long now, last = readl(&tmr->timer3_counter); @@ -190,7 +191,7 @@ ulong get_tbclk(void) #ifdef CONFIG_FTTMR010_EXT_CLK return CONFIG_SYS_HZ; #else - return CONFIG_SYS_CLK_FREQ; + return get_board_sys_clk(); #endif } #endif /* CONFIG_TIMER */ diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index cff98f7599..bcd8375087 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -179,13 +179,6 @@ config ARCH_MPC837X select SYS_CACHE_SHIFT_5 select FSL_ELBC -config SYS_IMMR - hex "Value for IMMR" - default 0xE0000000 - help - Address for the Internal Memory-Mapped Registers (IMMR) window used - to configure the features of the SoC. - source "arch/powerpc/cpu/mpc83xx/hrcw/Kconfig" source "arch/powerpc/cpu/mpc83xx/bats/Kconfig" source "arch/powerpc/cpu/mpc83xx/lblaw/Kconfig" @@ -195,6 +188,13 @@ source "arch/powerpc/cpu/mpc83xx/sysio/Kconfig" source "arch/powerpc/cpu/mpc83xx/arbiter/Kconfig" source "arch/powerpc/cpu/mpc83xx/initreg/Kconfig" +config 83XX_PCICLK + hex "PCI clock frequency" + default 0xDEADBEEF + help + If required, the PCI clock frequency to use when configuring + the host bridge. + config FSL_ELBC bool diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c index c386e4ed3f..d2b6b05bda 100644 --- a/arch/powerpc/cpu/mpc83xx/pcie.c +++ b/arch/powerpc/cpu/mpc83xx/pcie.c @@ -8,6 +8,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <pci.h> #include <mpc83xx.h> #include <asm/global_data.h> @@ -46,7 +47,7 @@ int get_pcie_clk(int index) clkin_div = ((im->clk.spmr & SPMR_CKID) >> SPMR_CKID_SHIFT); sccr = im->clk.sccr; - pci_sync_in = CONFIG_SYS_CLK_FREQ / (1 + clkin_div); + pci_sync_in = get_board_sys_clk() / (1 + clkin_div); spmf = (im->clk.spmr & SPMR_SPMF) >> SPMR_SPMF_SHIFT; csb_clk = pci_sync_in * (1 + clkin_div) * spmf; diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index e5db96b328..f835263f25 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -137,8 +137,8 @@ int get_clocks(void) clkin_div = ((im->clk.spmr & SPMR_CKID) >> SPMR_CKID_SHIFT); if (im->reset.rcwh & HRCWH_PCI_HOST) { -#if defined(CONFIG_SYS_CLK_FREQ) - pci_sync_in = CONFIG_SYS_CLK_FREQ / (1 + clkin_div); +#if CONFIG_SYS_CLK_FREQ != 0 + pci_sync_in = get_board_sys_clk() / (1 + clkin_div); #else pci_sync_in = 0xDEADBEEF; #endif diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c index 00cb2bd044..11b1e613fb 100644 --- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c +++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c @@ -102,5 +102,5 @@ ulong get_bus_freq(ulong dummy) volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u8 spmf = (im->clk.spmr & SPMR_SPMF) >> SPMR_SPMF_SHIFT; - return CONFIG_SYS_CLK_FREQ * spmf; + return get_board_sys_clk() * spmf; } diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index c4953df4a2..0944d19105 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -14,8 +14,6 @@ #include <config.h> #include <mpc83xx.h> -#define CONFIG_83XX 1 /* needed for Linux kernel header files*/ - #include <ppc_asm.tmpl> #include <ppc_defs.h> @@ -115,9 +113,6 @@ disable_addr_trans: #ifndef CONFIG_DEFAULT_IMMR #error CONFIG_DEFAULT_IMMR must be defined #endif /* CONFIG_DEFAULT_IMMR */ -#ifndef CONFIG_SYS_IMMR -#define CONFIG_SYS_IMMR CONFIG_DEFAULT_IMMR -#endif /* CONFIG_SYS_IMMR */ /* * After configuration, a system reset exception is executed using the diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index d71ca86ab0..4471754d02 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -354,6 +354,7 @@ config ARCH_P1010 bool select FSL_LAW select SYS_CACHE_SHIFT_5 + select SYS_HAS_SERDES select SYS_FSL_ERRATUM_A004477 select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 @@ -1001,6 +1002,9 @@ config SYS_FSL_ERRATUM_SRIO_A004034 config SYS_FSL_ERRATUM_USB14 bool +config SYS_HAS_SERDES + bool + config SYS_P4080_ERRATUM_CPU22 bool @@ -1084,9 +1088,6 @@ config SYS_PPC64 config SYS_PPC_E500_USE_DEBUG_TLB bool -config FSL_IFC - bool - config FSL_ELBC bool diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 3f2fc062b2..d4b828e382 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -662,9 +662,9 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) #ifdef CONFIG_FSL_CORENET do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0", - "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); + "clock-frequency", get_board_sys_clk(), 1); do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0", - "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); + "clock-frequency", get_board_sys_clk(), 1); do_fixup_by_compat_u32(blob, "fsl,mpic", "clock-frequency", get_bus_freq(0)/2, 1); #else diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 1fe914a4e4..5a9cd28161 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -75,7 +75,7 @@ void get_sys_info(sys_info_t *sys_info) uint rcw_tmp; #endif uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; - unsigned long sysclk = CONFIG_SYS_CLK_FREQ; + unsigned long sysclk = get_board_sys_clk(); uint mem_pll_rat; sys_info->freq_systembus = sysclk; @@ -102,7 +102,7 @@ void get_sys_info(sys_info_t *sys_info) * are driven by differential sysclock. */ if (ddr_refclk_sel == FSL_CORENET2_RCWSR5_DDR_REFCLK_SINGLE_CLK) - sys_info->freq_ddrbus = CONFIG_SYS_CLK_FREQ; + sys_info->freq_ddrbus = get_board_sys_clk(); else #endif #if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ) @@ -526,7 +526,7 @@ void get_sys_info(sys_info_t *sys_info) plat_ratio = (gur->porpllsr) & 0x0000003e; plat_ratio >>= 1; - sys_info->freq_systembus = plat_ratio * CONFIG_SYS_CLK_FREQ; + sys_info->freq_systembus = plat_ratio * get_board_sys_clk(); /* Divide before multiply to avoid integer * overflow for processor speeds above 2GHz */ @@ -554,7 +554,7 @@ void get_sys_info(sys_info_t *sys_info) #else qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO) >> MPC85xx_PORPLLSR_QE_RATIO_SHIFT; - sys_info->freq_qe = qe_ratio * CONFIG_SYS_CLK_FREQ; + sys_info->freq_qe = qe_ratio * get_board_sys_clk(); #endif #endif diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig index 091bbaffa0..d63071104c 100644 --- a/arch/powerpc/cpu/mpc8xx/Kconfig +++ b/arch/powerpc/cpu/mpc8xx/Kconfig @@ -84,9 +84,6 @@ config SYS_DER help Debug Event Register (37-47) -config SYS_IMMR - hex "Value for IMMR" - source "board/cssi/MCR3000/Kconfig" endmenu diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig index 7cdbaefb11..477c51960d 100644 --- a/arch/sandbox/Kconfig +++ b/arch/sandbox/Kconfig @@ -1,9 +1,6 @@ menu "Sandbox architecture" depends on SANDBOX -config ARCH_MAP_SYSMEM - def_bool y - config SYS_ARCH default "sandbox" diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 7836869c55..7e6cb70158 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -4,13 +4,17 @@ menu "SuperH architecture" config CPU_SH4 bool +config CPU_SH7751 + bool + select CPU_SH4 + choice prompt "Target select" optional config TARGET_R2DPLUS bool "Renesas R2D-PLUS" - select CPU_SH4 + select CPU_SH7751 endchoice diff --git a/arch/sh/include/asm/config.h b/arch/sh/include/asm/config.h index 406156dff5..09a15da485 100644 --- a/arch/sh/include/asm/config.h +++ b/arch/sh/include/asm/config.h @@ -11,6 +11,6 @@ /* Timer */ #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ -#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4) +#define CONFIG_SYS_TIMER_RATE (get_board_sys_clk() / 4) #endif diff --git a/arch/xtensa/lib/time.c b/arch/xtensa/lib/time.c index 3a02c38493..1c927d2a6a 100644 --- a/arch/xtensa/lib/time.c +++ b/arch/xtensa/lib/time.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <time.h> #include <asm/global_data.h> #include <linux/delay.h> @@ -51,7 +52,7 @@ static void delay_cycles(unsigned cycles) void __udelay(unsigned long usec) { ulong lo, hi, i; - ulong mhz = CONFIG_SYS_CLK_FREQ / 1000000; + ulong mhz = get_board_sys_clk() / 1000000; /* Scale to support full 32-bit usec range */ @@ -74,7 +75,7 @@ ulong get_timer(ulong base) #if XCHAL_HAVE_CCOUNT register ulong ccount; __asm__ volatile ("rsr %0, CCOUNT" : "=a"(ccount)); - return ccount / (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - base; + return ccount / (get_board_sys_clk() / CONFIG_SYS_HZ) - base; #else /* * Add at least the overhead of this call (in cycles). @@ -85,7 +86,7 @@ ulong get_timer(ulong base) */ fake_ccount += 20; - return fake_ccount / (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - base; + return fake_ccount / (get_board_sys_clk() / CONFIG_SYS_HZ) - base; #endif } @@ -114,6 +115,6 @@ unsigned long timer_get_us(void) unsigned long ccount; __asm__ volatile ("rsr %0, CCOUNT" : "=a"(ccount)); - return ccount / (CONFIG_SYS_CLK_FREQ / 1000000); + return ccount / (get_board_sys_clk() / 1000000); } #endif diff --git a/board/LaCie/net2big_v2/Kconfig b/board/LaCie/net2big_v2/Kconfig index ba460dba45..758d25e007 100644 --- a/board/LaCie/net2big_v2/Kconfig +++ b/board/LaCie/net2big_v2/Kconfig @@ -1,5 +1,16 @@ if TARGET_NET2BIG_V2 +choice + prompt "Board variant" + +config D2NET_V2 + bool "D2NET v2" + +config NET2BIG_V2 + bool "NET2BIG v2" + +endchoice + config SYS_BOARD default "net2big_v2" diff --git a/board/LaCie/netspace_v2/Kconfig b/board/LaCie/netspace_v2/Kconfig index 930b822dfb..4eca1d47de 100644 --- a/board/LaCie/netspace_v2/Kconfig +++ b/board/LaCie/netspace_v2/Kconfig @@ -1,5 +1,30 @@ if TARGET_NETSPACE_V2 +choice + prompt "Board variant" + +config INETSPACE_V2 + bool "INETSPACE v2" + select KW88F6281 + +config NETSPACE_LITE_V2 + bool "NETSPACE LITE v2" + select KW88F6192 + +config NETSPACE_MAX_V2 + bool "NETSPACE MAX v2" + select KW88F6281 + +config NETSPACE_MINI_V2 + bool "NETSPACE MINI v2" + select KW88F6192 + +config NETSPACE_V2 + bool "NETSPACE v2" + select KW88F6281 + +endchoice + config SYS_BOARD default "netspace_v2" diff --git a/board/Marvell/openrd/Kconfig b/board/Marvell/openrd/Kconfig index 124b66da0f..dc26ed2f42 100644 --- a/board/Marvell/openrd/Kconfig +++ b/board/Marvell/openrd/Kconfig @@ -1,5 +1,19 @@ if TARGET_OPENRD +choice + prompt "Board variant" + +config BOARD_IS_OPENRD_BASE + bool "Base" + +config BOARD_IS_OPENRD_CLIENT + bool "Client" + +config BOARD_IS_OPENRD_ULTIMATE + bool "Ultimate" + +endchoice + config SYS_BOARD default "openrd" diff --git a/board/cadence/xtfpga/xtfpga.c b/board/cadence/xtfpga/xtfpga.c index c26793d76c..ade7f9d120 100644 --- a/board/cadence/xtfpga/xtfpga.c +++ b/board/cadence/xtfpga/xtfpga.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <command.h> #include <dm.h> #include <init.h> @@ -49,7 +50,7 @@ int checkboard(void) return 0; } -int board_postclk_init(void) +unsigned long get_board_sys_clk(void) { /* * Obtain CPU clock frequency from board and cache in global @@ -58,11 +59,17 @@ int board_postclk_init(void) */ #ifdef CONFIG_SYS_FPGAREG_FREQ - gd->cpu_clk = (*(volatile unsigned long *)CONFIG_SYS_FPGAREG_FREQ); + return (*(volatile unsigned long *)CONFIG_SYS_FPGAREG_FREQ); #else /* early Tensilica bitstreams lack this reg, but most run at 50 MHz */ - gd->cpu_clk = 50000000UL; + return 50000000; #endif +} + +int board_postclk_init(void) +{ + gd->cpu_clk = get_board_sys_clk(); + return 0; } diff --git a/board/compulab/cl-som-imx7/Kconfig b/board/compulab/cl-som-imx7/Kconfig index 6d69cf31f4..ffd857ced1 100644 --- a/board/compulab/cl-som-imx7/Kconfig +++ b/board/compulab/cl-som-imx7/Kconfig @@ -17,10 +17,6 @@ config SYS_USB_DEV int default 0 -config SYS_MMC_IMG_LOAD_PART - int - default 1 - config SYS_USB_IMG_LOAD_PART int default 1 diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig index 69620dbb74..300b01e040 100644 --- a/board/freescale/common/Kconfig +++ b/board/freescale/common/Kconfig @@ -28,36 +28,67 @@ config FSL_USE_PCA9547_MUX This option enables the PCA9547 I2C mux on Freescale boards. config VID - depends on DM_I2C bool "Enable Freescale VID" + depends on I2C || DM_I2C help This option enables setting core voltage based on individual values saved in SoC fuses. +config SPL_VID + bool "Enable Freescale VID in SPL" + depends on I2C || DM_I2C + help + This option enables setting core voltage based on individual + values saved in SoC fuses, in SPL. + +if VID || SPL_VID + +config VID_FLS_ENV + string "Environment variable for overriding VDD" + help + This option allows for specifying the environment variable + to check to override VDD information. + +config VOL_MONITOR_INA220 + bool "Enable the INA220 voltage monitor read" + help + This option enables INA220 voltage monitor read + functionality. It is used by the common VID driver. + +config VOL_MONITOR_IR36021_READ + bool "Enable the IR36021 voltage monitor read" + help + This option enables IR36021 voltage monitor read + functionality. It is used by the common VID driver. + +config VOL_MONITOR_IR36021_SET + bool "Enable the IR36021 voltage monitor set" + help + This option enables IR36021 voltage monitor set + functionality. It is used by the common VID driver. + config VOL_MONITOR_LTC3882_READ - depends on VID bool "Enable the LTC3882 voltage monitor read" help This option enables LTC3882 voltage monitor read functionality. It is used by the common VID driver. config VOL_MONITOR_LTC3882_SET - depends on VID bool "Enable the LTC3882 voltage monitor set" help This option enables LTC3882 voltage monitor set functionality. It is used by the common VID driver. config VOL_MONITOR_ISL68233_READ - depends on VID bool "Enable the ISL68233 voltage monitor read" help This option enables ISL68233 voltage monitor read functionality. It is used by the common VID driver. config VOL_MONITOR_ISL68233_SET - depends on VID bool "Enable the ISL68233 voltage monitor set" help This option enables ISL68233 voltage monitor set functionality. It is used by the common VID driver. + +endif diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 3a171688c3..0ddfb59d7d 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -33,7 +33,7 @@ obj-$(CONFIG_FSL_NGPIXIS) += ngpixis.o endif obj-$(I2C_COMMON) += i2c_common.o obj-$(CONFIG_FSL_USE_PCA9547_MUX) += i2c_mux.o -obj-$(CONFIG_VID) += vid.o +obj-$(CONFIG_$(SPL_)VID) += vid.o obj-$(CONFIG_FSL_QIXIS) += qixis.o obj-$(CONFIG_PQ_MDS_PIB) += pq-mds-pib.o ifndef CONFIG_SPL_BUILD diff --git a/board/freescale/common/cadmus.c b/board/freescale/common/cadmus.c index 7e7394f333..8f3fb5fa81 100644 --- a/board/freescale/common/cadmus.c +++ b/board/freescale/common/cadmus.c @@ -5,7 +5,7 @@ #include <common.h> - +#include <clock_legacy.h> /* * CADMUS Board System Registers @@ -37,7 +37,7 @@ get_board_version(void) unsigned long -get_clock_freq(void) +get_board_sys_clk(void) { volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CONFIG_SYS_CADMUS_BASE_REG; diff --git a/board/freescale/common/cadmus.h b/board/freescale/common/cadmus.h index ddc2bb6c1f..fb74e8f6db 100644 --- a/board/freescale/common/cadmus.h +++ b/board/freescale/common/cadmus.h @@ -19,7 +19,7 @@ extern unsigned int get_board_version(void); /* * Returns either 33000000 or 66000000 as the SYS_CLK_FREQ. */ -extern unsigned long get_clock_freq(void); +extern unsigned long get_board_sys_clk(void); /* diff --git a/board/freescale/common/ics307_clk.c b/board/freescale/common/ics307_clk.c index 2143395781..01662d36e9 100644 --- a/board/freescale/common/ics307_clk.c +++ b/board/freescale/common/ics307_clk.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <log.h> #include <asm/io.h> @@ -137,6 +138,7 @@ unsigned long get_board_sys_clk(void) in_8(&fpga_reg->sclk[2])); } +#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ unsigned long get_board_ddr_clk(void) { return ics307_clk_freq( @@ -144,3 +146,4 @@ unsigned long get_board_ddr_clk(void) in_8(&fpga_reg->dclk[1]), in_8(&fpga_reg->dclk[2])); } +#endif diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index fbbd27d9d7..0647622cde 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -102,6 +102,7 @@ int checkboard(void) return 0; } +#ifdef CONFIG_DYNAMIC_SYS_CLK_FREQ unsigned long get_board_sys_clk(void) { u8 sysclk_conf = QIXIS_READ(brdcfg[1]); @@ -126,6 +127,7 @@ unsigned long get_board_sys_clk(void) } return 66666666; } +#endif #ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ unsigned long get_board_ddr_clk(void) diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index 2d5322406a..13359f947b 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <i2c.h> #include <fdt_support.h> #include <fsl_ddr_sdram.h> diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index cc95d441b6..8481c45a58 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <i2c.h> #include <fdt_support.h> #include <fsl_ddr_sdram.h> diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index 7046fbaeb5..aa548b20d7 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -3,6 +3,7 @@ * Copyright 2017-2018 NXP */ #include <common.h> +#include <clock_legacy.h> #include <env.h> #include <i2c.h> #include <init.h> @@ -374,6 +375,7 @@ bool if_board_diff_clk(void) #endif } +#ifdef CONFIG_DYNAMIC_SYS_CLK_FREQ unsigned long get_board_sys_clk(void) { u8 sysclk_conf = QIXIS_READ(brdcfg[1]); @@ -397,7 +399,9 @@ unsigned long get_board_sys_clk(void) return 66666666; } +#endif +#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ unsigned long get_board_ddr_clk(void) { u8 ddrclk_conf = QIXIS_READ(brdcfg[1]); @@ -415,6 +419,7 @@ unsigned long get_board_ddr_clk(void) return 66666666; } +#endif #if !defined(CONFIG_SPL_BUILD) void board_retimer_init(void) diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index 2f0139edef..297629d5ef 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -3,6 +3,7 @@ * Copyright 2015 Freescale Semiconductor */ #include <common.h> +#include <clock_legacy.h> #include <env.h> #include <init.h> #include <malloc.h> diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index bf660a8e65..1975b0f47d 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -4,6 +4,7 @@ * Copyright 2017 NXP */ #include <common.h> +#include <clock_legacy.h> #include <env.h> #include <init.h> #include <malloc.h> diff --git a/board/freescale/p1010rdb/spl.c b/board/freescale/p1010rdb/spl.c index 6c84eef398..7eaa2047fa 100644 --- a/board/freescale/p1010rdb/spl.c +++ b/board/freescale/p1010rdb/spl.c @@ -43,7 +43,7 @@ void board_init_f(ulong bootflag) /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; - gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; + gd->bus_clk = get_board_sys_clk() * plat_ratio; ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, gd->bus_clk / 16 / CONFIG_BAUDRATE); diff --git a/board/freescale/p1010rdb/spl_minimal.c b/board/freescale/p1010rdb/spl_minimal.c index 989c5b139a..a956c5af5b 100644 --- a/board/freescale/p1010rdb/spl_minimal.c +++ b/board/freescale/p1010rdb/spl_minimal.c @@ -3,6 +3,7 @@ * Copyright 2011 Freescale Semiconductor, Inc. */ #include <common.h> +#include <clock_legacy.h> #include <init.h> #include <mpc85xx.h> #include <asm/io.h> @@ -29,7 +30,7 @@ void board_init_f(ulong bootflag) /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; - gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; + gd->bus_clk = get_board_sys_clk() * plat_ratio; ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, gd->bus_clk / 16 / CONFIG_BAUDRATE); diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c index 118468408e..f855f3a81c 100644 --- a/board/freescale/p1_p2_rdb_pc/spl.c +++ b/board/freescale/p1_p2_rdb_pc/spl.c @@ -48,7 +48,7 @@ void board_init_f(ulong bootflag) /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; - bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; + bus_clk = get_board_sys_clk() * plat_ratio; gd->bus_clk = bus_clk; ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, diff --git a/board/freescale/p1_p2_rdb_pc/spl_minimal.c b/board/freescale/p1_p2_rdb_pc/spl_minimal.c index eb3f2c83fa..72beeadf55 100644 --- a/board/freescale/p1_p2_rdb_pc/spl_minimal.c +++ b/board/freescale/p1_p2_rdb_pc/spl_minimal.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <init.h> #include <ns16550.h> #include <asm/io.h> @@ -28,7 +29,7 @@ void board_init_f(ulong bootflag) /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; - gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; + gd->bus_clk = get_board_sys_clk() * plat_ratio; ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1, gd->bus_clk / 16 / CONFIG_BAUDRATE); diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c index 4ece1e6ea0..5bd2b99506 100644 --- a/board/freescale/p2041rdb/p2041rdb.c +++ b/board/freescale/p2041rdb/p2041rdb.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <command.h> #include <env.h> #include <fdt_support.h> @@ -148,7 +149,7 @@ int board_early_init_r(void) return 0; } -unsigned long get_board_sys_clk(unsigned long dummy) +unsigned long get_board_sys_clk(void) { u8 sysclk_conf = CPLD_READ(sysclk_sw1); diff --git a/board/freescale/t102xrdb/spl.c b/board/freescale/t102xrdb/spl.c index ac373d7724..af15da5427 100644 --- a/board/freescale/t102xrdb/spl.c +++ b/board/freescale/t102xrdb/spl.c @@ -25,11 +25,6 @@ phys_size_t get_effective_memsize(void) return CONFIG_SYS_L3_SIZE; } -unsigned long get_board_sys_clk(void) -{ - return CONFIG_SYS_CLK_FREQ; -} - #if defined(CONFIG_SPL_MMC_BOOT) #define GPIO1_SD_SEL 0x00020000 int board_mmc_getcd(struct mmc *mmc) diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c index ab7675e209..539a5c7344 100644 --- a/board/freescale/t102xrdb/t102xrdb.c +++ b/board/freescale/t102xrdb/t102xrdb.c @@ -162,11 +162,6 @@ int board_early_init_r(void) return 0; } -unsigned long get_board_sys_clk(void) -{ - return CONFIG_SYS_CLK_FREQ; -} - #ifdef CONFIG_TARGET_T1024RDB void board_reset(void) { diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c index c7df11100e..dfaff1a916 100644 --- a/board/freescale/t104xrdb/spl.c +++ b/board/freescale/t104xrdb/spl.c @@ -25,11 +25,6 @@ phys_size_t get_effective_memsize(void) return CONFIG_SYS_L3_SIZE; } -unsigned long get_board_sys_clk(void) -{ - return CONFIG_SYS_CLK_FREQ; -} - #define FSL_CORENET_CCSR_PORSR1_RCW_MASK 0xFF800000 void board_init_f(ulong bootflag) { diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c index e54672a80b..1da3a714f2 100644 --- a/board/freescale/t208xqds/t208xqds.c +++ b/board/freescale/t208xqds/t208xqds.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <command.h> #include <env.h> #include <fdt_support.h> diff --git a/board/freescale/t208xrdb/spl.c b/board/freescale/t208xrdb/spl.c index 2204a98ac8..60fe084bbb 100644 --- a/board/freescale/t208xrdb/spl.c +++ b/board/freescale/t208xrdb/spl.c @@ -24,11 +24,6 @@ phys_size_t get_effective_memsize(void) return CONFIG_SYS_L3_SIZE; } -unsigned long get_board_sys_clk(void) -{ - return CONFIG_SYS_CLK_FREQ; -} - void board_init_f(ulong bootflag) { u32 plat_ratio, sys_clk, ccb_clk; diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c index 3611dbbf32..1c8017b593 100644 --- a/board/freescale/t208xrdb/t208xrdb.c +++ b/board/freescale/t208xrdb/t208xrdb.c @@ -109,11 +109,6 @@ int board_early_init_r(void) return 0; } -unsigned long get_board_sys_clk(void) -{ - return CONFIG_SYS_CLK_FREQ; -} - int misc_init_r(void) { u8 reg; diff --git a/board/freescale/t4rdb/spl.c b/board/freescale/t4rdb/spl.c index 69d1449b07..c7d5de35d5 100644 --- a/board/freescale/t4rdb/spl.c +++ b/board/freescale/t4rdb/spl.c @@ -30,11 +30,6 @@ phys_size_t get_effective_memsize(void) return CONFIG_SYS_L3_SIZE; } -unsigned long get_board_sys_clk(void) -{ - return CONFIG_SYS_CLK_FREQ; -} - void board_init_f(ulong bootflag) { u32 plat_ratio, sys_clk, ccb_clk; diff --git a/board/keymile/kmcent2/kmcent2.c b/board/keymile/kmcent2/kmcent2.c index 4f5164e63c..ca24b960c7 100644 --- a/board/keymile/kmcent2/kmcent2.c +++ b/board/keymile/kmcent2/kmcent2.c @@ -181,11 +181,6 @@ unsigned long get_serial_clock(unsigned long dummy) return (gd->bus_clk / 2); } -unsigned long get_board_sys_clk(unsigned long dummy) -{ - return 66666666; -} - int misc_init_f(void) { /* configure QRIO pis for i2c deblocking */ diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c index d5fe336d22..5c1af1a772 100644 --- a/board/liebherr/display5/spl.c +++ b/board/liebherr/display5/spl.c @@ -327,8 +327,10 @@ void board_init_f(ulong dummy) displ5_set_iomux_misc_spl(); /* Initialize and reset WDT in SPL */ +#ifdef CONFIG_SPL_WATCHDOG hw_watchdog_init(); WATCHDOG_RESET(); +#endif /* load/boot image from boot device */ board_init_r(NULL, 0); diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c index 3417b50f3b..9af935c33f 100644 --- a/board/renesas/eagle/eagle.c +++ b/board/renesas/eagle/eagle.c @@ -7,6 +7,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <cpu_func.h> #include <hang.h> #include <init.h> @@ -50,7 +51,7 @@ void s_init(void) writel(0xA5A5A500, &swdt->swtcsra); /* CPU frequency setting. Set to 0.8GHz */ - stc = ((800 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_OFFSET; + stc = ((800 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_OFFSET; clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); } diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c index 51768c315e..6197e549c2 100644 --- a/board/renesas/gose/gose.c +++ b/board/renesas/gose/gose.c @@ -6,6 +6,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <cpu_func.h> #include <env.h> #include <hang.h> @@ -45,7 +46,7 @@ void s_init(void) writel(0xA5A5A500, &swdt->swtcsra); /* CPU frequency setting. Set to 1.5GHz */ - stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT; + stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT; clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); /* QoS */ diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index 7e94bd8205..87607df20d 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -7,6 +7,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <cpu_func.h> #include <env.h> #include <hang.h> @@ -47,7 +48,7 @@ void s_init(void) writel(0xA5A5A500, &swdt->swtcsra); /* CPU frequency setting. Set to 1.5GHz */ - stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT; + stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT; clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); /* QoS */ diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 87c5e01371..8e24ac013c 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -8,6 +8,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <cpu_func.h> #include <env.h> #include <env_internal.h> @@ -50,7 +51,7 @@ void s_init(void) /* CPU frequency setting. Set to 1.4GHz */ if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) { u32 stat = 0; - u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) + u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT; clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c index b0f8505252..1a3a4c11a1 100644 --- a/board/renesas/porter/porter.c +++ b/board/renesas/porter/porter.c @@ -7,6 +7,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <cpu_func.h> #include <env.h> #include <hang.h> @@ -47,7 +48,7 @@ void s_init(void) writel(0xA5A5A500, &swdt->swtcsra); /* CPU frequency setting. Set to 1.5GHz */ - stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT; + stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT; clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); /* QoS */ diff --git a/board/renesas/stout/stout.c b/board/renesas/stout/stout.c index 3fdf936ddc..56bdb34329 100644 --- a/board/renesas/stout/stout.c +++ b/board/renesas/stout/stout.c @@ -9,6 +9,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <env.h> #include <init.h> #include <malloc.h> @@ -50,7 +51,7 @@ void s_init(void) /* CPU frequency setting. Set to 1.4GHz */ if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) { u32 stat = 0; - u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) + u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT; clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); diff --git a/board/siemens/capricorn/MAINTAINERS b/board/siemens/capricorn/MAINTAINERS index bc7d163e17..b4c52032cc 100644 --- a/board/siemens/capricorn/MAINTAINERS +++ b/board/siemens/capricorn/MAINTAINERS @@ -5,7 +5,6 @@ F: board/siemens/capricorn/ F: include/configs/capricorn-common.h F: include/configs/deneb.h F: include/configs/giedi.h -F: include/configs/siemens-ccp-common.h F: include/configs/siemens-env-common.h F: configs/deneb_defconfig F: configs/giedi_defconfig diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c index a81cb7b2ba..f6a3cc1793 100644 --- a/board/socrates/socrates.c +++ b/board/socrates/socrates.c @@ -57,7 +57,7 @@ int checkboard (void) /* Check the PCI_clk sel bit */ if (in_be32(&gur->porpllsr) & (1<<15)) { src = "SYSCLK"; - f = CONFIG_SYS_CLK_FREQ; + f = get_board_sys_clk(); } else { src = "PCI_CLK"; f = CONFIG_PCI_CLK_FREQ; diff --git a/board/sunxi/board.c b/board/sunxi/board.c index fdbcd40269..2790a0f9e8 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -11,6 +11,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <dm.h> #include <env.h> #include <hang.h> @@ -667,7 +668,7 @@ void sunxi_board_init(void) * assured it's being powered with suitable core voltage */ if (!power_failed) - clock_set_pll1(CONFIG_SYS_CLK_FREQ); + clock_set_pll1(get_board_sys_clk()); else printf("Failed to set core voltage! Can't set CPU frequency\n"); } diff --git a/board/warp7/Kconfig b/board/warp7/Kconfig index e5051cdda6..05b4420afc 100644 --- a/board/warp7/Kconfig +++ b/board/warp7/Kconfig @@ -14,12 +14,6 @@ config WARP7_ROOT_PART partition that is typically specified with root=/dev/sdaX or which gets converted into a root=PARTUUID=some_uuid. -config SYS_FDT_ADDR - hex "FDT load address" - default 0x83000000 - help - The address the FDT file should be loaded to. - config IMX_CONFIG default "board/warp7/imximage.cfg" diff --git a/board/xen/xenguest_arm64/Kconfig b/board/xen/xenguest_arm64/Kconfig index cc131ed5b9..4d8aa35007 100644 --- a/board/xen/xenguest_arm64/Kconfig +++ b/board/xen/xenguest_arm64/Kconfig @@ -9,4 +9,7 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "xenguest_arm64" +config LNX_KRNL_IMG_TEXT_OFFSET_BASE + default SYS_LOAD_ADDR + endif diff --git a/board/xes/common/Makefile b/board/xes/common/Makefile index 4932030547..002821916c 100644 --- a/board/xes/common/Makefile +++ b/board/xes/common/Makefile @@ -3,7 +3,6 @@ # (C) Copyright 2006 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -obj-$(CONFIG_FSL_PCI_INIT) += fsl_8xxx_pci.o obj-$(CONFIG_MPC86xx) += fsl_8xxx_clk.o obj-$(CONFIG_ARCH_P2020) += fsl_8xxx_clk.o obj-$(CONFIG_MPC85xx) += fsl_8xxx_misc.o board.o diff --git a/board/xes/common/fsl_8xxx_clk.c b/board/xes/common/fsl_8xxx_clk.c index 8ca65ca859..20e88d4360 100644 --- a/board/xes/common/fsl_8xxx_clk.c +++ b/board/xes/common/fsl_8xxx_clk.c @@ -4,12 +4,13 @@ */ #include <common.h> +#include <clock_legacy.h> #include <asm/io.h> /* * Return SYSCLK input frequency - 50 MHz or 66 MHz depending on POR config */ -unsigned long get_board_sys_clk(ulong dummy) +unsigned long get_board_sys_clk(void) { #if defined(CONFIG_MPC85xx) volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -33,13 +34,13 @@ unsigned long get_board_sys_clk(ulong dummy) * Return DDR input clock - synchronous with SYSCLK or 66 MHz * Note: 86xx doesn't support asynchronous DDR clk */ -unsigned long get_board_ddr_clk(ulong dummy) +unsigned long get_board_ddr_clk(void) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); u32 ddr_ratio = (in_be32(&gur->porpllsr) & 0x00003e00) >> 9; if (ddr_ratio == 0x7) - return get_board_sys_clk(dummy); + return get_board_sys_clk(); #ifdef CONFIG_ARCH_P2020 if (in_be32(&gur->gpporcr) & 0x20000) diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c deleted file mode 100644 index c1fce7d331..0000000000 --- a/board/xes/common/fsl_8xxx_pci.c +++ /dev/null @@ -1,22 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2008 Extreme Engineering Solutions, Inc. - * Copyright 2007-2008 Freescale Semiconductor, Inc. - */ - -#include <common.h> -#include <init.h> -#include <pci.h> -#include <asm/fsl_pci.h> -#include <asm/fsl_serdes.h> -#include <asm/io.h> -#include <linux/compiler.h> -#include <linux/libfdt.h> -#include <fdt_support.h> - -#if defined(CONFIG_OF_BOARD_SETUP) -void ft_board_pci_setup(void *blob, struct bd_info *bd) -{ - FT_FSL_PCI_SETUP; -} -#endif /* CONFIG_OF_BOARD_SETUP */ diff --git a/boot/Kconfig b/boot/Kconfig index d3a12be228..f1ce576ab2 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -358,11 +358,27 @@ config SYS_TEXT_BASE help The address in memory that U-Boot will be running from, initially. +config DYNAMIC_SYS_CLK_FREQ + bool "Determine CPU clock frequency at run-time" + help + Implement a get_board_sys_clk function that will determine the CPU + clock frequency at run time, rather than define it statically. + config SYS_CLK_FREQ - depends on ARC || ARCH_SUNXI || MPC83xx + depends on !DYNAMIC_SYS_CLK_FREQ int "CPU clock frequency" + default 125000000 if ARCH_LS1012A + default 100000000 if ARCH_P2020 || ARCH_T1024 || ARCH_T1042 || \ + ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 + default 66666666 if ARCH_P1010 || ARCH_P1020 || ARCH_T4240 + default 66660000 if ARCH_T2080 + default 33333333 if RCAR_GEN3 + default 24000000 if ARCH_EXYNOS + default 20000000 if RCAR_GEN2 + default 0 help - TODO: Move CONFIG_SYS_CLK_FREQ for all the architecture + A static value for the CPU frequency. Note that if not required + for a given SoC, this can be left at 0. config ARCH_FIXUP_FDT_MEMORY bool "Enable arch_fixup_memory_banks() call" @@ -762,6 +778,13 @@ config SD_BOOT booted via SD/EMMC. This is not a must, some SoCs need this, some not. +config SD_BOOT_QSPI + bool "Support for booting from SD/EMMC and enable QSPI" + help + Enabling this will make a U-Boot binary that is capable of being + booted via SD/EMMC while enabling QSPI on the platform as well. This + is not a must, some SoCs need this, some not. + config SPI_BOOT bool "Support for booting from SPI flash" help diff --git a/cmd/Kconfig b/cmd/Kconfig index fd8f0227c8..ef82f794b5 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -741,7 +741,7 @@ endif config SYS_MEMTEST_START hex "default start address for mtest" - default 0 + default 0x0 help This is the default start address for mtest for simple read/write test. If no arguments are given to mtest, default address is used @@ -2219,6 +2219,27 @@ config CMD_JFFS2 provide the ability to load files, list directories and obtain filesystem information. +config JFFS2_DEV + string "Default device for JFFS2" + depends on CMD_JFFS2 + default "nor0" + help + The default device to use with the jffs2 command. + +config JFFS2_PART_OFFSET + hex "Default offset within flash to locate the JFFS2 image" + depends on CMD_JFFS2 + default 0x0 + help + The default offset within flash to locate the JFFS2 image. + +config JFFS2_PART_SIZE + hex "Default size of JFFS2 partition" + depends on CMD_JFFS2 + default 0xFFFFFFFF + help + The default size of the JFFS2 partition + config CMD_MTDPARTS bool "MTD partition support" depends on MTD diff --git a/cmd/jffs2.c b/cmd/jffs2.c index 63bd55263a..6f15b57b6a 100644 --- a/cmd/jffs2.c +++ b/cmd/jffs2.c @@ -360,11 +360,7 @@ int mtdparts_init(void) /* id */ id->mtd_id = "single part"; -#if defined(CONFIG_JFFS2_DEV) dev_name = CONFIG_JFFS2_DEV; -#else - dev_name = "nor0"; -#endif if ((mtd_id_parse(dev_name, NULL, &id->type, &id->num) != 0) || (mtd_device_validate(id->type, id->num, &size) != 0)) { @@ -382,17 +378,9 @@ int mtdparts_init(void) part->name = "static"; part->auto_name = 0; -#if defined(CONFIG_JFFS2_PART_SIZE) part->size = CONFIG_JFFS2_PART_SIZE; -#else - part->size = SIZE_REMAINING; -#endif -#if defined(CONFIG_JFFS2_PART_OFFSET) part->offset = CONFIG_JFFS2_PART_OFFSET; -#else - part->offset = 0x00000000; -#endif part->dev = current_mtd_dev; INIT_LIST_HEAD(&part->link); diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c index a7f3ff3c6f..1362c03bce 100644 --- a/cmd/mvebu/bubt.c +++ b/cmd/mvebu/bubt.c @@ -271,8 +271,8 @@ static int spi_burn_image(size_t image_size) u32 erase_bytes; /* Probe the SPI bus to get the flash device */ - flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, - CONFIG_ENV_SPI_CS, + flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, + CONFIG_SF_DEFAULT_CS, CONFIG_SF_DEFAULT_SPEED, CONFIG_SF_DEFAULT_MODE); if (!flash) { diff --git a/common/Kconfig b/common/Kconfig index 50ac4331f5..0892d9be36 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -534,6 +534,15 @@ config BOARD_LATE_INIT So this config enable the late init code with the help of board_late_init function which should defined on respective boards. +config SYS_FSL_CLK + bool + depends on ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 || \ + (FSL_ESDHC_IMX && (ARCH_MX5 || ARCH_MX6 || ARCH_MX7)) + default y + help + Enable to call get_clocks() in board_init_f() for platforms other + than PowerPC or M68k. This is a legacy option. If not TARGET_BRPPT2 + config LAST_STAGE_INIT bool "Call board-specific as last setup step" help diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 17ce2f6b61..4a739a7421 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1351,14 +1351,6 @@ config TPL_LDSCRIPT May be left empty to trigger the Makefile infrastructure to fall back to the linker-script used for the SPL stage. -config TPL_NEEDS_SEPARATE_TEXT_BASE - bool "TPL needs a separate text-base" - depends on TPL - help - Enable, if the TPL stage should not inherit its text-base - from the SPL stage. When enabled, a base address for the - .text sections of the TPL stage has to be set below. - config TPL_NEEDS_SEPARATE_STACK bool "TPL needs a separate initial stack-pointer" depends on TPL @@ -1380,7 +1372,6 @@ config TPL_POWER config TPL_TEXT_BASE hex "Base address for the .text section of the TPL stage" - depends on TPL_NEEDS_SEPARATE_TEXT_BASE help The base address for the .text section of the TPL stage. diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index b9c5843c4e..04fe756513 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -4,7 +4,6 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="mcr3000" CONFIG_MPC8xx=y -CONFIG_SYS_IMMR=0xFF000000 CONFIG_TARGET_MCR3000=y CONFIG_8xx_GCLK_FREQ=132000000 CONFIG_CMD_IMMAP=y diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index 53c0afee43..192bcae704 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="mpc8379erdb" CONFIG_SYS_CLK_FREQ=66666667 +# CONFIG_SYS_PCI_64BIT is not set CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_MPC837XERDB=y @@ -198,3 +199,4 @@ CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index be88669911..e2afcdee7c 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_PHYS_64BIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 368aab272c..e8f44cfcd4 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index 93b9364503..577385d60e 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="LEGACY" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index da934d8305..ef7f24b85f 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xD0001000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y @@ -71,6 +72,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -96,4 +99,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index e67f889841..892a8a6e05 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -76,4 +76,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 57973cda74..705d0dad62 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -88,4 +88,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 5243875cdb..e4ad50fc7b 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -90,4 +90,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 9e95e1b447..b303c4c46c 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xD0001000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y @@ -70,6 +71,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -95,3 +98,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index c161afbe0e..8db09ba2b8 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -75,3 +75,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 9a99961850..f02757dd6b 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -87,3 +87,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index b7889ec27d..9a09473ad4 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -89,3 +89,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 25cccac35c..8582868283 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xD0001000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y @@ -74,6 +75,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -99,4 +102,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 62a3168b07..84173e2d60 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -78,4 +78,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 19fcf60414..4b0a1ab53b 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -90,4 +90,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index c238aae898..986b992e6b 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -92,4 +92,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index fec27dadd6..e4364769f9 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xD0001000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y @@ -73,6 +74,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -98,3 +101,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index b7f6113d93..62f4c89270 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -77,3 +77,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index ef5a8becff..9cdb3599f7 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -89,3 +89,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index f02aaf86de..299564c9ca 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -91,3 +91,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index d1254f5b83..7c4bdb8a79 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xF8F81000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y @@ -84,6 +85,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_ELBC=y CONFIG_SYS_NAND_BLOCK_SIZE=0x4000 +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -110,5 +113,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index db2e7f4adc..24b5f2e048 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -99,5 +99,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index f7f69bf999..a008103cc6 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -101,5 +101,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 0e027a3b44..fe8bf09cc2 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -88,5 +88,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index cebdd67bdc..9ccc62a964 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xF8F81000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y @@ -83,6 +84,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_ELBC=y CONFIG_SYS_NAND_BLOCK_SIZE=0x4000 +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -109,4 +112,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index ed7eebe029..3f92788e9a 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -98,4 +98,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 765a1dcc04..cc8fbb0294 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -100,4 +100,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 34d1b73ae8..9eb502789e 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -87,4 +87,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index cf66645a30..874b338700 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xF8F81000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y @@ -87,6 +88,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_ELBC=y CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -113,4 +116,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 626564d528..24e90bea47 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -102,4 +102,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index c52c56deb6..bac13aa2d2 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -104,4 +104,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 34b2940bc9..58ef741cbe 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -91,4 +91,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index a05ff0414d..ab30b8edfa 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xF8F81000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y @@ -89,6 +90,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_ELBC=y CONFIG_SYS_NAND_BLOCK_SIZE=0x4000 +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -115,5 +118,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index e3c603c54b..7137d2069b 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -104,5 +104,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 40545f5549..97326486c2 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -106,5 +106,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 416bf1c4cf..535f859671 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -93,5 +93,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 0ae8b14a2a..9de2f762c3 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL=y +CONFIG_TPL_TEXT_BASE=0xF8F81000 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y @@ -88,6 +89,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_ELBC=y CONFIG_SYS_NAND_BLOCK_SIZE=0x4000 +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y @@ -114,4 +117,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index a5922affe2..72e12b5a82 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -103,3 +103,4 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 2d37c49353..bddbcec8e5 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -105,4 +105,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 0fecfd29c5..cce0fe28e9 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -92,4 +92,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 3d5c72c3da..b7acfe05ae 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -11,6 +11,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg" @@ -82,6 +83,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index 7830dbd6dd..fa21910b42 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg" @@ -78,6 +79,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index bf2bdbdf0e..ba9b8dfb5f 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg" @@ -79,6 +80,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 880ae45b33..53130ccf82 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -11,6 +11,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" @@ -74,6 +75,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 01b1e3ae0b..29a968d9a3 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -11,6 +11,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg" @@ -84,6 +85,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 9d52e97ba8..72c3b7af29 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg" @@ -80,6 +81,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 3271552a6f..abb9ce611d 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg" @@ -81,6 +82,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 0392b8ed88..39dd70888c 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -11,6 +11,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" @@ -76,6 +77,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 23e4218d5c..bd66e31fe1 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p4080ds.cfg" @@ -79,6 +80,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 595cfb688a..79f51c91d4 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p4080ds.cfg" @@ -80,6 +81,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index bc77ab739b..43f16d45e2 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -11,6 +11,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" @@ -75,6 +76,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 898d21a006..6f31034573 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -11,6 +11,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg" @@ -85,6 +86,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 0eb8fe9bb5..0a881d8417 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg" @@ -80,6 +81,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 1cd9c72404..0e4a5457ef 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg" @@ -81,6 +82,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 4ab77e30e2..d614917385 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -11,6 +11,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr" @@ -76,6 +77,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index 8988ed9e96..77f44f6329 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/alliedtelesis/SBx81LIFKW/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_TARGET_SBx81LIFKW=y CONFIG_ENV_SIZE=0x2000 @@ -30,11 +31,11 @@ CONFIG_DOS_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y @@ -45,16 +46,17 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_PHYLIB=y CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=10 CONFIG_MV88E61XX_PHY_PORTS=0x003 CONFIG_MV88E61XX_FIXED_PORTS=0x300 CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y +CONFIG_MVGBE=y CONFIG_MII=y CONFIG_DM_RTC=y CONFIG_RTC_MV=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index cd491c4fee..b84e3bd9d6 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/alliedtelesis/SBx81LIFXCAT/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_TARGET_SBx81LIFXCAT=y CONFIG_ENV_SIZE=0x2000 @@ -32,11 +33,11 @@ CONFIG_DOS_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y @@ -49,14 +50,15 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_PHYLIB=y CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=10 CONFIG_MV88E61XX_PHY_PORTS=0x003 CONFIG_MV88E61XX_FIXED_PORTS=0x300 CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y +CONFIG_MVGBE=y CONFIG_MII=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 060d936dbc..086e579090 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -84,6 +84,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y @@ -104,6 +106,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index b8847df3fe..5afce38499 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -101,6 +101,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 75bc6324b7..90d745bf34 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -103,6 +103,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 4421a67ebe..98f1d6c794 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -86,6 +86,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 81f263112e..ca22e1e4f2 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -78,6 +78,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y @@ -92,6 +94,7 @@ CONFIG_FMAN_ENET=y CONFIG_SYS_FMAN_FW_ADDR=0x280000 CONFIG_MII=y CONFIG_PCIE_FSL=y +CONFIG_U_QE=y CONFIG_SYS_QE_FW_ADDR=0x380000 CONFIG_SYS_QE_FMAN_FW_IN_NAND=y CONFIG_DM_RTC=y @@ -100,6 +103,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index b64f295e38..b9f7992d35 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -88,6 +88,7 @@ CONFIG_FMAN_ENET=y CONFIG_SYS_FMAN_FW_ADDR=0x10400 CONFIG_MII=y CONFIG_PCIE_FSL=y +CONFIG_U_QE=y CONFIG_SYS_QE_FMAN_FW_IN_MMC=y CONFIG_DM_RTC=y CONFIG_SYS_NS16550=y @@ -95,6 +96,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index a1cb4207c8..f8e2b6d2ee 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -90,6 +90,7 @@ CONFIG_FMAN_ENET=y CONFIG_SYS_FMAN_FW_ADDR=0x110000 CONFIG_MII=y CONFIG_PCIE_FSL=y +CONFIG_U_QE=y CONFIG_SYS_QE_FW_ADDR=0x130000 CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y CONFIG_DM_RTC=y @@ -98,6 +99,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 80086e7578..4797f2907f 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -73,6 +73,7 @@ CONFIG_FMAN_ENET=y CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000 CONFIG_MII=y CONFIG_PCIE_FSL=y +CONFIG_U_QE=y CONFIG_SYS_QE_FW_ADDR=0xEFF10000 CONFIG_SYS_QE_FMAN_FW_IN_NOR=y CONFIG_DM_RTC=y @@ -81,6 +82,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index d5b5f4428f..ba07ce8feb 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -7,6 +7,10 @@ CONFIG_ENV_OFFSET=0x140000 CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -18,6 +22,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_nand_rcw.cfg" @@ -76,6 +81,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_EON=y @@ -98,6 +105,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index c8eea6d5be..bf5410b344 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -7,6 +7,10 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -18,6 +22,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_sd_rcw.cfg" @@ -94,6 +99,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 040b6b6d9f..3165b9090a 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -4,6 +4,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -12,6 +16,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -78,6 +83,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 07f0981adb..367416f337 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -8,6 +8,10 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -20,6 +24,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_spi_rcw.cfg" @@ -96,6 +101,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index baa24a86bd..ef4d8888b6 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -3,6 +3,10 @@ CONFIG_SYS_TEXT_BASE=0xFFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -11,6 +15,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -71,6 +76,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 8a09ddd8db..db9e970e64 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -4,6 +4,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xqds_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -11,6 +15,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -79,6 +84,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 086346230c..4501cf64e4 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -8,6 +8,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -82,6 +86,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y @@ -106,6 +112,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index d5f1d2867e..f62c85c805 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -8,6 +8,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -102,6 +106,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 579a36bdb7..2a7529d1cc 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -9,6 +9,10 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -104,6 +108,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 19ceb3e58c..6b076405d6 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -5,6 +5,10 @@ CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -85,6 +89,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index c797d72319..cdd7524ec4 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -8,6 +8,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -83,6 +87,8 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000 CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y @@ -108,6 +114,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 120e82dcb3..1771c24003 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -8,6 +8,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -104,6 +108,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 233ad42660..bb9d5c809e 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -9,6 +9,10 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -106,6 +110,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index 2a51eba7e8..472463fabb 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -5,6 +5,10 @@ CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -88,6 +92,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index e39edb70e4..526c474955 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -6,6 +6,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t4240rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -88,6 +92,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index d9c6fff447..bbaab35fd8 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -3,6 +3,10 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="t4240rdb" +CONFIG_VID=y +CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -73,6 +77,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/a3y17lte_defconfig b/configs/a3y17lte_defconfig index 6c87825b5d..ddc1801a59 100644 --- a/configs/a3y17lte_defconfig +++ b/configs/a3y17lte_defconfig @@ -9,6 +9,8 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" CONFIG_SYS_LOAD_ADDR=0x40001000 CONFIG_FIT=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_GPIO=y diff --git a/configs/a5y17lte_defconfig b/configs/a5y17lte_defconfig index 2d8782eae4..2534ab0573 100644 --- a/configs/a5y17lte_defconfig +++ b/configs/a5y17lte_defconfig @@ -9,6 +9,8 @@ CONFIG_NR_DRAM_BANKS=12 CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" CONFIG_SYS_LOAD_ADDR=0x40001000 CONFIG_FIT=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_GPIO=y diff --git a/configs/a7y17lte_defconfig b/configs/a7y17lte_defconfig index 39b9741c8a..a2d76377ab 100644 --- a/configs/a7y17lte_defconfig +++ b/configs/a7y17lte_defconfig @@ -9,6 +9,8 @@ CONFIG_NR_DRAM_BANKS=12 CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" CONFIG_SYS_LOAD_ADDR=0x40001000 CONFIG_FIT=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_GPIO=y diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig index 3fa00fb4cc..b79b5b6ffa 100644 --- a/configs/adp-ae3xx_defconfig +++ b/configs/adp-ae3xx_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x140000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae3xx" +CONFIG_SYS_CLK_FREQ=39062500 CONFIG_TARGET_ADP_AE3XX=y CONFIG_SYS_LOAD_ADDR=0x300000 CONFIG_FIT=y diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig index cc6541b1e3..503f2ae131 100644 --- a/configs/adp-ag101p_defconfig +++ b/configs/adp-ag101p_defconfig @@ -6,6 +6,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="ag101p" +CONFIG_SYS_CLK_FREQ=39062500 CONFIG_TARGET_ADP_AG101P=y CONFIG_SYS_LOAD_ADDR=0x300000 CONFIG_FIT=y diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index f65f58cbef..0324f1e7de 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -30,7 +30,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 9324ed1f6c..2484d19445 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -32,7 +32,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index bd06c8ed89..9f21084a54 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -34,7 +34,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index 524996c870..d69a585b82 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -31,7 +31,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index 479c1ded58..c30763ac1e 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -31,7 +31,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 1ec993ccc5..8ef8e91a4f 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -33,7 +33,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index b6a97f27d1..2bf3dd66ac 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -35,7 +35,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index 190206fe44..e8dc447874 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -32,7 +32,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_FTMAC100=y CONFIG_BAUDRATE=38400 diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 698e80a331..3ce2129e49 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -12,6 +12,7 @@ CONFIG_K3_ATF_LOAD_ADDR=0x701c0000 CONFIG_TARGET_AM642_A53_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 +CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am642-evm" CONFIG_SPL_TEXT_BASE=0x80080000 @@ -35,7 +36,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y -CONFIG_SPL_DM_GPIO=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y @@ -77,9 +77,9 @@ CONFIG_SPL_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y -CONFIG_CLK_TI_SCI=y -CONFIG_CLK_CCF=y CONFIG_SPL_CLK_CCF=y +CONFIG_CLK_CCF=y +CONFIG_CLK_TI_SCI=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y @@ -90,7 +90,6 @@ CONFIG_TI_K3_NAVSS_UDMA=y CONFIG_TI_SCI_PROTOCOL=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_OMAP24XX=y -CONFIG_DM_GPIO=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_SUPPORT_EMMC_BOOT=y @@ -112,9 +111,7 @@ CONFIG_TI_AM65_CPSW_NUSS=y CONFIG_PHY=y CONFIG_SPL_PHY=y CONFIG_PHY_CADENCE_TORRENT=y -CONFIG_SPL_PHY_CADENCE_TORRENT=y CONFIG_PHY_J721E_WIZ=y -CONFIG_SPL_PHY_J721E_WIZ=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index 342e552f74..2b609ad9ac 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -10,7 +10,6 @@ CONFIG_TARGET_AM642_R5_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 CONFIG_DM_GPIO=y -CONFIG_SPL_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am642-r5-evm" CONFIG_SPL_TEXT_BASE=0x70000000 @@ -84,9 +83,9 @@ CONFIG_SPL_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y -CONFIG_CLK_TI_SCI=y -CONFIG_CLK_CCF=y CONFIG_SPL_CLK_CCF=y +CONFIG_CLK_CCF=y +CONFIG_CLK_TI_SCI=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y @@ -107,11 +106,8 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY=y CONFIG_SPL_PHY=y CONFIG_PHY_CADENCE_SIERRA=y -CONFIG_SPL_PHY_CADENCE_SIERRA=y CONFIG_PHY_CADENCE_TORRENT=y -CONFIG_SPL_PHY_CADENCE_TORRENT=y CONFIG_PHY_J721E_WIZ=y -CONFIG_SPL_PHY_J721E_WIZ=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set CONFIG_SPL_PINCTRL=y diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index 668e9c363a..3af41e8fed 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -40,7 +40,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:256k(u-boot),64k(u-boot-env),6144k(rootfs),1600k(uImage),64k(NVRAM),64k(ART)" # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=25000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index df2913531b..17aeda48e2 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -39,7 +39,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1472k(uImage),64k(ART)" # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=25000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig index e2f6f09376..3aa0ea5c56 100644 --- a/configs/ap152_defconfig +++ b/configs/ap152_defconfig @@ -39,6 +39,7 @@ CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1472k(uImage),64k(ART)" # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_SPI_MAX_HZ=25000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set CONFIG_MTD=y diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 659e58f093..9645c2f210 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index b5c846aa6a..c793ab98f0 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -27,6 +27,7 @@ CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index 59e5113e37..86d48eb6d9 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig index 4a72ae4876..2f5c115d84 100644 --- a/configs/armadillo-800eva_defconfig +++ b/configs/armadillo-800eva_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Armadillo-800EVA Board" CONFIG_R8A7740=y CONFIG_TARGET_ARMADILLO_800EVA=y +CONFIG_SYS_CLK_FREQ=50000000 CONFIG_SYS_LOAD_ADDR=0x44000000 CONFIG_BOOTDELAY=3 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig index d26628aa2b..a97c4ffd48 100644 --- a/configs/astro_mcf5373l_defconfig +++ b/configs/astro_mcf5373l_defconfig @@ -40,3 +40,4 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_MCFUART=y +CONFIG_WATCHDOG=y diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index 2bb6039e42..ebcf14daa3 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -37,7 +37,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index 904f0b28fb..7b9e0a4928 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -37,7 +37,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index 5d07a9c49a..5ec1e61ebd 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -36,7 +36,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 1277d49b7e..94c283404b 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -36,7 +36,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index f4e5407185..29b392374f 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -40,7 +40,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index f4e5407185..29b392374f 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -40,7 +40,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 64b45c3cec..f4d5dba4a4 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -36,7 +36,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index d170b69dae..72228b5597 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -36,7 +36,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index 9fb18c2cfa..cff3b1ae02 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -37,7 +37,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index 2c8098cf36..350faaf5f2 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -37,7 +37,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index 479efeb121..9943b868c0 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -38,7 +38,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index 1e41ea4bd6..28479b92c7 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -37,7 +37,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index 5797f16a1e..5072a9bcd2 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -37,7 +37,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 3609fd94e2..55aa939978 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_ZYNQ_MAC_IN_EEPROM=y CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xfa +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x8000000 diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig index d430dea9e3..c3fff0f4a9 100644 --- a/configs/bcm7260_defconfig +++ b/configs/bcm7260_defconfig @@ -35,4 +35,5 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCMSTB=y CONFIG_MTD=y +CONFIG_SYS_NS16550=y # CONFIG_EFI_LOADER is not set diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index de64161f8c..46909e9cc0 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -37,6 +37,9 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCMSTB=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_BCMSTB_SPI=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index 3db8004640..8aa8438467 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 4cd6a7c102..ffeee33fe5 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_VENDOR="bitmain" CONFIG_SYS_BOARD="antminer_s9" CONFIG_SYS_CONFIG_NAME="bitmain_antminer_s9" CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_ENV_OFFSET=0x300000 diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index 47995eab20..a2126eeadf 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 10d1194569..197d462ce0 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index 576f5d90f7..91b309af03 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_LOAD_ADDR=0x80280000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" @@ -28,6 +29,8 @@ CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=0 CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index 62b54d95b1..091b060c5b 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 2dd37f64c0..785314a362 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -6,6 +6,7 @@ CONFIG_MAX_CPUS=8 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_coral" CONFIG_SPL_TEXT_BASE=0xfef10000 +CONFIG_TPL_TEXT_BASE=0xffff8000 CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000 CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index a9f81e3c09..521795dc66 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 1e87b11874..41a9e7f37a 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index 3cc25b5373..c3c133baee 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_SPL_TEXT_BASE=0xffe70000 +CONFIG_TPL_TEXT_BASE=0xfffd8000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index f1ccdc4572..03dfc6825a 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 3c455208f5..9622157015 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -24,6 +24,8 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y # CONFIG_SPL_BANNER_PRINT is not set +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1c CONFIG_SPL_MMC_TINY=y CONFIG_HUSH_PARSER=y CONFIG_CMD_DM=y @@ -35,6 +37,7 @@ CONFIG_CMD_FAT=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_VERSION_VARIABLE=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_JZ4780_EFUSE=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 1f3c0f17d0..0d95bdd340 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index 88ee270a32..b883fc105f 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_SYS_MALLOC_F_LEN=0x2000 @@ -21,7 +22,6 @@ CONFIG_SYS_PROMPT="Colibri T20 # " CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_NFS is not set @@ -48,6 +48,7 @@ CONFIG_SYS_I2C_TEGRA=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_TEGRA_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_DM_PMIC=y diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index 3c37341932..abbc0662ba 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index 44db311091..d6844a48ac 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -54,7 +54,6 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index 426c3388b3..a6d7178a1b 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -9,6 +9,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SYS_LOAD_ADDR=0x10000000 +CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index a96e251dc5..8ba4b6796c 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -9,6 +9,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SYS_LOAD_ADDR=0x10000000 +CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_R=y diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index 86947507ef..83e3aea1fd 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -9,6 +9,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SYS_LOAD_ADDR=0x10000000 +CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 9c3c92a2ae..d448113108 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -61,6 +61,7 @@ CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig index bf6186030c..ff8f413810 100644 --- a/configs/crs305-1g-4s-bit_defconfig +++ b/configs/crs305-1g-4s-bit_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CRS3XX_98DX3236=y diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index 5fc805875b..a71b6425ea 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CRS3XX_98DX3236=y diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig index 3de29490e8..c0746be764 100644 --- a/configs/crs326-24g-2s-bit_defconfig +++ b/configs/crs326-24g-2s-bit_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CRS3XX_98DX3236=y diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig index 77296abfc9..344f1b0824 100644 --- a/configs/crs326-24g-2s_defconfig +++ b/configs/crs326-24g-2s_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CRS3XX_98DX3236=y diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig index 513cc52562..edfd0a4faf 100644 --- a/configs/crs328-4c-20s-4s-bit_defconfig +++ b/configs/crs328-4c-20s-4s-bit_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CRS3XX_98DX3236=y diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig index dd0cd63b90..d6f93534dd 100644 --- a/configs/crs328-4c-20s-4s_defconfig +++ b/configs/crs328-4c-20s-4s_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CRS3XX_98DX3236=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index 4655a15616..a856202d11 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/net2big_v2/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NET2BIG_V2=y @@ -13,7 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-d2net" CONFIG_IDENT_STRING=" D2 v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" @@ -42,12 +42,12 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 8437a2714b..0c27677547 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_SPI=y CONFIG_LTO=y CONFIG_SYS_LOAD_ADDR=0xc0700000 CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run envboot; run mmcboot; " diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 8561f8d23e..694e17c184 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -15,6 +15,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_LTO=y CONFIG_SYS_LOAD_ADDR=0xc0700000 +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp" diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 78dd697bab..aeb9c35b5d 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_SPI=y CONFIG_LTO=y CONFIG_SYS_LOAD_ADDR=0xc0700000 CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run envboot; run mmcboot; " diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index 399cecb947..03f938455e 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index dfc27ba48b..32a7349993 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -41,7 +41,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y # CONFIG_DOS_PARTITION is not set CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 54edfff4bd..9c54e7fe80 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -45,7 +45,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 8435f155fd..90fd8e8298 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -44,7 +44,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 6a11aa0ecb..3d0b06fbc6 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -45,7 +45,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig index b2ee2c2843..3c0b045a21 100644 --- a/configs/db-xc3-24g4xg_defconfig +++ b/configs/db-xc3-24g4xg_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/db-xc3-24g4xg/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SYS_MEMTEST_START=0x00800000 diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index 6dfd3368cf..572d7443d6 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2000 +CONFIG_IDENT_STRING=" ##v01.06" CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 @@ -35,6 +36,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index 98e588f3bb..af17900a78 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -43,6 +43,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y CONFIG_DMA_LPC32XX=y +CONFIG_LPC32XX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_LPC32XX=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 4017eb69ad..4034f9ca75 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -27,6 +27,9 @@ CONFIG_CMD_NAND_LOCK_UNLOCK=y CONFIG_BOOTP_DNS2=y CONFIG_BOOTP_NTPSERVER=y CONFIG_CMD_JFFS2=y +CONFIG_JFFS2_DEV="nand0" +CONFIG_JFFS2_PART_OFFSET=0x680000 +CONFIG_JFFS2_PART_SIZE=0xF980000 CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs)" @@ -50,4 +53,5 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 CONFIG_CONS_INDEX=3 +CONFIG_JFFS2_NAND=y CONFIG_OF_LIBFDT=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 1f63bc8467..d62bd961de 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -37,7 +37,6 @@ CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 -CONFIG_SPL_WATCHDOG=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 145b28ee98..26af4a6bfe 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -45,7 +45,6 @@ CONFIG_SPL_I2C=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 -CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="display5 > " CONFIG_CMD_BOOTZ=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index e0b36f4cdb..218a33d9a0 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -43,7 +43,6 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y -CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="display5 factory > " CONFIG_CMD_BOOTZ=y diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index a133402ff2..144fd30706 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/d-link/dns325/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=1 CONFIG_TARGET_DNS325=y @@ -40,6 +41,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NETCONSOLE=y CONFIG_DM=y +CONFIG_KIRKWOOD_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index ba934088e1..6c89a9a6fb 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Seagate/dockstar/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_DOCKSTAR=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 72864d2608..557013dbac 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/dreamplug/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_DREAMPLUG=y @@ -34,7 +35,6 @@ CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_ENV_ADDR=0x100000 CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index c5a707c3b7..8e2aea9ad6 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -8,6 +8,7 @@ CONFIG_CMDLINE_TAG=y CONFIG_INITRD_TAG=y CONFIG_STATIC_MACH_TYPE=y CONFIG_MACH_TYPE=527 +CONFIG_SYS_KWD_CONFIG="board/Synology/ds109/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_DS109=y @@ -34,7 +35,6 @@ CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_ENV_ADDR=0x3D0000 CONFIG_NETCONSOLE=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 5a7c95825c..d33246786c 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -51,7 +51,6 @@ CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/durian_defconfig b/configs/durian_defconfig index 158fec2dc4..b44fd90df5 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="phytium-durian" # CONFIG_PSCI_RESET is not set +CONFIG_SYS_PCI_64BIT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x90000000 diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig index ed6557a6a3..e600978f57 100644 --- a/configs/elgin-rv1108_defconfig +++ b/configs/elgin-rv1108_defconfig @@ -6,9 +6,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rv1108-elgin-r1" CONFIG_ROCKCHIP_RV1108=y -# CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_ROCKCHIP_BOOT_MODE_REG=0 CONFIG_TARGET_ELGIN_RV1108=y +# CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index 8c76a53e69..1821b23ed5 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -54,7 +54,6 @@ CONFIG_CMD_REISER=y CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y @@ -64,6 +63,7 @@ CONFIG_AT91_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0 +CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_RAW_NAND=y @@ -81,3 +81,4 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_JFFS2_NAND=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 0f03a72e52..ebdc06b35a 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -2,9 +2,9 @@ CONFIG_ARM=y CONFIG_SYS_DCACHE_OFF=y CONFIG_SPL_SYS_THUMB_BUILD=y CONFIG_ARCH_ASPEED=y +CONFIG_SYS_TEXT_BASE=0x80000000 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x800 -CONFIG_SYS_TEXT_BASE=0x80000000 CONFIG_ASPEED_AST2600=y CONFIG_TARGET_EVB_AST2600=y CONFIG_SPL_LIBCOMMON_SUPPORT=y @@ -75,8 +75,6 @@ CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_WDT=y -CONFIG_SHA512_ALGO=y -CONFIG_SHA512=y CONFIG_SHA384=y CONFIG_HEXDUMP=y # CONFIG_EFI_LOADER is not set diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 9488fc040a..7d7e7f469a 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -68,6 +68,7 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_ROCKCHIP_OTP=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PHY_REALTEK=y diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index ce44c3602b..f94e5cbd61 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_ROCKCHIP=y diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index 544d6debd0..c2f15f1830 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index a8b1c42ac6..5dc6d9577e 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_TPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x61000000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index eca9f5c54d..97d4c14f65 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index 3194a2bb62..a3a319f4c2 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -49,6 +49,7 @@ CONFIG_CLK=y # CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_DM_ETH=y diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index 7453ccf127..5975d250aa 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 7207028403..0a84ccef26 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -69,6 +69,7 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_ROCKCHIP_OTP=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PHY_REALTEK=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 057e9095f0..2f722082a3 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 396b2d9ab2..97ed6709b3 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x0 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g25-gardena-smart-gateway" diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index 36d68f8b51..2bd302f76b 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -4,7 +4,6 @@ CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x0 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xA0000 CONFIG_ENV_SECT_SIZE=0x10000 diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index be77c9966a..a106b89fab 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2000 +CONFIG_IDENT_STRING=" ##v01.07" CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 @@ -35,6 +36,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index 70f703639c..ec8b7398d0 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Seagate/goflexhome/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_GOFLEXHOME=y diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig index 72707511f0..678dbd31d5 100644 --- a/configs/grpeach_defconfig +++ b/configs/grpeach_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="r7s72100-gr-peach-u-boot" CONFIG_RZA1=y +CONFIG_SYS_CLK_FREQ=66666666 CONFIG_SYS_LOAD_ADDR=0x20400000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -31,14 +32,7 @@ CONFIG_MAC_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_RZA1_GPIO=y diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig index 7c7974c123..1bf2e5d7b2 100644 --- a/configs/gurnard_defconfig +++ b/configs/gurnard_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_TFTP_TSIZE=y CONFIG_AT91_GPIO=y +CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index 2e6b8e0282..e7802afb0a 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/guruplug/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_GURUPLUG=y diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index 6ce4f559e1..9763b21a34 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 @@ -16,7 +17,6 @@ CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set @@ -37,6 +37,7 @@ CONFIG_SPL_DM=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_TEGRA_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_PCI=y diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index 913fb438cd..23a211c391 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/raidsonic/ib62x0/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_IB62X0=y diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index a6607faf7f..605b98b164 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/iomega/iconnect/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_ICONNECT=y diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index 4f77fd7fe3..246cc3d045 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -8,7 +8,6 @@ CONFIG_SYS_CLK_FREQ=66000000 CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_IDS8313=y -CONFIG_SYS_IMMR=0xF0000000 CONFIG_CORE_PLL_RATIO_2_1=y CONFIG_PCI_HOST_MODE_ENABLE=y CONFIG_BOOT_ROM_INTERFACE_GPCM_8BIT=y @@ -199,4 +198,6 @@ CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_RTC_PCF8563=y CONFIG_SYS_NS16550=y +CONFIG_WATCHDOG=y +CONFIG_JFFS2_NAND=y CONFIG_OF_LIBFDT=y diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index 249bdd6d83..5192dd224b 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -35,7 +35,7 @@ CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x0 CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG=y CONFIG_SPL_DMA=y CONFIG_SPL_MMC_TINY=y @@ -72,14 +72,6 @@ CONFIG_SPL_OF_PLATDATA=y # CONFIG_SPL_OF_PLATDATA_PARENT is not set CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=3 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=40000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y @@ -91,7 +83,6 @@ CONFIG_MMC_MXS=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=3 -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_ISSI=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 54029adba4..3f59b99faf 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -77,7 +77,6 @@ CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x0 -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 29d060166b..777d452ce4 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -26,6 +26,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index 72848914b5..b72f219c78 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -29,6 +29,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index b0b562aebc..9c8dd246a5 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -26,6 +26,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb" CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index 88e3b04a50..98ac1c32b1 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -26,6 +26,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb" CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 647901cfa0..8ce78d56cb 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -28,6 +28,8 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb" CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y @@ -81,7 +83,6 @@ CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index d03bba797b..01395fc7eb 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -26,6 +26,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index c4c75d2a38..3bcafb3e15 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -33,6 +33,8 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="gsc wd-disable" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index b1f5cb4029..934ca56183 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -35,6 +35,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index 8fc60a3480..49b6d1edac 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -34,6 +34,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index 8a0b85a5c2..28cc551dc4 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -29,6 +29,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 3ee15d3edf..865d657a6d 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -31,6 +31,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index a448734a92..0ff549f0be 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -34,6 +34,8 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index 907b1d2f15..f8a9d701d5 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -28,6 +28,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_CMD_FUSE=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 92aae70d4a..c63cf236d6 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -25,9 +25,12 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y @@ -51,6 +54,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 +CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index 61504d326b..7714951dd2 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -25,11 +25,14 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_OF_SYSTEM_SETUP=y CONFIG_SD_BOOT=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y @@ -57,6 +60,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 +CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index a432035a95..c58c5ffed9 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL=y CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qm_mek/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 +CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -29,6 +30,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index a19a4beb54..8a336cb23a 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL=y CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qxp_mek/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 +CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -29,6 +30,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_SPL_POWER_DOMAIN=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index 129931f4c3..b444713b86 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -30,6 +30,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_WATCHDOG=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 27c8713b9e..8779e58b93 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage-is2.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NETSPACE_V2=y @@ -13,7 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-is2" CONFIG_IDENT_STRING=" IS v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" @@ -42,12 +42,12 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index bb37175d51..425b123ba1 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index d6624dd955..f4b1abfd6a 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_128M16_1.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_ENV_SIZE=0x2000 @@ -48,6 +49,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0x0 diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index bf696cd2db..eba4f09777 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_ENV_SIZE=0x2000 @@ -48,6 +49,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0x0 diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 0731bb5572..5d19c51176 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_KM_FPGA_CONFIG=y @@ -49,6 +50,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0x0 diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 9361e81e80..baffe81a35 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="kmcent2" CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020 +CONFIG_SYS_CLK_FREQ=66666666 CONFIG_MPC85xx=y CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 461f2e3812..53f7abc3fd 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -156,6 +156,7 @@ CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_DBYP_PLL_BYPASSED=y CONFIG_LCRR_EADC_2=y CONFIG_LCRR_CLKDIV_4=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 12aa23095c..9124504e32 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_256M8_1.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 @@ -52,6 +53,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0x0 diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 06b2d1fb57..d81c787612 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_128M16_1.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_KM_FPGA_CONFIG=y @@ -52,6 +53,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0x0 diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index 01709052c1..d230638548 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -139,6 +139,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 7802be8af4..b0b59262de 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -119,6 +119,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index a528bf5cfe..d274c95764 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_128M16_1.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_KM_FPGA_CONFIG=y @@ -53,6 +54,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SOFT=y CONFIG_SYS_I2C_SOFT_SLAVE=0x0 diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index e2bf945bc3..53aaf6caa2 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -118,6 +118,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index 98f613ce16..b333769dc4 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -139,6 +139,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y diff --git a/configs/kontron-sl-mx6ul_defconfig b/configs/kontron-sl-mx6ul_defconfig index 47faca8a26..6d67475dc6 100644 --- a/configs/kontron-sl-mx6ul_defconfig +++ b/configs/kontron-sl-mx6ul_defconfig @@ -29,7 +29,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y CONFIG_SPL_SEPARATE_BSS=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8A CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y @@ -55,7 +54,6 @@ CONFIG_OF_LIST="imx6ul-kontron-n631x-s imx6ull-kontron-n641x-s" CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=2 CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index d8567031a4..35d12fca32 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -57,10 +57,6 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIST="imx8mm-kontron-n801x-s imx8mm-kontron-n801x-s-lvds" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=80000000 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index 00c156409f..6c7df1e24d 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_ROCKCHIP=y diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index 796934abde..87890cd6a7 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="da850-lego-ev3" CONFIG_SYS_LOAD_ADDR=0xc0700000 +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=0 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds - press 'l' to stop...\n" diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig index fa4427a815..7cddd329f6 100644 --- a/configs/libretech-ac_defconfig +++ b/configs/libretech-ac_defconfig @@ -40,7 +40,6 @@ CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MESON_GXL=y diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig index 9f8a914bb7..6e08f993fd 100644 --- a/configs/libretech-cc_v2_defconfig +++ b/configs/libretech-cc_v2_defconfig @@ -36,7 +36,6 @@ CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PHY_MESON_GXL=y CONFIG_DM_ETH=y diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig index bde2bb877c..052b1732ed 100644 --- a/configs/libretech-s905d-pc_defconfig +++ b/configs/libretech-s905d-pc_defconfig @@ -37,7 +37,6 @@ CONFIG_SARADC_MESON=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig index 536f9e8d12..ee86ec9b40 100644 --- a/configs/libretech-s912-pc_defconfig +++ b/configs/libretech-s912-pc_defconfig @@ -36,7 +36,6 @@ CONFIG_SARADC_MESON=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index 27dc793227..312713e520 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -40,7 +40,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index 74112bb517..6129881d14 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -40,7 +40,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index d4ca5e7d9d..ad3b7bff42 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y # CONFIG_MMC is not set diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index 34e3568aab..3317a0592b 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y # CONFIG_MMC is not set diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index a10e8c6a9c..cb8b288c39 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index 6a819cb90e..610f32cd99 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index 83ee702d0b..b3cb6f706d 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 44d50172e2..afec07cf8e 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index 9a0162d5a7..93e76d95f1 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -45,17 +45,15 @@ CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=1000000 -CONFIG_USE_ENV_SPI_MODE=y CONFIG_ENV_SPI_MODE=0x03 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 @@ -65,7 +63,10 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=10000000 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index dd472baec5..476ebd0415 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -45,6 +45,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 @@ -54,7 +55,10 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=10000000 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index 10f6ddfab3..d4d9b8f76b 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -46,17 +46,15 @@ CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=1000000 -CONFIG_USE_ENV_SPI_MODE=y CONFIG_ENV_SPI_MODE=0x03 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 @@ -66,7 +64,10 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=10000000 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 3d39b42d42..8767c87cc6 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index d82c6da283..fccbef70ea 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -44,6 +44,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index 7527271c78..bf35286848 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index 652e459a85..7a175d3c74 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_FSL_ESDHC=y diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index 2a999e8798..4705e34e1d 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -13,6 +13,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_AHCI=y CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_QSPI_BOOT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y @@ -44,6 +46,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x51 CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_GIGE=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index f25c9c7b70..e387264d89 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -18,10 +18,13 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_AHCI=y CONFIG_SYS_LOAD_ADDR=0x82000000 -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT,SD_BOOT_QSPI" +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aiot/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg" +CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y @@ -60,6 +63,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x51 CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_GIGE=y @@ -70,6 +74,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_U_QE=y CONFIG_SYS_QE_FW_ADDR=0xf40000 CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 8571ca392e..79ccc41a43 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -54,6 +55,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index ff27477740..0a2a076332 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -55,6 +56,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index d6b36e61bc..0b12f100d4 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -28,6 +28,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg" @@ -76,6 +77,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index 725e2f4412..63930e4a13 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -53,6 +54,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 3a2fe03139..f4e2274fb8 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -55,6 +56,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 6a0523b8e0..0eacaa3354 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -56,6 +57,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index a787ce0b7c..f967619ef9 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -54,6 +54,7 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index e9efcd7fbc..fa190a7502 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -26,7 +26,7 @@ CONFIG_AHCI=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg" @@ -74,6 +74,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 082ef4c54f..625dd086ab 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -26,11 +26,11 @@ CONFIG_AHCI=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT,SD_BOOT_QSPI" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -71,6 +71,7 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index 4385df6248..5c8cee3ea9 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -35,6 +35,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DM_I2C=y @@ -51,13 +52,12 @@ CONFIG_SPI_FLASH_DATAFLASH=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_FIXED=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y CONFIG_DM_DSA=y -CONFIG_SJA1105=y CONFIG_PHY_GIGE=y CONFIG_MII=y +CONFIG_SJA1105=y CONFIG_TSEC_ENET=y CONFIG_NVME=y CONFIG_PCI=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 506a33789c..a3b8f248c7 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -22,11 +22,12 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" +CONFIG_SYS_EXTRA_OPTIONS="SPL_FSL_PBL" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atsn/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atsn/ls102xa_rcw_sd.cfg" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_MISC_INIT_R=y @@ -50,6 +51,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DM_I2C=y @@ -66,13 +68,12 @@ CONFIG_SPI_FLASH_DATAFLASH=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_FIXED=y -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y CONFIG_DM_DSA=y -CONFIG_SJA1105=y CONFIG_PHY_GIGE=y CONFIG_MII=y +CONFIG_SJA1105=y CONFIG_TSEC_ENET=y CONFIG_NVME=y CONFIG_PCI=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 798149dbb3..f61d29ce89 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -44,6 +44,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index 09ccc12b14..02c25cda7d 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -46,6 +46,7 @@ CONFIG_ENV_ADDR=0x60300000 CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index a58e05c056..49d6dda6a5 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -47,6 +47,7 @@ CONFIG_ENV_ADDR=0x60300000 CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 614f670a39..36a8aee0b1 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -47,6 +47,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index f3ecf43952..756e072f9c 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -27,10 +27,10 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg" +CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=0 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" @@ -63,6 +63,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y # CONFIG_SPL_DM_I2C is not set CONFIG_SPL_SYS_I2C_LEGACY=y @@ -84,6 +85,7 @@ CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_U_QE=y CONFIG_SYS_QE_FW_ADDR=0x940000 CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index cf96a244de..ede4c95dd1 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -27,7 +27,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg" @@ -65,6 +64,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index af5deb526e..1315043094 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -27,11 +27,11 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT,SD_BOOT_QSPI" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" @@ -64,6 +64,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index 2c4a60e38c..2fb90735ab 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y +CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y @@ -45,6 +46,7 @@ CONFIG_DM=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 0aa91b183b..0bdca833f1 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_WDT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y +CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y @@ -51,6 +52,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig index 0a76166987..dbf6af99f5 100644 --- a/configs/ls1028aqds_tfa_lpuart_defconfig +++ b/configs/ls1028aqds_tfa_lpuart_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_WDT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y +CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y @@ -51,6 +52,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index c385978d37..5cb55d046d 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -36,6 +36,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y +CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y @@ -44,6 +45,7 @@ CONFIG_DM=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index 035974afd8..b58254dc65 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_WDT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y +CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y @@ -50,6 +51,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index d6d64deaef..1a484ff483 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -14,11 +14,16 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" @@ -49,6 +54,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -63,6 +69,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index ba3a382958..dfd7fb881b 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -14,12 +14,17 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" @@ -50,6 +55,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -64,6 +70,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index e2dd6e61ac..9e87f0fd88 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -17,6 +17,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -26,6 +30,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043aqds/ls1043aqds_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043aqds/ls1043aqds_rcw_nand.cfg" @@ -69,6 +74,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -84,6 +90,9 @@ CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index 8dd5faf259..bffe105220 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -14,11 +14,16 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" @@ -50,6 +55,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -64,6 +70,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 6b13c492f0..e01324ccef 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -15,11 +15,16 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y @@ -50,6 +55,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y @@ -57,7 +63,10 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 31aa2be844..b487b370b5 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -17,6 +17,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -26,7 +30,7 @@ CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043aqds/ls1043aqds_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg" @@ -69,6 +73,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -83,6 +88,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 8c6a3df880..084d104ea4 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -17,6 +17,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -26,11 +30,12 @@ CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT,SD_BOOT_QSPI" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043aqds/ls1043aqds_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043aqds/ls1043aqds_rcw_sd_qspi.cfg" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" @@ -67,6 +72,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y @@ -74,7 +80,10 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index a680590c1e..3e303c5311 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -15,12 +15,17 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" @@ -48,6 +53,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y @@ -64,7 +70,10 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index cce59cdb5a..8d02bed8e1 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -16,12 +16,17 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1043aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" @@ -48,7 +53,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=0 CONFIG_ENV_ADDR=0x60500000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -58,6 +62,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y @@ -74,7 +79,10 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 6652caddd6..2d85f671cc 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -37,6 +37,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_DM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -51,6 +52,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 9c163a03d4..ca6958fdb4 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -40,6 +40,7 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -54,6 +55,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 94b4f13ed4..bbc775a4d9 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -52,6 +52,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 @@ -66,6 +67,9 @@ CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index a188dd03fe..e8986db42b 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -59,6 +59,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -74,6 +75,9 @@ CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 4360b1ace1..31380eb85b 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043ardb/ls1043ardb_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg" @@ -54,6 +53,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 @@ -68,6 +68,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 05cb940e6b..c399ed0891 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -22,7 +22,6 @@ CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043ardb/ls1043ardb_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg" @@ -59,6 +58,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -73,6 +73,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 966a3ff7d1..8ac9a06c72 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_DM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -52,6 +53,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_REALTEK=y CONFIG_PHY_VITESSE=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index 7e741c7183..99c125731f 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -44,6 +44,7 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -58,6 +59,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_REALTEK=y diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index 0b14f27398..cd1915bc81 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x52 diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index 85db989f96..af07b1cd46 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -41,6 +41,7 @@ CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x52 diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index bcf74802bd..55426320d8 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -14,11 +14,16 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" @@ -47,6 +52,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index caf602cf59..f136aeafae 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -14,11 +14,16 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" @@ -50,6 +55,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 35d6297545..6d448905ef 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -14,12 +14,17 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" @@ -51,6 +56,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index d555b49941..e4cd4a2f60 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -17,6 +17,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -25,6 +29,7 @@ CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046aqds/ls1046aqds_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046aqds/ls1046aqds_rcw_nand.cfg" @@ -69,6 +74,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index fa71787917..fe295c51e4 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -15,11 +15,16 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y @@ -51,6 +56,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 67d492abf9..fe1fe6f162 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -17,6 +17,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -26,6 +30,7 @@ CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046aqds/ls1046aqds_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046aqds/ls1046aqds_rcw_sd_ifc.cfg" @@ -70,6 +75,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index cd7d180bfc..18f560e947 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -17,6 +17,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -26,11 +30,12 @@ CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI" +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046aqds/ls1046aqds_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046aqds/ls1046aqds_rcw_sd_qspi.cfg" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:2m(uboot),14m(free)" @@ -69,6 +74,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index a73ced200c..b84f8772c6 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -15,12 +15,17 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" @@ -49,6 +54,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 4bf413c0eb..f706dd6179 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -16,12 +16,17 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv" +CONFIG_VOL_MONITOR_INA220=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" @@ -49,7 +54,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=0 CONFIG_ENV_ADDR=0x60500000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -59,6 +63,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 0fb5998a4b..46301fb183 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -63,6 +63,7 @@ CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 942226fdbe..a4696f1a16 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -45,6 +45,7 @@ CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index 36ab2adebc..1837833a8d 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -49,6 +49,7 @@ CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 62684d6cd4..777b7678a3 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -68,6 +68,7 @@ CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index be15aed2ed..2abbbaf6db 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -59,6 +59,7 @@ CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y # CONFIG_SPL_DM_I2C is not set CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index b0302ef805..ac8f2bcb1b 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -62,6 +62,7 @@ CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index 995daae10e..bd1dc05c58 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -41,6 +41,7 @@ CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index 3501764e6f..149091af4a 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -47,6 +47,7 @@ CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x53 diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index 590599536b..a2b2a34e3f 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -11,12 +11,18 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_USE_BOOTCOMMAND=y @@ -50,6 +56,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index 4cebc4b674..dbcd6e2ea2 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -11,6 +11,11 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -46,6 +51,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y @@ -55,7 +61,10 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index 7dfe1a6506..7033c92897 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -12,6 +12,11 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -49,6 +54,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y @@ -58,7 +64,10 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index acb951cf54..e5372317c3 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -14,6 +14,11 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -22,6 +27,7 @@ CONFIG_SPL=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_SD_BOOT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" @@ -61,6 +67,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index b83bb941ef..9df9845296 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -14,6 +14,11 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -24,8 +29,8 @@ CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="mmcinfo;mmc read 0x80001000 0x6800 0x800; fsl_mc lazyapply dpl 0x80001000 && mmc read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" @@ -59,6 +64,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y @@ -68,7 +74,10 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index f98d34e69c..aac8486bc3 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -14,6 +14,11 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -22,6 +27,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_DISPLAY_BOARDINFO is not set @@ -58,6 +64,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y @@ -74,7 +81,10 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index 668ec3d80f..ed0943b6ec 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -11,6 +11,11 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -48,6 +53,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_MXC_I2C1_SPEED=40000000 CONFIG_SYS_MXC_I2C2_SPEED=40000000 diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index 7953d9bb80..486a20dbc5 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -12,6 +12,11 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -51,6 +56,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_MXC_I2C1_SPEED=40000000 CONFIG_SYS_MXC_I2C2_SPEED=40000000 diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 8dea9787c3..f0beb9fdfc 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -14,6 +14,11 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -23,8 +28,8 @@ CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set @@ -60,6 +65,7 @@ CONFIG_SCSI_AHCI=y # CONFIG_SPL_BLK is not set CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_MXC_I2C1_SPEED=40000000 CONFIG_SYS_MXC_I2C2_SPEED=40000000 diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index 580f6a2e94..d54ff504a8 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -14,6 +14,11 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -24,8 +29,8 @@ CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI" CONFIG_SD_BOOT=y +CONFIG_SD_BOOT_QSPI=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set @@ -61,6 +66,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_MXC_I2C1_SPEED=40000000 CONFIG_SYS_MXC_I2C2_SPEED=40000000 diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index 1f9a15bd06..dd547f797b 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -13,6 +13,11 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -48,6 +53,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index c3542257af..fc2d1b475c 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -14,6 +14,11 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="ls1088ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -54,6 +59,7 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index 741a025c4e..0ad25aca76 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -14,6 +14,7 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" @@ -54,6 +55,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y @@ -66,6 +70,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 23d7068ba6..30cdad6fbe 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -14,6 +14,7 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" @@ -57,6 +58,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y @@ -69,6 +73,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 386640cfb4..47f09b6288 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -19,6 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y @@ -67,6 +68,7 @@ CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000 CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y @@ -79,6 +81,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 961bae4813..bbc9f3d113 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -14,6 +14,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y @@ -56,6 +57,7 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y @@ -68,6 +70,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 6cde1d9e78..c7a6e2a851 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -20,6 +20,7 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y @@ -62,6 +63,7 @@ CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y @@ -74,6 +76,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index da0970fa25..15dec62dd4 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -8,12 +8,17 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" @@ -54,6 +59,7 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 9b323c6ec3..909c10b631 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -8,12 +8,17 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" @@ -57,6 +62,7 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 7e28f8a429..f40ecb7e68 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -11,6 +11,10 @@ CONFIG_ENV_OFFSET=0x200000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -19,6 +23,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index 2fcb9c89ec..ed0b1b7622 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -9,6 +9,10 @@ CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2081a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -16,6 +20,7 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y @@ -50,6 +55,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x57 CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index 5f38c386b5..61e0fdf113 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -18,6 +18,7 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" @@ -54,6 +55,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y @@ -69,6 +71,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_FSL_IFC=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_REALTEK=y @@ -86,6 +91,7 @@ CONFIG_NVME=y CONFIG_PCI=y CONFIG_PCIE_LAYERSCAPE_RC=y CONFIG_DM_RTC=y +CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index cfa300f3d4..c49d163346 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -9,6 +9,10 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -16,6 +20,7 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" @@ -40,6 +45,7 @@ CONFIG_SATA_CEVA=y CONFIG_DDR_CLK_FREQ=133333333 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 @@ -48,6 +54,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index 2e4a2872ac..b8c7c78b8e 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -10,6 +10,10 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y @@ -17,6 +21,7 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y @@ -47,6 +52,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133333333 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EARLY_INIT=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 @@ -55,6 +61,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index 98ac283cb6..3cc9168290 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -11,6 +11,10 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -18,6 +22,7 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" @@ -45,6 +50,7 @@ CONFIG_SATA_CEVA=y CONFIG_DDR_CLK_FREQ=133333333 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y @@ -62,6 +68,7 @@ CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig index f85ff02072..a28b45b129 100644 --- a/configs/ls2088ardb_tfa_defconfig +++ b/configs/ls2088ardb_tfa_defconfig @@ -12,6 +12,10 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" +CONFIG_VOL_MONITOR_IR36021_READ=y +CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -19,6 +23,7 @@ CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" @@ -52,6 +57,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=133333333 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y @@ -69,6 +75,7 @@ CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 471b17e2ef..497da09d43 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/buffalo/lsxl/kwbimage-lschl.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_LSXL=y @@ -38,6 +39,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 4188c3264f..cadeb9afd3 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/buffalo/lsxl/kwbimage-lsxhl.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_LSXL=y @@ -38,6 +39,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 211a4d120c..a9a0a27888 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -12,6 +12,11 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2160aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -20,6 +25,7 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" CONFIG_BOARD_EARLY_INIT_R=y @@ -47,6 +53,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index c81ffec747..de8dc553d1 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -13,6 +13,11 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2160aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -21,6 +26,7 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" @@ -54,6 +60,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index 4232adea4b..ac42c2508c 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -12,6 +12,11 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2160ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y @@ -21,6 +26,7 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" CONFIG_MISC_INIT_R=y @@ -45,6 +51,7 @@ CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index 662e9d5fe4..59955eebbe 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -13,6 +13,11 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2160ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y @@ -22,6 +27,7 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" @@ -53,6 +59,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig index 826e1bf041..149e82bed3 100644 --- a/configs/lx2160ardb_tfa_stmm_defconfig +++ b/configs/lx2160ardb_tfa_stmm_defconfig @@ -13,6 +13,11 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2160ardb_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y @@ -22,6 +27,7 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" @@ -53,6 +59,7 @@ CONFIG_FSL_CAAM=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x57 diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig index 0df098de9a..d017a53eff 100644 --- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig @@ -12,6 +12,11 @@ CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2162aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -20,6 +25,7 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" CONFIG_BOARD_EARLY_INIT_R=y diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig index d2102241cc..203554b61f 100644 --- a/configs/lx2162aqds_tfa_defconfig +++ b/configs/lx2162aqds_tfa_defconfig @@ -13,6 +13,11 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2162aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -21,6 +26,7 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig index 58de9c17a0..32487eb41c 100644 --- a/configs/lx2162aqds_tfa_verified_boot_defconfig +++ b/configs/lx2162aqds_tfa_verified_boot_defconfig @@ -13,6 +13,11 @@ CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_FSL_USE_PCA9547_MUX=y +CONFIG_VID=y +CONFIG_SPL_VID=y +CONFIG_VID_FLS_ENV="lx2162aqds_vdd_mv" +CONFIG_VOL_MONITOR_LTC3882_READ=y +CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -22,6 +27,7 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 2e5105053a..ac5afe6b1a 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -36,7 +36,6 @@ CONFIG_PREBOOT="run try_bootscript" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 9fa2f5134b..a69c0351b1 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -33,7 +33,6 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index 2a6f8d09d9..d1eedc6aa8 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 @@ -17,7 +18,6 @@ CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # " # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set @@ -32,6 +32,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_TEGRA_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig index 6fda013ab1..5d9f783c95 100644 --- a/configs/meesc_dataflash_defconfig +++ b/configs/meesc_dataflash_defconfig @@ -28,7 +28,6 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index ddffbc6125..f85292d5b1 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index decc1f2ec3..a053d2f761 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -60,4 +60,5 @@ CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_QSPI=y +CONFIG_SOFT_SPI=y CONFIG_IMX_THERMAL=y diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index 15155276e8..07e5e23575 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -59,4 +59,5 @@ CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_QSPI=y +CONFIG_SOFT_SPI=y CONFIG_IMX_THERMAL=y diff --git a/configs/mx6ulz_14x14_evk_defconfig b/configs/mx6ulz_14x14_evk_defconfig index f8153c15ee..2f9c7a2b59 100644 --- a/configs/mx6ulz_14x14_evk_defconfig +++ b/configs/mx6ulz_14x14_evk_defconfig @@ -50,4 +50,5 @@ CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_QSPI=y +CONFIG_SOFT_SPI=y CONFIG_IMX_THERMAL=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 581d84518c..7e4e19a9f7 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Seagate/nas220/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NAS220=y @@ -41,6 +42,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y +CONFIG_KIRKWOOD_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y @@ -52,3 +54,5 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_NAND=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index 04a7af2785..985f530fb8 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -3,9 +3,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/net2big_v2/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NET2BIG_V2=y +CONFIG_NET2BIG_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -13,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-net2big" CONFIG_IDENT_STRING=" 2Big v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" @@ -42,12 +43,12 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index ff2ee67232..668f4ea291 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -3,9 +3,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage-ns2l.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NETSPACE_V2=y +CONFIG_NETSPACE_LITE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -13,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2lite" CONFIG_IDENT_STRING=" NS v2 Lite" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" @@ -42,12 +43,12 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index 2e30ca5484..25ce3c61a1 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -3,9 +3,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NETSPACE_V2=y +CONFIG_NETSPACE_MAX_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -13,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2max" CONFIG_IDENT_STRING=" NS Max v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" @@ -42,12 +43,12 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 98b1c4e53c..0c9a3036eb 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -3,9 +3,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage-ns2l.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NETSPACE_V2=y +CONFIG_NETSPACE_MINI_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -13,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2mini" CONFIG_IDENT_STRING=" NS v2 Mini" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" @@ -40,13 +41,13 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_BLK=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 92ff66550c..8f662edd16 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -3,9 +3,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NETSPACE_V2=y +CONFIG_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -13,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2" CONFIG_IDENT_STRING=" NS v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" @@ -42,12 +43,12 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x0 diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig index fd1ae627e1..4a95f42e4e 100644 --- a/configs/nokia_rx51_defconfig +++ b/configs/nokia_rx51_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y # CONFIG_SYS_THUMB_BUILD is not set +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SUPPORT_PASSING_ATAGS=y CONFIG_CMDLINE_TAG=y diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index 501e82bcee..46ca3bac47 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/zyxel/nsa310s/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NSA310S=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 601786ccd4..a5bd3e8798 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x81000100 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig index 0dbb954273..d29c850518 100644 --- a/configs/octeontx2_95xx_defconfig +++ b/configs/octeontx2_95xx_defconfig @@ -19,6 +19,7 @@ CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x4000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y +CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y @@ -66,25 +67,17 @@ CONFIG_EFI_PARTITION=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=125000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_TSIZE=y CONFIG_DM_I2C=y CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_OCTEONTX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=125000000 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig index 65fb8474e1..1298bfe309 100644 --- a/configs/octeontx2_96xx_defconfig +++ b/configs/octeontx2_96xx_defconfig @@ -19,6 +19,7 @@ CONFIG_AHCI=y CONFIG_SYS_LOAD_ADDR=0x4000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y +CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y @@ -67,14 +68,6 @@ CONFIG_EFI_PARTITION=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=125000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_TSIZE=y @@ -85,12 +78,12 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_OCTEONTX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=125000000 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig index ea62be3063..ba8cc97ab8 100644 --- a/configs/octeontx_81xx_defconfig +++ b/configs/octeontx_81xx_defconfig @@ -68,14 +68,6 @@ CONFIG_EFI_PARTITION=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=16000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_TSIZE=y @@ -83,11 +75,11 @@ CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y CONFIG_DM_I2C=y CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OCTEONTX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=16000000 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig index 47ddc50e7b..26759341c5 100644 --- a/configs/octeontx_83xx_defconfig +++ b/configs/octeontx_83xx_defconfig @@ -65,14 +65,6 @@ CONFIG_EFI_PARTITION=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=16000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_TSIZE=y @@ -80,11 +72,11 @@ CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y CONFIG_DM_I2C=y CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OCTEONTX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=16000000 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index 95f4c93987..54ff5799cb 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x43e00000 CONFIG_SYS_MALLOC_LEN=0x5004000 diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index da256431ab..ca1a58178e 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0xc0700000 +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run envboot; run mmcboot; " diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 9e048d475c..2c5a29cfe3 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OPENRD=y @@ -13,7 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-base" CONFIG_IDENT_STRING="\nOpenRD-Base" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; ${x_bootcmd_usb}; bootm 0x6400000;" diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index 6f9f0a279d..b21d41b1ed 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -4,16 +4,17 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OPENRD=y +CONFIG_BOARD_IS_OPENRD_CLIENT=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-client" CONFIG_IDENT_STRING="\nOpenRD-Client" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; ${x_bootcmd_usb}; bootm 0x6400000;" diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index b5879638cd..ceeb62109a 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -4,16 +4,17 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OPENRD=y +CONFIG_BOARD_IS_OPENRD_ULTIMATE=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-ultimate" CONFIG_IDENT_STRING="\nOpenRD-Ultimate" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; ${x_bootcmd_usb}; bootm 0x6400000;" diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index 38836696c0..b335d851bf 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index ea95943122..67657b0369 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index da33f88d83..d3f169ae24 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 90e9396048..53d98b11f5 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=1026 diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index 6bdc1132f6..2e3eec0ee1 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=1026 diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index 85402e9b82..e4265d6321 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_SYS_MALLOC_LEN=0x2500000 @@ -32,6 +33,7 @@ CONFIG_OF_LIVE=y CONFIG_ENV_OVERWRITE=y # CONFIG_ENV_IS_IN_MMC is not set CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_SPI_MAX_HZ=48000000 CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index a209e41d42..f11b57dde7 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index dcd9a6b889..930191d761 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -38,7 +38,6 @@ CONFIG_CMD_TPM_TEST=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_I2C_CROS_EC_TUNNEL=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 4259f1416e..16fde6d49e 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -37,7 +37,6 @@ CONFIG_CMD_TPM_TEST=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_I2C_CROS_EC_TUNNEL=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index 267864f9ce..53d57e0ba2 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 +CONFIG_SYS_CLK_FREQ=66666666 CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 5b1aa8f1d7..3eaf7fde9c 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 +CONFIG_SYS_CLK_FREQ=66666666 CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 82a52e2835..c6b2719350 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -29,6 +29,8 @@ CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_FLASH_MTD=y @@ -76,7 +78,6 @@ CONFIG_DM_I2C=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x51 -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y @@ -87,7 +88,6 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=3 -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=80000000 CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 367f0d751c..2391aa4914 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -32,6 +32,8 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y @@ -77,7 +79,6 @@ CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x51 -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index a202747020..63aabfbe81 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index d468e20788..e2c6790e03 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -24,11 +24,14 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y @@ -56,6 +59,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 +CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index fc339d56b8..3a179fa5ae 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 @@ -18,7 +19,6 @@ CONFIG_SYS_PROMPT="Tegra20 (Plutux) # " # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set @@ -31,6 +31,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_TEGRA_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index c755aaaae9..e8a5b4df9b 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -31,6 +31,8 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_JFFS2=y +CONFIG_JFFS2_DEV="nand0" +CONFIG_JFFS2_PART_SIZE=0x10000000 CONFIG_MTDIDS_DEFAULT="nor0=physmap-flash.0,nand0=nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),-(rootfs);nand:-(nand)" CONFIG_OF_CONTROL=y @@ -63,3 +65,4 @@ CONFIG_USB=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP32 is not set CONFIG_LCD=y +CONFIG_JFFS2_NAND=y diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index 2d63a8c7a3..7fbbbabf22 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -47,6 +47,7 @@ CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y +CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y CONFIG_DM_ETH=y diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 94885b888e..10f08a515d 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -3,6 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/cloudengines/pogo_e02/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_POGO_E02=y diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 98fb823c92..46988d91a2 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index 894203d75b..d1f928d691 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -2,6 +2,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xf01000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="qemu-ppce500" +CONFIG_SYS_CLK_FREQ=33000000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_QEMU_PPCE500=y diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index 7d06dea721..9e2036a946 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="sh7751-r2dplus" +CONFIG_SYS_CLK_FREQ=60000000 CONFIG_TARGET_R2DPLUS=y CONFIG_SYS_LOAD_ADDR=0x8e000000 CONFIG_BOOTDELAY=-1 diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index d41385b1e8..79ec7009c5 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -69,6 +69,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_RENESAS_RPC_HF=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig index 4a6006ad91..e857da96ca 100644 --- a/configs/r8a779a0_falcon_defconfig +++ b/configs/r8a779a0_falcon_defconfig @@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="r8a779a0-falcon-u-boot" CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_FALCON=y +CONFIG_SYS_CLK_FREQ=16666666 # CONFIG_PSCI_RESET is not set CONFIG_ARMV8_PSCI=y CONFIG_SYS_LOAD_ADDR=0x58000000 diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index adbfbf287f..57a2c01932 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -70,6 +70,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_RENESAS_RPC_HF=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 010d40f685..b18ef389e4 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -71,6 +71,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y +CONFIG_SYS_FLASH_CFI=y CONFIG_RENESAS_RPC_HF=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index c867cff4b2..94492648f5 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -49,6 +49,7 @@ CONFIG_CLK=y # CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_DM_ETH=y diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig index c06094145e..ab29c5b4bd 100644 --- a/configs/rock-pi-n8-rk3288_defconfig +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_ROCKCHIP=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index c9a5ba2bba..b97aa6b02f 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/rock_defconfig b/configs/rock_defconfig index bc97636d10..46df66994b 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -55,6 +55,7 @@ CONFIG_REGULATOR_ACT8846=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_RAM=y CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_ROCKCHIP_SERIAL=y CONFIG_SYSRESET=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index a4d8e3147a..3c0c7b5354 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x44800000 CONFIG_SYS_MALLOC_LEN=0x5001000 @@ -45,6 +46,7 @@ CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y +CONFIG_SOFT_SPI=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Samsung" diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index fe88daf431..48b6a6a774 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -29,8 +29,8 @@ CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y CONFIG_CMD_CLK=y CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 7a5d4d0600..4e46e46175 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -30,8 +30,8 @@ CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y CONFIG_CMD_CLK=y CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y @@ -46,14 +46,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 472890183f..afcd41a965 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -37,8 +37,8 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 811e7f7a7c..149e4802c9 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -38,8 +38,8 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index 7bff5726fc..3fb79bed2a 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -36,8 +36,8 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -52,14 +52,7 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index b379c26d35..d1dee0226e 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -40,8 +40,8 @@ CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index b68d6cde3d..700aef75ec 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -43,8 +43,8 @@ CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -60,14 +60,6 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=2 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=50000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 3c7500ce7b..7761a57e0c 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -40,9 +40,9 @@ CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y -# CONFIG_CMD_IMI is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig index c1c2298d64..88bbbb4d3f 100644 --- a/configs/sama5d2_icp_qspiflash_defconfig +++ b/configs/sama5d2_icp_qspiflash_defconfig @@ -53,14 +53,6 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=2 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=66000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index 77053bce6f..9f458e100b 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -29,8 +29,8 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index 07ed9d178e..6460ff3dad 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -29,8 +29,8 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 0c72f33f2f..844a9cde64 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -36,8 +36,8 @@ CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x22000000 at91-sama5d2_xplained.dtb; fatloa CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 8919f612d3..0de0636587 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -38,8 +38,8 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index 58919ab3eb..a6e002e59e 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -38,8 +38,8 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index ae192c0057..676385fe55 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -42,8 +42,8 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index f915b5b003..f3d3b0a498 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 @@ -17,7 +18,6 @@ CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set @@ -35,6 +35,7 @@ CONFIG_SYS_I2C_TEGRA=y CONFIG_TEGRA_KEYBOARD=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_TEGRA_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 72304135cd..6e39aa178a 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/Marvell/sheevaplug/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_SHEEVAPLUG=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index 1d17f2da71..58c6212c99 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -16,6 +16,8 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000 +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};" CONFIG_DEFAULT_FDT_FILE="sifive/hifive-unleashed-a00.dtb" CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index d400ed0b23..299580894c 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_MMC=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y +CONFIG_SYS_PCI_64BIT=y CONFIG_AHCI=y CONFIG_TARGET_SIFIVE_UNMATCHED=y CONFIG_ARCH_RV64I=y @@ -18,6 +19,8 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000 +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};" CONFIG_DEFAULT_FDT_FILE="sifive/hifive-unmatched-a00.dtb" CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y @@ -33,14 +36,13 @@ CONFIG_CMD_PWM=y CONFIG_CMD_GPT_RENAME=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y CONFIG_SPL_CLK=y -CONFIG_SPI_FLASH_ISSI=y CONFIG_SYS_I2C_EEPROM_ADDR=0x54 +CONFIG_SPI_FLASH_ISSI=y CONFIG_E1000=y CONFIG_NVME=y CONFIG_PCI=y diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index f8350bfffc..26a2060236 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -39,7 +39,6 @@ CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_I2C_S3C24X0=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index a9924a46c3..34aacc663f 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -34,7 +34,6 @@ CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_I2C_S3C24X0=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 474698589f..f2d0845d20 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100" CONFIG_TARGET_SMDKC100=y CONFIG_IDENT_STRING=" for SMDKC100" +CONFIG_SYS_CLK_FREQ=12000000 CONFIG_SYS_LOAD_ADDR=0x30000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 00181124ec..2b98401461 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL_TEXT_BASE=0x02023400 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x12c30000 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_S5P=y CONFIG_IDENT_STRING=" for snow" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y @@ -44,7 +43,6 @@ CONFIG_CMD_TPM_TEST=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_I2C_CROS_EC_LDO=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index cc15644a87..f7bdb906bc 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -29,7 +29,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set -# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set CONFIG_SPL_MTD_SUPPORT=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y @@ -92,6 +93,7 @@ CONFIG_RTC_M41T62=y CONFIG_SPI=y CONFIG_SPI_MEM=y CONFIG_DESIGNWARE_SPI=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_DESIGNWARE_WATCHDOG=y CONFIG_WDT=y # CONFIG_GZIP is not set diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 258aaf2171..e647314ad9 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -76,7 +76,6 @@ CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_MMC_DW=y CONFIG_MTD=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index f2e927107c..ea0224d650 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xfff80000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="socrates" +# CONFIG_SYS_PCI_64BIT is not set CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_SOCRATES=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index 8838b556b9..ef5688f861 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -43,7 +43,6 @@ CONFIG_CMD_TPM_TEST=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_I2C_CROS_EC_LDO=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 9c638abeee..db1947f7a4 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -78,7 +78,6 @@ CONFIG_FASTBOOT_MMC_USER_NAME="mmc1" CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_FASTBOOT_CMD_OEM_PARTCONF=y CONFIG_FASTBOOT_CMD_OEM_BOOTBUS=y -# CONFIG_SCMI_AGENT_MAILBOX is not set CONFIG_GPIO_HOG=y CONFIG_DM_HWSPINLOCK=y CONFIG_HWSPINLOCK_STM32=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 8fbcef2699..c422c47775 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -69,14 +69,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:256k(fsbl1),256k(fsbl2),1408k(uboot),64k( CONFIG_OF_LIST="stm32mp15xx-dhcom-pdk2 stm32mp15xx-dhcom-drc02 stm32mp15xx-dhcom-picoitx" CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=50000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 078d0dee74..38b050f667 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -66,14 +66,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:256k(fsbl1),256k(fsbl2),1408k(uboot),64k( # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=50000000 -CONFIG_USE_ENV_SPI_MODE=y -CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 7401c4f9be..b6a5b6197b 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -79,7 +79,6 @@ CONFIG_FASTBOOT_MMC_USER_NAME="mmc1" CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_FASTBOOT_CMD_OEM_PARTCONF=y CONFIG_FASTBOOT_CMD_OEM_BOOTBUS=y -# CONFIG_SCMI_AGENT_MAILBOX is not set CONFIG_GPIO_HOG=y CONFIG_DM_HWSPINLOCK=y CONFIG_HWSPINLOCK_STM32=y diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig index 39efda6145..53510eaadf 100644 --- a/configs/stmark2_defconfig +++ b/configs/stmark2_defconfig @@ -29,7 +29,6 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:1m(u-boot),7m(kernel),-(rootfs)" CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_CS=y CONFIG_ENV_SPI_CS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig index 4fb0fba441..da57dc288f 100644 --- a/configs/synquacer_developerbox_defconfig +++ b/configs/synquacer_developerbox_defconfig @@ -40,10 +40,6 @@ CONFIG_CMD_LOG=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_BUS=y -CONFIG_ENV_SPI_BUS=0 -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=0 CONFIG_PROT_UDP=y CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 6e4e101a88..4eb113f3a4 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_VENDOR="opalkelly" CONFIG_SYS_CONFIG_NAME="syzygy_hub" CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_DM_GPIO=y diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index df9c2429d5..ea568d4bf7 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/tec_defconfig b/configs/tec_defconfig index 7e2aef2dbf..ec6ecbce6f 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 @@ -17,7 +18,6 @@ CONFIG_SYS_PROMPT="Tegra20 (TEC) # " # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set @@ -32,6 +32,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_TEGRA_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index cfa1bac707..a781f150e4 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -49,7 +49,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 16edca1f29..9631395d38 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1E0000 +CONFIG_SYS_CLK_FREQ=27000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index a9c9a122f6..85dcb9eb88 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_SPL_GPIO=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index f367c9370f..8d8cbd78a1 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_SYS_MALLOC_F_LEN=0x4000 diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index 6ef1281ad9..dfd465cc28 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_VENDOR="topic" CONFIG_SYS_CONFIG_NAME="topic_miami" CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SYS_MEMTEST_START=0x00000000 diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 4db00e8e29..bf336c7b09 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_VENDOR="topic" CONFIG_SYS_CONFIG_NAME="topic_miami" CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SYS_MEMTEST_START=0x00000000 diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index bf36e5194d..c700ea4d84 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_VENDOR="topic" CONFIG_SYS_CONFIG_NAME="topic_miami" CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SYS_MEMTEST_START=0x00000000 diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index 9fb6ba798a..b93c9eb717 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x43e00000 CONFIG_SYS_MALLOC_LEN=0x5001000 diff --git a/configs/trats_defconfig b/configs/trats_defconfig index df1cd00f1f..d55c1d70e6 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x63300000 CONFIG_SYS_MALLOC_LEN=0x5001000 diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index 50b08cb8f8..b28349dc1c 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 @@ -28,7 +29,6 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=48000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 9272a0cb42..6078b46410 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -119,6 +119,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index e6f901ea77..9d121b7982 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -59,8 +59,6 @@ CONFIG_CMD_BTRFS=y CONFIG_CMD_FS_UUID=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=40000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_AHCI_PCI=y @@ -71,7 +69,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_MV=y CONFIG_MTD=y CONFIG_DM_MTD=y -CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index 38875b39c1..cc9bbab8c6 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -141,6 +141,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +CONFIG_83XX_PCICLK=0x3ef1480 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig index 2a6c67d637..5792d78995 100644 --- a/configs/usb_a9263_dataflash_defconfig +++ b/configs/usb_a9263_dataflash_defconfig @@ -34,7 +34,6 @@ CONFIG_CMD_PING=y CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2)" CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index ca23992139..aa47fbca5b 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_SYS_MALLOC_LEN=0x2500000 diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 4472f9655e..1c8857e44c 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 6312d8a0b0..f2da12e92f 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -34,6 +34,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index 1e59d27fc4..2daa1fc267 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_TARGET_VEXPRESS_CA9X4=y CONFIG_SYS_TEXT_BASE=0x60800000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig index 025032b6a3..52d5506495 100644 --- a/configs/vinco_defconfig +++ b/configs/vinco_defconfig @@ -36,8 +36,10 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_AT91_GPIO=y CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_GENERIC_ATMEL_MCI=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=50000000 +CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_ETH_DESIGNWARE=y CONFIG_MACB=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index 84d28c7bfc..6c8c7bb8fd 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_ROCKCHIP=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 97327ca950..8b21dc2493 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -46,6 +46,7 @@ CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_VERSION_VARIABLE=y +CONFIG_LPC32XX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_LPC32XX=y diff --git a/configs/xenguest_arm64_defconfig b/configs/xenguest_arm64_defconfig index 223bb782b7..4997c25a8a 100644 --- a/configs/xenguest_arm64_defconfig +++ b/configs/xenguest_arm64_defconfig @@ -3,9 +3,11 @@ CONFIG_POSITION_INDEPENDENT=y CONFIG_TARGET_XENGUEST_ARM64=y CONFIG_SYS_TEXT_BASE=0x40080000 CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_DEFAULT_DEVICE_TREE="xenguest-arm64" CONFIG_IDENT_STRING=" xenguest" CONFIG_SYS_LOAD_ADDR=0x40000000 +CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_SYS_PROMPT="xenguest# " # CONFIG_CMD_BDI is not set diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index f0ec2639a3..711439b241 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -63,7 +63,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index f343430f5d..b19a7884ef 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SYS_MEMTEST_START=0x00000000 @@ -84,7 +85,6 @@ CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MTD=y diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index d4a8517513..08e90f6101 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0" CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL=y +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 67cf60317d..43e9cebbb0 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1" CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL=y +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index 68e7586d89..a45203e02a 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index 723c61128f..13a479f19d 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 8d7c704756..78c9d29af0 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" CONFIG_SPL=y CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_ZYNQMP_NO_DDR=y +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set # CONFIG_PSCI_RESET is not set # CONFIG_EXPERT is not set diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig index a9c3c4a03e..98f46cf020 100644 --- a/configs/xilinx_zynqmp_r5_defconfig +++ b/configs/xilinx_zynqmp_r5_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5" CONFIG_DEBUG_UART_BASE=0xff010000 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_CPU_FREQ_HZ=500000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_BOOTSTAGE=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 687b41bfb1..86223cd39c 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -18,6 +18,7 @@ CONFIG_ZYNQ_MAC_IN_EEPROM=y CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 CONFIG_CMD_FRU=y CONFIG_ZYNQMP_USB=y +CONFIG_ZYNQMP_PSU_INIT_ENABLED=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x8000000 @@ -124,7 +125,6 @@ CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index daa17d1502..1c8d57b555 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_XTFPGA_KC705=y CONFIG_SYS_LOAD_ADDR=0x02000000 +CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=10 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index cab0e4f081..82f3ae65d6 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -4,6 +4,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_ICACHE_OFF=y CONFIG_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x100000 CONFIG_SYS_MALLOC_LEN=0x8000 diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 5caecaece0..b3d1202749 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -4,6 +4,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_ICACHE_OFF=y CONFIG_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MALLOC_LEN=0x1000 diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index bc5e8aa1b0..831382f2a0 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -4,6 +4,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_ICACHE_OFF=y CONFIG_SYS_DCACHE_OFF=y +CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MALLOC_LEN=0x1000 diff --git a/doc/README.fsl-clk b/doc/README.fsl-clk deleted file mode 100644 index 3a9927f079..0000000000 --- a/doc/README.fsl-clk +++ /dev/null @@ -1,5 +0,0 @@ -Freescale system clock options - - - CONFIG_SYS_FSL_CLK - Enable to call get_clocks() in board_init_f() for - non-PPC platforms. diff --git a/drivers/clk/mpc83xx_clk.h b/drivers/clk/mpc83xx_clk.h index 8a31a4c868..c06a51ecd4 100644 --- a/drivers/clk/mpc83xx_clk.h +++ b/drivers/clk/mpc83xx_clk.h @@ -317,7 +317,7 @@ static inline u32 get_pci_sync_in(immap_t *im) u8 clkin_div; clkin_div = (get_spmr(im) & SPMR_CKID) >> SPMR_CKID_SHIFT; - return CONFIG_SYS_CLK_FREQ / (1 + clkin_div); + return get_board_sys_clk() / (1 + clkin_div); } /** @@ -331,7 +331,7 @@ static inline u32 get_csb_clk(immap_t *im) u8 spmf; spmf = (get_spmr(im) & SPMR_SPMF) >> SPMR_SPMF_SHIFT; - return CONFIG_SYS_CLK_FREQ * spmf; + return get_board_sys_clk() * spmf; } /** diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 40abc33772..b41a755fc7 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -177,6 +177,11 @@ config HSDK_CREG_GPIO help This driver supports CREG GPIOs on Synopsys HSDK SOC. +config KIRKWOOD_GPIO + bool "Kirkwood GPIO driver" + help + This drdiver supports GPIOs on Kirkwood platforms + config LPC32XX_GPIO bool "LPC32XX GPIO driver" depends on DM diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index eafd801cdc..9a3c8241bc 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -40,6 +40,10 @@ DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_M68K +#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR +#endif + #if !CONFIG_IS_ENABLED(DM_I2C) static const struct fsl_i2c_base *i2c_base[4] = { (struct fsl_i2c_base *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C_OFFSET), diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 3bae072005..a8baaeaf5c 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -416,7 +416,7 @@ if I2C_EEPROM config SYS_I2C_EEPROM_ADDR_OVERFLOW hex "EEPROM Address Overflow" - default 0 + default 0x0 help EEPROM chips that implement "address overflow" are ones like Catalyst 24WC04/08/16 which has 9/10/11 bits of @@ -500,4 +500,7 @@ config ESM_PMIC Support ESM (Error Signal Monitor) on PMIC devices. ESM is used typically to reboot the board in error condition. +config FSL_IFC + bool + endmenu diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index df9eae1691..0e826c1929 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -9,10 +9,24 @@ config SYS_NAND_SELF_INIT This option, if enabled, provides more flexible and linux-like NAND initialization process. -config SYS_NAND_DRIVER_ECC_LAYOUT +config SPL_SYS_NAND_SELF_INIT + bool + depends on !SPL_NAND_SIMPLE + help + This option, if enabled, provides more flexible and linux-like + NAND initialization process, in SPL. + +config TPL_SYS_NAND_SELF_INIT bool + depends on TPL_NAND_SUPPORT + help + This option, if enabled, provides more flexible and linux-like + NAND initialization process, in SPL. + +config SYS_NAND_DRIVER_ECC_LAYOUT + bool "Omit standard ECC layouts to save space" help - Omit standard ECC layouts to safe space. Select this if your driver + Omit standard ECC layouts to save space. Select this if your driver is known to provide its own ECC layout. config SYS_NAND_USE_FLASH_BBT @@ -22,6 +36,7 @@ config SYS_NAND_USE_FLASH_BBT config NAND_ATMEL bool "Support Atmel NAND controller" + select SYS_NAND_SELF_INIT imply SYS_NAND_USE_FLASH_BBT help Enable this driver for NAND flash platforms using an Atmel NAND @@ -65,6 +80,7 @@ endif config NAND_BRCMNAND bool "Support Broadcom NAND controller" depends on OF_CONTROL && DM && DM_MTD + select SYS_NAND_SELF_INIT help Enable the driver for NAND flash on platforms using a Broadcom NAND controller. @@ -101,6 +117,7 @@ config NAND_BRCMNAND_63158 config NAND_DAVINCI bool "Support TI Davinci NAND controller" + select SYS_NAND_SELF_INIT if TARGET_DA850EVM help Enable this driver for NAND flash controllers available in TI Davinci and Keystone2 platforms @@ -128,17 +145,25 @@ config NAND_DENALI_DT config NAND_FSL_ELBC bool "Support Freescale Enhanced Local Bus Controller FCM NAND driver" + select TPL_SYS_NAND_SELF_INIT if TPL_NAND_SUPPORT + select SPL_SYS_NAND_SELF_INIT + select SYS_NAND_SELF_INIT depends on FSL_ELBC help Enable the Freescale Enhanced Local Bus Controller FCM NAND driver. config NAND_FSL_IFC bool "Support Freescale Integrated Flash Controller NAND driver" + select TPL_SYS_NAND_SELF_INIT if TPL_NAND_SUPPORT + select SPL_SYS_NAND_SELF_INIT + select SYS_NAND_SELF_INIT + select FSL_IFC help Enable the Freescale Integrated Flash Controller NAND driver. config NAND_LPC32XX_MLC bool "Support LPC32XX_MLC controller" + select SYS_NAND_SELF_INIT help Enable the LPC32XX MLC NAND controller. @@ -330,6 +355,7 @@ config NAND_SUNXI select SYS_NAND_SELF_INIT select SYS_NAND_U_BOOT_LOCATIONS select SPL_NAND_SUPPORT + select SPL_SYS_NAND_SELF_INIT imply CMD_NAND ---help--- Enable support for NAND. This option enables the standard and @@ -374,6 +400,7 @@ config NAND_MXC config NAND_MXS bool "MXS NAND support" depends on MX23 || MX28 || MX6 || MX7 || IMX8 || IMX8M + select SPL_SYS_NAND_SELF_INIT select SYS_NAND_SELF_INIT imply CMD_NAND select APBH_DMA @@ -406,6 +433,7 @@ config NAND_MXIC config NAND_ZYNQ bool "Support for Zynq Nand controller" + select SPL_SYS_NAND_SELF_INIT select SYS_NAND_SELF_INIT select DM_MTD imply CMD_NAND @@ -475,6 +503,14 @@ config ROCKCHIP_NAND NFC v800: RK3308, RV1108 NFC v900: PX30, RK3326 +config TEGRA_NAND + bool "Support for NAND controller on Tegra SoCs" + depends on ARCH_TEGRA + select SYS_NAND_SELF_INIT + imply CMD_NAND + help + Enables support for NAND Flash chips on Tegra SoCs platforms. + comment "Generic NAND options" config SYS_NAND_BLOCK_SIZE diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c index ef7ee395c0..9158d94de2 100644 --- a/drivers/mtd/nand/raw/davinci_nand.c +++ b/drivers/mtd/nand/raw/davinci_nand.c @@ -788,7 +788,7 @@ static void davinci_nand_init(struct nand_chip *nand) nand->dev_ready = nand_davinci_dev_ready; } -#ifdef CONFIG_SYS_NAND_SELF_INIT +#if CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT) static int davinci_nand_probe(struct udevice *dev) { struct nand_chip *nand = dev_get_priv(dev); diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c index 59ad1392b0..4b5560dd24 100644 --- a/drivers/mtd/nand/raw/nand.c +++ b/drivers/mtd/nand/raw/nand.c @@ -76,7 +76,7 @@ int nand_register(int devnum, struct mtd_info *mtd) return 0; } -#ifndef CONFIG_SYS_NAND_SELF_INIT +#if !CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT) static void nand_init_chip(int i) { struct nand_chip *nand = &nand_chip[i]; @@ -155,7 +155,7 @@ void nand_init(void) return; initialized = 1; -#ifdef CONFIG_SYS_NAND_SELF_INIT +#if CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT) board_nand_init(); #else int i; diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index 408a53f861..0969c038e5 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -57,7 +57,7 @@ config SF_DEFAULT_CS config SF_DEFAULT_MODE hex "SPI Flash default mode (see include/spi.h)" depends on SPI_FLASH || DM_SPI_FLASH - default 0 + default 0x0 help The default mode may be provided by the platform to handle the common case when only a single serial diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c index 7d51be1f72..f825612640 100644 --- a/drivers/net/fm/fm.c +++ b/drivers/net/fm/fm.c @@ -387,8 +387,8 @@ int fm_init_common(int index, struct ccsr_fman *reg) struct udevice *new; /* speed and mode will be read from DT */ - ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, - CONFIG_ENV_SPI_CS, 0, 0, &new); + ret = spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS, + CONFIG_SF_DEFAULT_CS, 0, 0, &new); ucode_flash = dev_get_uclass_priv(new); #else @@ -474,7 +474,7 @@ int fm_init_common(int index, struct ccsr_fman *reg) struct udevice *new; /* speed and mode will be read from DT */ - ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, + ret = spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS, CONFIG_SF_DEFAULT_CS, 0, 0, &new); ucode_flash = dev_get_uclass_priv(new); diff --git a/drivers/net/pfe_eth/Kconfig b/drivers/net/pfe_eth/Kconfig index a13b331a50..b2724ee3e8 100644 --- a/drivers/net/pfe_eth/Kconfig +++ b/drivers/net/pfe_eth/Kconfig @@ -9,4 +9,20 @@ config SYS_FSL_PFE_ADDR hex "PFE base address" default 0x04000000 +config SYS_FSL_PFE_SPI_BUS + int "Value of SPI flash bus for PFE firmware" + default SF_DEFAULT_BUS + +config SYS_FSL_PFE_SPI_CS + int "Value of SPI flash chip select for PFE firmware" + default SF_DEFAULT_CS + +config SYS_FSL_PFE_SPI_MAX_HZ + int "Value of SPI flash max frequency for PFE firmware" + default SF_DEFAULT_SPEED + +config SYS_FSL_PFE_SPI_MODE + hex "Value of SPI flash work mode for PFE firmware" + default SF_DEFAULT_MODE + endif diff --git a/drivers/net/pfe_eth/pfe_firmware.c b/drivers/net/pfe_eth/pfe_firmware.c index ad5bc3c862..93e5ea55c7 100644 --- a/drivers/net/pfe_eth/pfe_firmware.c +++ b/drivers/net/pfe_eth/pfe_firmware.c @@ -179,10 +179,10 @@ int pfe_spi_flash_init(void) if (!addr) return -ENOMEM; - ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, - CONFIG_ENV_SPI_CS, - CONFIG_ENV_SPI_MAX_HZ, - CONFIG_ENV_SPI_MODE, + ret = spi_flash_probe_bus_cs(CONFIG_SYS_FSL_PFE_SPI_BUS, + CONFIG_SYS_FSL_PFE_SPI_CS, + CONFIG_SYS_FSL_PFE_SPI_MAX_HZ, + CONFIG_SYS_FSL_PFE_SPI_MODE, &new); if (ret) { printf("SF: failed to probe spi\n"); diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c index 2ac0295245..778d93e609 100644 --- a/drivers/net/phy/cortina.c +++ b/drivers/net/phy/cortina.c @@ -159,8 +159,8 @@ void cs4340_upload_firmware(struct phy_device *phydev) struct spi_flash *ucode_flash; addr = malloc(CONFIG_CORTINA_FW_LENGTH); - ucode_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, - CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); + ucode_flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, CONFIG_SF_DEFAULT_CS, + CONFIG_SF_DEFAULT_SPEED, CONFIG_SF_DEFAULT_MODE); if (!ucode_flash) { puts("SF: probe for Cortina ucode failed\n"); } else { @@ -212,8 +212,8 @@ void cs4340_upload_firmware(struct phy_device *phydev) struct spi_flash *ucode_flash; addr = malloc(CONFIG_CORTINA_FW_LENGTH); - ucode_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, - CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); + ucode_flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, CONFIG_SF_DEFAULT_CS, + CONFIG_SF_DEFAULT_SPEED, CONFIG_SF_DEFAULT_MODE); if (!ucode_flash) { puts("SF: probe for Cortina ucode failed\n"); } else { diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index cc139af6cb..42f8cb6be0 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -19,6 +19,12 @@ config DM_PCI_COMPAT measure when porting a board to use driver model for PCI. Once the board is fully supported, this option should be disabled. +config SYS_PCI_64BIT + bool "Enable 64-bit PCI resources" + default y if PPC + help + Enable 64-bit PCI resource access. + config PCI_AARDVARK bool "Enable Aardvark PCIe driver" depends on DM_GPIO diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index 4a131bf5ca..04f623652f 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -13,7 +13,6 @@ obj-$(CONFIG_PCI) += pci_auto_common.o pci_common.o obj-$(CONFIG_PCIE_ECAM_GENERIC) += pcie_ecam_generic.o obj-$(CONFIG_PCIE_ECAM_SYNQUACER) += pcie_ecam_synquacer.o -obj-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o obj-$(CONFIG_PCI_GT64120) += pci_gt64120.o obj-$(CONFIG_PCI_MPC85XX) += pci_mpc85xx.o obj-$(CONFIG_PCI_MSC01) += pci_msc01.o diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c deleted file mode 100644 index c544af2a0b..0000000000 --- a/drivers/pci/fsl_pci_init.c +++ /dev/null @@ -1,936 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2007-2012 Freescale Semiconductor, Inc. - */ - -#include <common.h> -#include <env.h> -#include <init.h> -#include <log.h> -#include <malloc.h> -#include <asm/fsl_serdes.h> -#include <asm/global_data.h> -#include <linux/delay.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * PCI/PCIE Controller initialization for mpc85xx/mpc86xx soc's - * - * Initialize controller and call the common driver/pci pci_hose_scan to - * scan for bridges and devices. - * - * Hose fields which need to be pre-initialized by board specific code: - * regions[] - * first_busno - * - * Fields updated: - * last_busno - */ - -#include <pci.h> -#include <asm/io.h> -#include <asm/fsl_pci.h> - -#define MAX_PCI_REGIONS 7 - -#ifndef CONFIG_SYS_PCI_MEMORY_BUS -#define CONFIG_SYS_PCI_MEMORY_BUS 0 -#endif - -#ifndef CONFIG_SYS_PCI_MEMORY_PHYS -#define CONFIG_SYS_PCI_MEMORY_PHYS 0 -#endif - -#if defined(CONFIG_SYS_PCI_64BIT) && !defined(CONFIG_SYS_PCI64_MEMORY_BUS) -#define CONFIG_SYS_PCI64_MEMORY_BUS (64ull*1024*1024*1024) -#endif - -/* Setup one inbound ATMU window. - * - * We let the caller decide what the window size should be - */ -static void set_inbound_window(volatile pit_t *pi, - struct pci_region *r, - u64 size) -{ - u32 sz = (__ilog2_u64(size) - 1); -#ifdef CONFIG_SYS_FSL_ERRATUM_A005434 - u32 flag = 0; -#else - u32 flag = PIWAR_LOCAL; -#endif - - flag |= PIWAR_EN | PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP; - - out_be32(&pi->pitar, r->phys_start >> 12); - out_be32(&pi->piwbar, r->bus_start >> 12); -#ifdef CONFIG_SYS_PCI_64BIT - out_be32(&pi->piwbear, r->bus_start >> 44); -#else - out_be32(&pi->piwbear, 0); -#endif - if (r->flags & PCI_REGION_PREFETCH) - flag |= PIWAR_PF; - out_be32(&pi->piwar, flag | sz); -} - -int fsl_setup_hose(struct pci_controller *hose, unsigned long addr) -{ - volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) addr; - - /* Reset hose to make sure its in a clean state */ - memset(hose, 0, sizeof(struct pci_controller)); - - hose->regions = (struct pci_region *) - calloc(1, MAX_PCI_REGIONS * sizeof(struct pci_region)); - - pci_setup_indirect(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); - - return fsl_is_pci_agent(hose); -} - -static int fsl_pci_setup_inbound_windows(struct pci_controller *hose, - u64 out_lo, u8 pcie_cap, - volatile pit_t *pi) -{ - struct pci_region *r = hose->regions + hose->region_count; - u64 sz = min((u64)gd->ram_size, (1ull << 32)); - - phys_addr_t phys_start = CONFIG_SYS_PCI_MEMORY_PHYS; - pci_addr_t bus_start = CONFIG_SYS_PCI_MEMORY_BUS; - pci_size_t pci_sz; - - /* we have no space available for inbound memory mapping */ - if (bus_start > out_lo) { - printf ("no space for inbound mapping of memory\n"); - return 0; - } - - /* limit size */ - if ((bus_start + sz) > out_lo) { - sz = out_lo - bus_start; - debug ("limiting size to %llx\n", sz); - } - - pci_sz = 1ull << __ilog2_u64(sz); - /* - * we can overlap inbound/outbound windows on PCI-E since RX & TX - * links a separate - */ - if ((pcie_cap == PCI_CAP_ID_EXP) && (pci_sz < sz)) { - debug ("R0 bus_start: %llx phys_start: %llx size: %llx\n", - (u64)bus_start, (u64)phys_start, (u64)sz); - pci_set_region(r, bus_start, phys_start, sz, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY | - PCI_REGION_PREFETCH); - - /* if we aren't an exact power of two match, pci_sz is smaller - * round it up to the next power of two. We report the actual - * size to pci region tracking. - */ - if (pci_sz != sz) - sz = 2ull << __ilog2_u64(sz); - - set_inbound_window(pi--, r++, sz); - sz = 0; /* make sure we dont set the R2 window */ - } else { - debug ("R0 bus_start: %llx phys_start: %llx size: %llx\n", - (u64)bus_start, (u64)phys_start, (u64)pci_sz); - pci_set_region(r, bus_start, phys_start, pci_sz, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY | - PCI_REGION_PREFETCH); - set_inbound_window(pi--, r++, pci_sz); - - sz -= pci_sz; - bus_start += pci_sz; - phys_start += pci_sz; - - pci_sz = 1ull << __ilog2_u64(sz); - if (sz) { - debug ("R1 bus_start: %llx phys_start: %llx size: %llx\n", - (u64)bus_start, (u64)phys_start, (u64)pci_sz); - pci_set_region(r, bus_start, phys_start, pci_sz, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY | - PCI_REGION_PREFETCH); - set_inbound_window(pi--, r++, pci_sz); - sz -= pci_sz; - bus_start += pci_sz; - phys_start += pci_sz; - } - } - -#if defined(CONFIG_PHYS_64BIT) && defined(CONFIG_SYS_PCI_64BIT) - /* - * On 64-bit capable systems, set up a mapping for all of DRAM - * in high pci address space. - */ - pci_sz = 1ull << __ilog2_u64(gd->ram_size); - /* round up to the next largest power of two */ - if (gd->ram_size > pci_sz) - pci_sz = 1ull << (__ilog2_u64(gd->ram_size) + 1); - debug ("R64 bus_start: %llx phys_start: %llx size: %llx\n", - (u64)CONFIG_SYS_PCI64_MEMORY_BUS, - (u64)CONFIG_SYS_PCI_MEMORY_PHYS, - (u64)pci_sz); - pci_set_region(r, - CONFIG_SYS_PCI64_MEMORY_BUS, - CONFIG_SYS_PCI_MEMORY_PHYS, - pci_sz, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY | - PCI_REGION_PREFETCH); - set_inbound_window(pi--, r++, pci_sz); -#else - pci_sz = 1ull << __ilog2_u64(sz); - if (sz) { - debug ("R2 bus_start: %llx phys_start: %llx size: %llx\n", - (u64)bus_start, (u64)phys_start, (u64)pci_sz); - pci_set_region(r, bus_start, phys_start, pci_sz, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY | - PCI_REGION_PREFETCH); - sz -= pci_sz; - bus_start += pci_sz; - phys_start += pci_sz; - set_inbound_window(pi--, r++, pci_sz); - } -#endif - -#ifdef CONFIG_PHYS_64BIT - if (sz && (((u64)gd->ram_size) < (1ull << 32))) - printf("Was not able to map all of memory via " - "inbound windows -- %lld remaining\n", sz); -#endif - - hose->region_count = r - hose->regions; - - return 1; -} - -#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER -static void fsl_pcie_boot_master(pit_t *pi) -{ - /* configure inbound window for slave's u-boot image */ - debug("PCIEBOOT - MASTER: Inbound window for slave's image; " - "Local = 0x%llx, Bus = 0x%llx, Size = 0x%x\n", - (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS, - (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1, - CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE); - struct pci_region r_inbound; - u32 sz_inbound = __ilog2_u64(CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE) - - 1; - pci_set_region(&r_inbound, - CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1, - CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS, - sz_inbound, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - - set_inbound_window(pi--, &r_inbound, - CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE); - - /* configure inbound window for slave's u-boot image */ - debug("PCIEBOOT - MASTER: Inbound window for slave's image; " - "Local = 0x%llx, Bus = 0x%llx, Size = 0x%x\n", - (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS, - (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2, - CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE); - pci_set_region(&r_inbound, - CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2, - CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS, - sz_inbound, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - - set_inbound_window(pi--, &r_inbound, - CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE); - - /* configure inbound window for slave's ucode and ENV */ - debug("PCIEBOOT - MASTER: Inbound window for slave's " - "ucode and ENV; " - "Local = 0x%llx, Bus = 0x%llx, Size = 0x%x\n", - (u64)CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS, - (u64)CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS, - CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE); - sz_inbound = __ilog2_u64(CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE) - - 1; - pci_set_region(&r_inbound, - CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS, - CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS, - sz_inbound, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - - set_inbound_window(pi--, &r_inbound, - CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE); -} - -static void fsl_pcie_boot_master_release_slave(int port) -{ - unsigned long release_addr; - - /* now release slave's core 0 */ - switch (port) { - case 1: - release_addr = CONFIG_SYS_PCIE1_MEM_VIRT - + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; - break; -#ifdef CONFIG_SYS_PCIE2_MEM_VIRT - case 2: - release_addr = CONFIG_SYS_PCIE2_MEM_VIRT - + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; - break; -#endif -#ifdef CONFIG_SYS_PCIE3_MEM_VIRT - case 3: - release_addr = CONFIG_SYS_PCIE3_MEM_VIRT - + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; - break; -#endif - default: - release_addr = 0; - break; - } - if (release_addr != 0) { - out_be32((void *)release_addr, - CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK); - debug("PCIEBOOT - MASTER: " - "Release slave successfully! Now the slave should start up!\n"); - } else { - debug("PCIEBOOT - MASTER: " - "Release slave failed!\n"); - } -} -#endif - -void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) -{ - u32 cfg_addr = (u32)&((ccsr_fsl_pci_t *)pci_info->regs)->cfg_addr; - u32 cfg_data = (u32)&((ccsr_fsl_pci_t *)pci_info->regs)->cfg_data; - u16 temp16; - u32 temp32; - u32 block_rev; - int enabled, r, inbound = 0; - u16 ltssm; - u8 temp8, pcie_cap; - int pcie_cap_pos; - int pci_dcr; - int pci_dsr; - int pci_lsr; - -#if defined(CONFIG_FSL_PCIE_DISABLE_ASPM) - int pci_lcr; -#endif - - volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *)cfg_addr; - struct pci_region *reg = hose->regions + hose->region_count; - pci_dev_t dev = PCI_BDF(hose->first_busno, 0, 0); - - /* Initialize ATMU registers based on hose regions and flags */ - volatile pot_t *po = &pci->pot[1]; /* skip 0 */ - volatile pit_t *pi; - - u64 out_hi = 0, out_lo = -1ULL; - u32 pcicsrbar, pcicsrbar_sz; - - pci_setup_indirect(hose, cfg_addr, cfg_data); - -#ifdef PEX_CCB_DIV - /* Configure the PCIE controller core clock ratio */ - pci_hose_write_config_dword(hose, dev, 0x440, - ((gd->bus_clk / 1000000) * - (16 / PEX_CCB_DIV)) / 333); -#endif - block_rev = in_be32(&pci->block_rev1); - if (PEX_IP_BLK_REV_2_2 <= block_rev) { - pi = &pci->pit[2]; /* 0xDC0 */ - } else { - pi = &pci->pit[3]; /* 0xDE0 */ - } - - /* Handle setup of outbound windows first */ - for (r = 0; r < hose->region_count; r++) { - unsigned long flags = hose->regions[r].flags; - u32 sz = (__ilog2_u64((u64)hose->regions[r].size) - 1); - - flags &= PCI_REGION_SYS_MEMORY|PCI_REGION_TYPE; - if (flags != PCI_REGION_SYS_MEMORY) { - u64 start = hose->regions[r].bus_start; - u64 end = start + hose->regions[r].size; - - out_be32(&po->powbar, hose->regions[r].phys_start >> 12); - out_be32(&po->potar, start >> 12); -#ifdef CONFIG_SYS_PCI_64BIT - out_be32(&po->potear, start >> 44); -#else - out_be32(&po->potear, 0); -#endif - if (hose->regions[r].flags & PCI_REGION_IO) { - out_be32(&po->powar, POWAR_EN | sz | - POWAR_IO_READ | POWAR_IO_WRITE); - } else { - out_be32(&po->powar, POWAR_EN | sz | - POWAR_MEM_READ | POWAR_MEM_WRITE); - out_lo = min(start, out_lo); - out_hi = max(end, out_hi); - } - po++; - } - } - debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); - - /* setup PCSRBAR/PEXCSRBAR */ - pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0xffffffff); - pci_hose_read_config_dword (hose, dev, PCI_BASE_ADDRESS_0, &pcicsrbar_sz); - pcicsrbar_sz = ~pcicsrbar_sz + 1; - - if (out_hi < (0x100000000ull - pcicsrbar_sz) || - (out_lo > 0x100000000ull)) - pcicsrbar = 0x100000000ull - pcicsrbar_sz; - else - pcicsrbar = (out_lo - pcicsrbar_sz) & -pcicsrbar_sz; - pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, pcicsrbar); - - out_lo = min(out_lo, (u64)pcicsrbar); - - debug("PCICSRBAR @ 0x%x\n", pcicsrbar); - - pci_set_region(reg++, pcicsrbar, CONFIG_SYS_CCSRBAR_PHYS, - pcicsrbar_sz, PCI_REGION_SYS_MEMORY); - hose->region_count++; - - /* see if we are a PCIe or PCI controller */ - pcie_cap_pos = pci_hose_find_capability(hose, dev, PCI_CAP_ID_EXP); - pci_dcr = pcie_cap_pos + 0x08; - pci_dsr = pcie_cap_pos + 0x0a; - pci_lsr = pcie_cap_pos + 0x12; - - pci_hose_read_config_byte(hose, dev, pcie_cap_pos, &pcie_cap); - -#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER - /* boot from PCIE --master */ - char *s = env_get("bootmaster"); - char pcie[6]; - sprintf(pcie, "PCIE%d", pci_info->pci_num); - - if (s && (strcmp(s, pcie) == 0)) { - debug("PCIEBOOT - MASTER: Master port [ %d ] for pcie boot.\n", - pci_info->pci_num); - fsl_pcie_boot_master((pit_t *)pi); - } else { - /* inbound */ - inbound = fsl_pci_setup_inbound_windows(hose, - out_lo, pcie_cap, pi); - } -#else - /* inbound */ - inbound = fsl_pci_setup_inbound_windows(hose, out_lo, pcie_cap, pi); -#endif - - for (r = 0; r < hose->region_count; r++) - debug("PCI reg:%d %016llx:%016llx %016llx %08lx\n", r, - (u64)hose->regions[r].phys_start, - (u64)hose->regions[r].bus_start, - (u64)hose->regions[r].size, - hose->regions[r].flags); - - pci_register_hose(hose); - pciauto_config_init(hose); /* grab pci_{mem,prefetch,io} */ - hose->current_busno = hose->first_busno; - - out_be32(&pci->pedr, 0xffffffff); /* Clear any errors */ - out_be32(&pci->peer, ~0x20140); /* Enable All Error Interrupts except - * - Master abort (pci) - * - Master PERR (pci) - * - ICCA (PCIe) - */ - pci_hose_read_config_dword(hose, dev, pci_dcr, &temp32); - temp32 |= 0xf000e; /* set URR, FER, NFER (but not CER) */ - pci_hose_write_config_dword(hose, dev, pci_dcr, temp32); - -#if defined(CONFIG_FSL_PCIE_DISABLE_ASPM) - pci_lcr = pcie_cap_pos + 0x10; - temp32 = 0; - pci_hose_read_config_dword(hose, dev, pci_lcr, &temp32); - temp32 &= ~0x03; /* Disable ASPM */ - pci_hose_write_config_dword(hose, dev, pci_lcr, temp32); - udelay(1); -#endif - if (pcie_cap == PCI_CAP_ID_EXP) { - if (block_rev >= PEX_IP_BLK_REV_3_0) { -#define PEX_CSR0_LTSSM_MASK 0xFC -#define PEX_CSR0_LTSSM_SHIFT 2 - ltssm = (in_be32(&pci->pex_csr0) - & PEX_CSR0_LTSSM_MASK) >> PEX_CSR0_LTSSM_SHIFT; - enabled = (ltssm == 0x11) ? 1 : 0; -#ifdef CONFIG_FSL_PCIE_RESET - int i; - /* assert PCIe reset */ - setbits_be32(&pci->pdb_stat, 0x08000000); - (void) in_be32(&pci->pdb_stat); - udelay(1000); - /* clear PCIe reset */ - clrbits_be32(&pci->pdb_stat, 0x08000000); - asm("sync;isync"); - for (i = 0; i < 100 && ltssm < PCI_LTSSM_L0; i++) { - pci_hose_read_config_word(hose, dev, PCI_LTSSM, - <ssm); - udelay(1000); - } -#endif - } else { - /* pci_hose_read_config_word(hose, dev, PCI_LTSSM, <ssm); */ - /* enabled = ltssm >= PCI_LTSSM_L0; */ - pci_hose_read_config_word(hose, dev, PCI_LTSSM, <ssm); - enabled = ltssm >= PCI_LTSSM_L0; - -#ifdef CONFIG_FSL_PCIE_RESET - if (ltssm == 1) { - int i; - debug("....PCIe link error. " "LTSSM=0x%02x.", ltssm); - /* assert PCIe reset */ - setbits_be32(&pci->pdb_stat, 0x08000000); - (void) in_be32(&pci->pdb_stat); - udelay(100); - debug(" Asserting PCIe reset @%p = %x\n", - &pci->pdb_stat, in_be32(&pci->pdb_stat)); - /* clear PCIe reset */ - clrbits_be32(&pci->pdb_stat, 0x08000000); - asm("sync;isync"); - for (i=0; i<100 && ltssm < PCI_LTSSM_L0; i++) { - pci_hose_read_config_word(hose, dev, PCI_LTSSM, - <ssm); - udelay(1000); - debug("....PCIe link error. " - "LTSSM=0x%02x.\n", ltssm); - } - enabled = ltssm >= PCI_LTSSM_L0; - - /* we need to re-write the bar0 since a reset will - * clear it - */ - pci_hose_write_config_dword(hose, dev, - PCI_BASE_ADDRESS_0, pcicsrbar); - } -#endif - } - -#ifdef CONFIG_SYS_P4080_ERRATUM_PCIE_A003 - if (enabled == 0) { - serdes_corenet_t *srds_regs = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR; - temp32 = in_be32(&srds_regs->srdspccr0); - - if ((temp32 >> 28) == 3) { - int i; - - out_be32(&srds_regs->srdspccr0, 2 << 28); - setbits_be32(&pci->pdb_stat, 0x08000000); - in_be32(&pci->pdb_stat); - udelay(100); - clrbits_be32(&pci->pdb_stat, 0x08000000); - asm("sync;isync"); - for (i=0; i < 100 && ltssm < PCI_LTSSM_L0; i++) { - pci_hose_read_config_word(hose, dev, PCI_LTSSM, <ssm); - udelay(1000); - } - enabled = ltssm >= PCI_LTSSM_L0; - } - } -#endif - if (!enabled) { - /* Let the user know there's no PCIe link for root - * complex. for endpoint, the link may not setup, so - * print undetermined. - */ - if (fsl_is_pci_agent(hose)) - printf("undetermined, regs @ 0x%lx\n", pci_info->regs); - else - printf("no link, regs @ 0x%lx\n", pci_info->regs); - hose->last_busno = hose->first_busno; - return; - } - - out_be32(&pci->pme_msg_det, 0xffffffff); - out_be32(&pci->pme_msg_int_en, 0xffffffff); - - /* Print the negotiated PCIe link width */ - pci_hose_read_config_word(hose, dev, pci_lsr, &temp16); - printf("x%d gen%d, regs @ 0x%lx\n", (temp16 & 0x3f0) >> 4, - (temp16 & 0xf), pci_info->regs); - - hose->current_busno++; /* Start scan with secondary */ - pciauto_prescan_setup_bridge(hose, dev, hose->current_busno); - } - -#ifdef CONFIG_SYS_FSL_ERRATUM_A007815 - /* The Read-Only Write Enable bit defaults to 1 instead of 0. - * Set to 0 to protect the read-only registers. - */ - clrbits_be32(&pci->dbi_ro_wr_en, 0x01); -#endif - - /* Use generic setup_device to initialize standard pci regs, - * but do not allocate any windows since any BAR found (such - * as PCSRBAR) is not in this cpu's memory space. - */ - pciauto_setup_device(hose, dev, 0, hose->pci_mem, - hose->pci_prefetch, hose->pci_io); - - if (inbound) { - pci_hose_read_config_word(hose, dev, PCI_COMMAND, &temp16); - pci_hose_write_config_word(hose, dev, PCI_COMMAND, - temp16 | PCI_COMMAND_MEMORY); - } - -#ifndef CONFIG_PCI_NOSCAN - if (!fsl_is_pci_agent(hose)) { - debug(" Scanning PCI bus %02x\n", - hose->current_busno); - hose->last_busno = pci_hose_scan_bus(hose, hose->current_busno); - } else { - debug(" Not scanning PCI bus %02x. PI=%x\n", - hose->current_busno, temp8); - hose->last_busno = hose->current_busno; - } - - /* if we are PCIe - update limit regs and subordinate busno - * for the virtual P2P bridge - */ - if (pcie_cap == PCI_CAP_ID_EXP) { - pciauto_postscan_setup_bridge(hose, dev, hose->last_busno); - } -#else - hose->last_busno = hose->current_busno; -#endif - - /* Clear all error indications */ - if (pcie_cap == PCI_CAP_ID_EXP) - out_be32(&pci->pme_msg_det, 0xffffffff); - out_be32(&pci->pedr, 0xffffffff); - - pci_hose_read_config_word(hose, dev, pci_dsr, &temp16); - if (temp16) { - pci_hose_write_config_word(hose, dev, pci_dsr, 0xffff); - } - - pci_hose_read_config_word (hose, dev, PCI_SEC_STATUS, &temp16); - if (temp16) { - pci_hose_write_config_word(hose, dev, PCI_SEC_STATUS, 0xffff); - } -} - -int fsl_is_pci_agent(struct pci_controller *hose) -{ - int pcie_cap_pos; - u8 pcie_cap; - pci_dev_t dev = PCI_BDF(hose->first_busno, 0, 0); - - pcie_cap_pos = pci_hose_find_capability(hose, dev, PCI_CAP_ID_EXP); - pci_hose_read_config_byte(hose, dev, pcie_cap_pos, &pcie_cap); - if (pcie_cap == PCI_CAP_ID_EXP) { - u8 header_type; - - pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, - &header_type); - return (header_type & 0x7f) == PCI_HEADER_TYPE_NORMAL; - } else { - u8 prog_if; - - pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &prog_if); - /* Programming Interface (PCI_CLASS_PROG) - * 0 == pci host or pcie root-complex, - * 1 == pci agent or pcie end-point - */ - return (prog_if == FSL_PROG_IF_AGENT); - } -} - -int fsl_pci_init_port(struct fsl_pci_info *pci_info, - struct pci_controller *hose, int busno) -{ - volatile ccsr_fsl_pci_t *pci; - struct pci_region *r; - pci_dev_t dev = PCI_BDF(busno,0,0); - int pcie_cap_pos; - u8 pcie_cap; - - pci = (ccsr_fsl_pci_t *) pci_info->regs; - - /* on non-PCIe controllers we don't have pme_msg_det so this code - * should do nothing since the read will return 0 - */ - if (in_be32(&pci->pme_msg_det)) { - out_be32(&pci->pme_msg_det, 0xffffffff); - debug (" with errors. Clearing. Now 0x%08x", - pci->pme_msg_det); - } - - r = hose->regions + hose->region_count; - - /* outbound memory */ - pci_set_region(r++, - pci_info->mem_bus, - pci_info->mem_phys, - pci_info->mem_size, - PCI_REGION_MEM); - - /* outbound io */ - pci_set_region(r++, - pci_info->io_bus, - pci_info->io_phys, - pci_info->io_size, - PCI_REGION_IO); - - hose->region_count = r - hose->regions; - hose->first_busno = busno; - - fsl_pci_init(hose, pci_info); - - if (fsl_is_pci_agent(hose)) { - fsl_pci_config_unlock(hose); - hose->last_busno = hose->first_busno; -#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER - } else { - /* boot from PCIE --master releases slave's core 0 */ - char *s = env_get("bootmaster"); - char pcie[6]; - sprintf(pcie, "PCIE%d", pci_info->pci_num); - - if (s && (strcmp(s, pcie) == 0)) - fsl_pcie_boot_master_release_slave(pci_info->pci_num); -#endif - } - - pcie_cap_pos = pci_hose_find_capability(hose, dev, PCI_CAP_ID_EXP); - pci_hose_read_config_byte(hose, dev, pcie_cap_pos, &pcie_cap); - printf("PCI%s%x: Bus %02x - %02x\n", pcie_cap == PCI_CAP_ID_EXP ? - "e" : "", pci_info->pci_num, - hose->first_busno, hose->last_busno); - return(hose->last_busno + 1); -} - -/* Enable inbound PCI config cycles for agent/endpoint interface */ -void fsl_pci_config_unlock(struct pci_controller *hose) -{ - pci_dev_t dev = PCI_BDF(hose->first_busno,0,0); - int pcie_cap_pos; - u8 pcie_cap; - u16 pbfr; - - if (!fsl_is_pci_agent(hose)) - return; - - pcie_cap_pos = pci_hose_find_capability(hose, dev, PCI_CAP_ID_EXP); - pci_hose_read_config_byte(hose, dev, pcie_cap_pos, &pcie_cap); - if (pcie_cap != 0x0) { - ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *)hose->cfg_addr; - u32 block_rev = in_be32(&pci->block_rev1); - /* PCIe - set CFG_READY bit of Configuration Ready Register */ - if (block_rev >= PEX_IP_BLK_REV_3_0) - setbits_be32(&pci->config, FSL_PCIE_V3_CFG_RDY); - else - pci_hose_write_config_byte(hose, dev, - FSL_PCIE_CFG_RDY, 0x1); - } else { - /* PCI - clear ACL bit of PBFR */ - pci_hose_read_config_word(hose, dev, FSL_PCI_PBFR, &pbfr); - pbfr &= ~0x20; - pci_hose_write_config_word(hose, dev, FSL_PCI_PBFR, pbfr); - } -} - -#if defined(CONFIG_PCIE1) || defined(CONFIG_PCIE2) || \ - defined(CONFIG_PCIE3) || defined(CONFIG_PCIE4) -int fsl_configure_pcie(struct fsl_pci_info *info, - struct pci_controller *hose, - const char *connected, int busno) -{ - int is_endpoint; - - set_next_law(info->mem_phys, law_size_bits(info->mem_size), info->law); - set_next_law(info->io_phys, law_size_bits(info->io_size), info->law); - - is_endpoint = fsl_setup_hose(hose, info->regs); - printf("PCIe%u: %s", info->pci_num, - is_endpoint ? "Endpoint" : "Root Complex"); - if (connected) - printf(" of %s", connected); - puts(", "); - - return fsl_pci_init_port(info, hose, busno); -} - -#if defined(CONFIG_FSL_CORENET) -#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2 - #define _DEVDISR_PCIE1 FSL_CORENET_DEVDISR3_PCIE1 - #define _DEVDISR_PCIE2 FSL_CORENET_DEVDISR3_PCIE2 - #define _DEVDISR_PCIE3 FSL_CORENET_DEVDISR3_PCIE3 - #define _DEVDISR_PCIE4 FSL_CORENET_DEVDISR3_PCIE4 -#else - #define _DEVDISR_PCIE1 FSL_CORENET_DEVDISR_PCIE1 - #define _DEVDISR_PCIE2 FSL_CORENET_DEVDISR_PCIE2 - #define _DEVDISR_PCIE3 FSL_CORENET_DEVDISR_PCIE3 - #define _DEVDISR_PCIE4 FSL_CORENET_DEVDISR_PCIE4 -#endif - #define CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR -#elif defined(CONFIG_MPC85xx) - #define _DEVDISR_PCIE1 MPC85xx_DEVDISR_PCIE - #define _DEVDISR_PCIE2 MPC85xx_DEVDISR_PCIE2 - #define _DEVDISR_PCIE3 MPC85xx_DEVDISR_PCIE3 - #define _DEVDISR_PCIE4 0 - #define CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR -#elif defined(CONFIG_MPC86xx) - #define _DEVDISR_PCIE1 MPC86xx_DEVDISR_PCIE1 - #define _DEVDISR_PCIE2 MPC86xx_DEVDISR_PCIE2 - #define _DEVDISR_PCIE3 0 - #define _DEVDISR_PCIE4 0 - #define CONFIG_SYS_MPC8xxx_GUTS_ADDR \ - (&((immap_t *)CONFIG_SYS_IMMR)->im_gur) -#else -#error "No defines for DEVDISR_PCIE" -#endif - -/* Implement a dummy function for those platforms w/o SERDES */ -static const char *__board_serdes_name(enum srds_prtcl device) -{ - switch (device) { -#ifdef CONFIG_SYS_PCIE1_NAME - case PCIE1: - return CONFIG_SYS_PCIE1_NAME; -#endif -#ifdef CONFIG_SYS_PCIE2_NAME - case PCIE2: - return CONFIG_SYS_PCIE2_NAME; -#endif -#ifdef CONFIG_SYS_PCIE3_NAME - case PCIE3: - return CONFIG_SYS_PCIE3_NAME; -#endif -#ifdef CONFIG_SYS_PCIE4_NAME - case PCIE4: - return CONFIG_SYS_PCIE4_NAME; -#endif - default: - return NULL; - } - - return NULL; -} - -__attribute__((weak, alias("__board_serdes_name"))) const char * -board_serdes_name(enum srds_prtcl device); - -static u32 devdisr_mask[] = { - _DEVDISR_PCIE1, - _DEVDISR_PCIE2, - _DEVDISR_PCIE3, - _DEVDISR_PCIE4, -}; - -int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev, - struct fsl_pci_info *pci_info) -{ - struct pci_controller *hose; - int num = dev - PCIE1; - - hose = calloc(1, sizeof(struct pci_controller)); - if (!hose) - return busno; - - if (is_serdes_configured(dev) && !(devdisr & devdisr_mask[num])) { - busno = fsl_configure_pcie(pci_info, hose, - board_serdes_name(dev), busno); - } else { - printf("PCIe%d: disabled\n", num + 1); - } - - return busno; -} - -int fsl_pcie_init_board(int busno) -{ - struct fsl_pci_info pci_info; - ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC8xxx_GUTS_ADDR; - u32 devdisr; - u32 *addr; - -#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2 - addr = &gur->devdisr3; -#else - addr = &gur->devdisr; -#endif - devdisr = in_be32(addr); - -#ifdef CONFIG_PCIE1 - SET_STD_PCIE_INFO(pci_info, 1); - busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE1, &pci_info); -#else - setbits_be32(addr, _DEVDISR_PCIE1); /* disable */ -#endif - -#ifdef CONFIG_PCIE2 - SET_STD_PCIE_INFO(pci_info, 2); - busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE2, &pci_info); -#else - setbits_be32(addr, _DEVDISR_PCIE2); /* disable */ -#endif - -#ifdef CONFIG_PCIE3 - SET_STD_PCIE_INFO(pci_info, 3); - busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE3, &pci_info); -#else - setbits_be32(addr, _DEVDISR_PCIE3); /* disable */ -#endif - -#ifdef CONFIG_PCIE4 - SET_STD_PCIE_INFO(pci_info, 4); - busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE4, &pci_info); -#else - setbits_be32(addr, _DEVDISR_PCIE4); /* disable */ -#endif - - return busno; -} -#else -int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev, - struct fsl_pci_info *pci_info) -{ - return busno; -} - -int fsl_pcie_init_board(int busno) -{ - return busno; -} -#endif - -#ifdef CONFIG_OF_BOARD_SETUP -#include <linux/libfdt.h> -#include <fdt_support.h> - -void ft_fsl_pci_setup(void *blob, const char *pci_compat, - unsigned long ctrl_addr) -{ - int off; - u32 bus_range[2]; - phys_addr_t p_ctrl_addr = (phys_addr_t)ctrl_addr; - struct pci_controller *hose; - - hose = find_hose_by_cfg_addr((void *)(ctrl_addr)); - - /* convert ctrl_addr to true physical address */ - p_ctrl_addr = (phys_addr_t)ctrl_addr - CONFIG_SYS_CCSRBAR; - p_ctrl_addr += CONFIG_SYS_CCSRBAR_PHYS; - - off = fdt_node_offset_by_compat_reg(blob, pci_compat, p_ctrl_addr); - - if (off < 0) - return; - - /* We assume a cfg_addr not being set means we didn't setup the controller */ - if ((hose == NULL) || (hose->cfg_addr == NULL)) { - fdt_del_node(blob, off); - } else { - bus_range[0] = 0; - bus_range[1] = hose->last_busno - hose->first_busno; - fdt_setprop(blob, off, "bus-range", &bus_range[0], 2*4); - fdt_pci_dma_ranges(blob, off, hose); - } -} -#endif diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c index dfcb6fd698..a402a123b6 100644 --- a/drivers/serial/arm_dcc.c +++ b/drivers/serial/arm_dcc.c @@ -51,7 +51,7 @@ #define status_dcc(x) \ __asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x)) -#elif defined(CONFIG_CPU_ARMV8) +#elif defined(CONFIG_ARM64) /* * ARMV8 */ diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index 3c9a69598a..ca49ef7372 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <clk.h> #include <dm.h> #include <fsl_lpuart.h> @@ -102,13 +103,9 @@ static void lpuart_write32(u32 flags, u32 *addr, u32 val) } -#ifndef CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_CLK_FREQ 0 -#endif - u32 __weak get_lpuart_clk(void) { - return CONFIG_SYS_CLK_FREQ; + return get_board_sys_clk(); } #if CONFIG_IS_ENABLED(CLK) diff --git a/drivers/timer/ostm_timer.c b/drivers/timer/ostm_timer.c index 24813de265..3ec729d2c4 100644 --- a/drivers/timer/ostm_timer.c +++ b/drivers/timer/ostm_timer.c @@ -6,6 +6,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <malloc.h> #include <asm/global_data.h> #include <asm/io.h> @@ -51,7 +52,7 @@ static int ostm_probe(struct udevice *dev) clk_free(&clk); #else - uc_priv->clock_rate = CONFIG_SYS_CLK_FREQ / 2; + uc_priv->clock_rate = get_board_sys_clk() / 2; #endif readb(priv->regs + OSTM_CTL); diff --git a/env/Kconfig b/env/Kconfig index 24966f8c37..6dc8d8d860 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -357,54 +357,31 @@ config ENV_SECT_SIZE_AUTO different sector sizes, and CONFIG_ENV_SECT_SIZE should be set to that value. -config USE_ENV_SPI_BUS - bool "SPI flash bus for environment" - depends on ENV_IS_IN_SPI_FLASH - help - Force the SPI bus for environment. - If not defined, use CONFIG_SF_DEFAULT_BUS. - config ENV_SPI_BUS int "Value of SPI flash bus for environment" - depends on USE_ENV_SPI_BUS - help - Value the SPI bus and chip select for environment. - -config USE_ENV_SPI_CS - bool "SPI flash chip select for environment" depends on ENV_IS_IN_SPI_FLASH + default SF_DEFAULT_BUS help - Force the SPI chip select for environment. - If not defined, use CONFIG_SF_DEFAULT_CS. + Value the SPI bus and chip select for environment. config ENV_SPI_CS int "Value of SPI flash chip select for environment" - depends on USE_ENV_SPI_CS - help - Value of the SPI chip select for environment. - -config USE_ENV_SPI_MAX_HZ - bool "SPI flash max frequency for environment" depends on ENV_IS_IN_SPI_FLASH + default SF_DEFAULT_CS help - Force the SPI max work clock for environment. - If not defined, use CONFIG_SF_DEFAULT_SPEED. + Value of the SPI chip select for environment. config ENV_SPI_MAX_HZ int "Value of SPI flash max frequency for environment" - depends on USE_ENV_SPI_MAX_HZ - help - Value of the SPI max work clock for environment. - -config USE_ENV_SPI_MODE - bool "SPI flash mode for environment" depends on ENV_IS_IN_SPI_FLASH + default SF_DEFAULT_SPEED help - Force the SPI work mode for environment. + Value of the SPI max work clock for environment. config ENV_SPI_MODE hex "Value of SPI flash work mode for environment" - depends on USE_ENV_SPI_MODE + depends on ENV_IS_IN_SPI_FLASH + default SF_DEFAULT_MODE help Value of the SPI work mode for environment. See include/spi.h for value. diff --git a/fs/jffs2/Kconfig b/fs/jffs2/Kconfig index 1b9ecdd8cc..0e79c34090 100644 --- a/fs/jffs2/Kconfig +++ b/fs/jffs2/Kconfig @@ -5,3 +5,15 @@ config FS_JFFS2 Flash File System version 2). JFFS2 is a log-structured file system for use with flash memory devices. It supports raw NAND devices, hard links and compression. + +config JFFS2_LZO + bool "Enable LZO compression in JFFS2" + depends on FS_JFFS2 + help + Enable LZO compression in the JFFS2 filesystem + +config JFFS2_NAND + bool "Enable JFFS2 support for NAND flash" + depends on FS_JFFS2 + help + Enable support for NAND flash as the backing store for JFFS2. diff --git a/include/clock_legacy.h b/include/clock_legacy.h index 29261b680d..efa483117d 100644 --- a/include/clock_legacy.h +++ b/include/clock_legacy.h @@ -22,4 +22,15 @@ unsigned long get_board_ddr_clk(void); #define get_board_ddr_clk() CONFIG_DDR_CLK_FREQ #endif +/* + * If we have CONFIG_DYNAMIC_SYS_CLK_FREQ then there will be an + * implentation of get_board_sys_clk() somewhere. Otherwise we have + * a static value to use now. + */ +#ifdef CONFIG_DYNAMIC_SYS_CLK_FREQ +unsigned long get_board_sys_clk(void); +#else +#define get_board_sys_clk() CONFIG_SYS_CLK_FREQ +#endif + #endif diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 6a69ac45ae..5ed624c7b7 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -15,7 +15,6 @@ */ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 5000 #ifdef CONFIG_MCFFEC @@ -39,7 +38,6 @@ #define CONFIG_MCFTMR /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_UDP_CHECKSUM diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 7421f3b760..90f1664a5a 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ /* @@ -48,7 +47,6 @@ #define CONFIG_MCFTMR /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi) #define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK) #define CONFIG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA) diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 7ee0ec6a4a..00892ec44d 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -21,8 +21,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG - #undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */ /* diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index e9a7922921..c5d8aa3eda 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -12,8 +12,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG /* disable watchdog */ - /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash @@ -69,7 +67,6 @@ #define CONFIG_HOSTNAME "M5253DEMO" /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_SYS_I2C_PINMUX_REG (*(u32 *) (CONFIG_SYS_MBAR+0x19C)) #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF) #define CONFIG_SYS_I2C_PINMUX_SET (0) diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 2121b294fb..e814a2924c 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 7ca916485b..b18f0319b0 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -58,7 +58,6 @@ #endif /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c) #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0) #define CONFIG_SYS_I2C_PINMUX_SET (0x000F) diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 7b33677c55..5db189ae2d 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 5000 #define CONFIG_SYS_UNIFY_CACHE @@ -54,7 +53,6 @@ #define CONFIG_MCFTMR /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_UDP_CHECKSUM diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 19d8cfe321..f96f54ef65 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ #define CONFIG_SYS_UNIFY_CACHE @@ -48,7 +47,6 @@ #define CONFIG_MCFTMR /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_UDP_CHECKSUM @@ -137,10 +135,6 @@ # define CONFIG_SYS_NAND_SIZE 1 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } # define NAND_ALLOW_ERASE_ALL 1 -# define CONFIG_JFFS2_NAND 1 -# define CONFIG_JFFS2_DEV "nand0" -# define CONFIG_JFFS2_PART_SIZE (CONFIG_SYS_CS2_MASK & ~1) -# define CONFIG_JFFS2_PART_OFFSET 0x00000000 #endif #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index e2ddc4893e..b7906013e0 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_UART_PORT (0) -#undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */ #define CONFIG_SYS_UNIFY_CACHE @@ -50,7 +49,6 @@ #define CONFIG_MCFTMR /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR #define CONFIG_UDP_CHECKSUM @@ -139,10 +137,6 @@ # define CONFIG_SYS_NAND_SIZE 1 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } # define NAND_ALLOW_ERASE_ALL 1 -# define CONFIG_JFFS2_NAND 1 -# define CONFIG_JFFS2_DEV "nand0" -# define CONFIG_JFFS2_PART_SIZE (CONFIG_SYS_CS2_MASK & ~1) -# define CONFIG_JFFS2_PART_OFFSET 0x00000000 #endif #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 1cf3670533..9a34e5444b 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -302,8 +302,6 @@ */ #define CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_WATCHDOG /* watchdog disabled */ - #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC_PIN_MUX #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR @@ -326,7 +324,6 @@ */ #define CONFIG_HAS_FSL_DR_USB -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_NETDEV "eth1" diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index ab029aab64..84e05eafa6 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -26,8 +26,6 @@ #define CONFIG_HAS_FEC 1 /* 8540 has FEC */ #endif -#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ - /* * sysclk for MPC85xx * @@ -46,10 +44,6 @@ * Note that PCI-X won't work at 33MHz. */ -#ifndef CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_CLK_FREQ 33000000 -#endif - /* * These can be toggled for performance analysis, otherwise use default. */ @@ -266,8 +260,6 @@ */ #define CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_WATCHDOG /* watchdog disabled */ - /* * Miscellaneous configurable options */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 349b4860ef..f583aa8b36 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -19,15 +19,12 @@ #define CONFIG_PCI1 /* PCI controller 1 */ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #undef CONFIG_PCI2 -#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ #ifndef __ASSEMBLY__ #include <linux/stringify.h> -extern unsigned long get_clock_freq(void); #endif -#define CONFIG_SYS_CLK_FREQ get_clock_freq() /* sysclk for MPC85xx */ /* * These can be toggled for performance analysis, otherwise use default. @@ -384,8 +381,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_WATCHDOG /* watchdog disabled */ - /* * Miscellaneous configurable options */ diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 2167dcd444..b8a72d01dd 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -27,7 +27,6 @@ * assume U-Boot is less than 0.5MB */ -#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ /* @@ -44,10 +43,6 @@ * in the README.mpc85xxads. */ -#ifndef CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_CLK_FREQ 33000000 -#endif - /* * These can be toggled for performance analysis, otherwise use default. */ @@ -253,8 +248,6 @@ */ #define CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_WATCHDOG /* watchdog disabled */ - /* * Miscellaneous configurable options */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index d36a8e2dc8..6a9c86c9c4 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -63,19 +63,16 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000) #define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE) #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0 #else #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_NAND_INIT #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SPL_MAX_SIZE (128 << 10) -#define CONFIG_TPL_TEXT_BASE 0xD0001000 #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) -#define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10) #elif defined(CONFIG_SPL_BUILD) #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_NAND_MINIMAL @@ -84,7 +81,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xD0000000 #define CONFIG_SYS_NAND_U_BOOT_START 0xD0000000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (128 << 10) #endif #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_TPL_PAD_TO 0x20000 @@ -102,7 +98,7 @@ #endif #ifdef CONFIG_TPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_TPL_TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE 0xD0001000 #elif defined(CONFIG_SPL_BUILD) #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE #else @@ -110,12 +106,10 @@ #endif /* High Level Configuration Options */ -#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ #if defined(CONFIG_PCI) #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* * PCI Windows @@ -152,8 +146,6 @@ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif -#define CONFIG_SYS_CLK_FREQ 66666666 /* SYSCLK for P1010 RDB */ - #define CONFIG_HWCONFIG /* * These can be toggled for performance analysis, otherwise use default. @@ -573,7 +565,6 @@ extern unsigned long get_sdram_size(void); #if defined(CONFIG_HAS_FSL_DR_USB) #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#define CONFIG_USB_EHCI_FSL #endif #endif @@ -597,8 +588,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_LOADS_ECHO /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ -#undef CONFIG_WATCHDOG /* watchdog disabled */ - #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI_HCD) \ || defined(CONFIG_FSL_SATA) #endif diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index ef4bb0b7b0..8ada25dcc7 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -36,7 +36,6 @@ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ @@ -50,10 +49,8 @@ #endif #ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(unsigned long dummy); #include <linux/stringify.h> #endif -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) /* * These can be toggled for performance analysis, otherwise use default. @@ -395,7 +392,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_HAS_FSL_MPH_USB #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index bf9f26ea99..dbaffc635d 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -6,25 +6,16 @@ #ifndef _CONFIG_SBX81LIFKW_H #define _CONFIG_SBX81LIFKW_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ -#define CONFIG_KW88F6281 1 /* SOC Name */ -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg - /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ #define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ -#define CONFIG_KIRKWOOD_GPIO 1 /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK @@ -61,7 +52,6 @@ * Ethernet Driver configuration */ #ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */ #define CONFIG_PHY_BASE_ADR 0x01 #endif /* CONFIG_CMD_NET */ diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index 71394aea22..bbd3ccc6d9 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -6,25 +6,16 @@ #ifndef _CONFIG_SBX81LIFXCAT_H #define _CONFIG_SBX81LIFXCAT_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ -#define CONFIG_KW88F6281 1 /* SOC Name */ -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg - /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ #define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ -#define CONFIG_KIRKWOOD_GPIO 1 /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK @@ -66,7 +57,6 @@ * Ethernet Driver configuration */ #ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */ #define CONFIG_PHY_BASE_ADR 0x01 #endif /* CONFIG_CMD_NET */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index faeba06cd2..9b7784a0f3 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -41,7 +41,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000 #define CONFIG_SYS_NAND_U_BOOT_START 0x30000000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #endif #ifdef CONFIG_SPIFLASH @@ -116,12 +115,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #endif -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ 100000000 - /* * These can be toggled for performance analysis, otherwise use default. */ @@ -416,7 +409,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #ifdef CONFIG_PCI /* controller 1, direct to uli, tgtid 3, Base address 20000 */ @@ -452,7 +444,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_HAS_FSL_DR_USB #ifdef CONFIG_HAS_FSL_DR_USB -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index e70209231d..7f3b1909dc 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -40,7 +40,6 @@ #endif #define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000 #define CONFIG_SYS_NAND_U_BOOT_START 0x30000000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #endif #ifdef CONFIG_SPIFLASH @@ -85,8 +84,6 @@ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_PCIE4 /* PCIE controller 4 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ - #if defined(CONFIG_SPIFLASH) #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_NXP_ESBC @@ -95,8 +92,6 @@ #endif #endif -#define CONFIG_SYS_CLK_FREQ 100000000 - /* * These can be toggled for performance analysis, otherwise use default. */ @@ -460,7 +455,6 @@ #ifdef CONFIG_HAS_FSL_DR_USB #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif #endif @@ -499,8 +493,6 @@ #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME -#define CONFIG_U_QE - #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif /* CONFIG_NOBQFMAN */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 7344f9392b..aaea314e45 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -44,7 +44,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #endif #ifdef CONFIG_SPIFLASH @@ -94,12 +93,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() - /* * Config the L3 Cache as L3 SRAM */ @@ -360,12 +353,6 @@ unsigned long get_board_sys_clk(void); #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 -#define CONFIG_VID_FLS_ENV "t208xqds_vdd_mv" -#ifndef CONFIG_SPL_BUILD -#define CONFIG_VID -#endif -#define CONFIG_VOL_MONITOR_IR36021_SET -#define CONFIG_VOL_MONITOR_IR36021_READ /* The lowest and highest voltage allowed for T208xQDS */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 @@ -420,7 +407,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_PCIE4 /* PCIE controller 4 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull @@ -517,7 +503,6 @@ unsigned long get_board_sys_clk(void); * USB */ #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_HAS_FSL_DR_USB #endif diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 979a997c73..467f6344fa 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -39,7 +39,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #endif #ifdef CONFIG_SPIFLASH @@ -89,12 +88,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ 66660000 - /* * Config the L3 Cache as L3 SRAM */ @@ -312,12 +305,6 @@ unsigned long get_board_sys_clk(void); #define I2C_MUX_CH_VOL_MONITOR 0xa -#define CONFIG_VID_FLS_ENV "t208xrdb_vdd_mv" -#ifndef CONFIG_SPL_BUILD -#define CONFIG_VID -#endif -#define CONFIG_VOL_MONITOR_IR36021_SET -#define CONFIG_VOL_MONITOR_IR36021_READ /* The lowest and highest voltage allowed for T208xRDB */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 @@ -372,7 +359,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_PCIE4 /* PCIE controller 4 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull @@ -472,7 +458,6 @@ unsigned long get_board_sys_clk(void); * USB */ #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_HAS_FSL_DR_USB #endif diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 12a11e260b..2d632493c1 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -60,7 +60,6 @@ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* * These can be toggled for performance analysis, otherwise use default. @@ -225,12 +224,6 @@ "setenv bootargs config-addr=0x60000000; " \ "bootm 0x01000000 - 0x00f00000" -#define CONFIG_SYS_CLK_FREQ 66666666 - -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - /* * DDR Setup */ @@ -408,12 +401,6 @@ unsigned long get_board_sys_clk(void); #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 -#define CONFIG_VID_FLS_ENV "t4240rdb_vdd_mv" -#ifndef CONFIG_SPL_BUILD -#define CONFIG_VID -#endif -#define CONFIG_VOL_MONITOR_IR36021_SET -#define CONFIG_VOL_MONITOR_IR36021_READ /* The lowest and highest voltage allowed for T4240RDB */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 @@ -498,7 +485,6 @@ unsigned long get_board_sys_clk(void); /* * USB */ -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_HAS_FSL_DR_USB diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h index 973033d6b4..58e8526048 100644 --- a/include/configs/adp-ae3xx.h +++ b/include/configs/adp-ae3xx.h @@ -17,8 +17,6 @@ #define CONFIG_SKIP_TRUNOFF_WATCHDOG -#define CONFIG_ARCH_MAP_SYSMEM - #define CONFIG_BOOTP_SERVERIP #ifdef CONFIG_SKIP_LOWLEVEL_INIT @@ -30,8 +28,7 @@ /* * Timer */ -#define CONFIG_SYS_CLK_FREQ 39062500 -#define VERSION_CLOCK CONFIG_SYS_CLK_FREQ +#define VERSION_CLOCK get_board_sys_clk() /* * Use Externel CLOCK or PCLK diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index f533ada73f..1022764985 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -15,8 +15,6 @@ */ #define CONFIG_USE_INTERRUPT -#define CONFIG_ARCH_MAP_SYSMEM - #define CONFIG_BOOTP_SERVERIP #ifndef CONFIG_SKIP_LOWLEVEL_INIT @@ -32,8 +30,7 @@ /* * Timer */ -#define CONFIG_SYS_CLK_FREQ 39062500 -#define VERSION_CLOCK CONFIG_SYS_CLK_FREQ +#define VERSION_CLOCK get_board_sys_clk() /* * Use Externel CLOCK or PCLK diff --git a/include/configs/alt.h b/include/configs/alt.h index 8456a6b2c3..37b5800d6e 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -34,8 +34,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" \ diff --git a/include/configs/ap152.h b/include/configs/ap152.h index c3ed137475..5bfca42156 100644 --- a/include/configs/ap152.h +++ b/include/configs/ap152.h @@ -25,8 +25,6 @@ */ #define CONFIG_SYS_NS16550_CLK 25000000 -#define CONFIG_ENV_SPI_MAX_HZ 25000000 - /* Miscellaneous configurable options */ /* diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 27007c57b3..c2b0d6ff3e 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -50,7 +50,7 @@ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=PARTUUID=${uuid} rootwait " \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "netargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \ "\0" \ @@ -68,8 +68,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - /* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */ #define CONFIG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/apalis-imx8x.h b/include/configs/apalis-imx8x.h index 50dae2d8e0..402fed1bba 100644 --- a/include/configs/apalis-imx8x.h +++ b/include/configs/apalis-imx8x.h @@ -77,7 +77,7 @@ "mmcargs=setenv bootargs ${consoleargs} " \ "root=PARTUUID=${uuid} rootwait " \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "netargs=setenv bootargs ${consoleargs} " \ "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \ "${vidargs}\0" \ @@ -99,8 +99,6 @@ /* Environment in eMMC, before config block at the end of 1st "boot sector" */ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - /* On Apalis iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index dfed1615b9..13c8d8a54e 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -45,7 +45,6 @@ #define CONFIG_USBD_HS /* Framebuffer and LCD */ -#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI diff --git a/include/configs/apple.h b/include/configs/apple.h index b1f6043174..9cf20fc833 100644 --- a/include/configs/apple.h +++ b/include/configs/apple.h @@ -5,8 +5,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x880000000 -#define CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE CONFIG_SYS_TEXT_BASE - /* Environment */ #define ENV_DEVICE_SETTINGS \ "stdin=serial,usbkbd\0" \ diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index 73f63c5a9f..7714da40dc 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -17,7 +17,7 @@ #define CONFIG_TMU_TIMER #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ -#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4) +#define CONFIG_SYS_TIMER_RATE (get_board_sys_clk() / 4) /* STACK */ #define CONFIG_SYS_INIT_SP_ADDR 0xE8083000 @@ -72,7 +72,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define CONFIG_SYS_CLK_FREQ 50000000 -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SH_SCIF_CLK_FREQ get_board_sys_clk() #endif /* __ARMADILLO_800EVA_H */ diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 2e7927bc37..d87ca304e2 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -58,7 +58,6 @@ #define CONFIG_MCFTMR /* I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR /* * Defines processor clock - important for correct timings concerning serial @@ -91,7 +90,6 @@ */ #ifndef CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */ #endif diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index 7d6edbd65d..81b4218c88 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -44,7 +44,6 @@ /* Access eMMC Boot_1 and Boot_2 partitions */ /* enable 64-bit PCI resources */ -#define CONFIG_SYS_PCI_64BIT 1 #define CONSOLE_ARGS "console_args=console=ttyS0,115200n8\0" #define MAX_CPUS "max_cpus=maxcpus=8\0" diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index e7f380b515..98c815961c 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -90,7 +90,6 @@ extern phys_addr_t prior_stage_fdt_address; /* * CONFIG_SYS_LOAD_ADDR - 1 MiB. */ -#define CONFIG_SYS_FDT_SAVE_ADDRESS 0x1f00000 #define CONFIG_SYS_CBSIZE 512 #define CONFIG_SYS_MAXARGS 32 @@ -104,7 +103,6 @@ extern phys_addr_t prior_stage_fdt_address; */ #define V_NS16550_CLK 81000000 -#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK @@ -126,8 +124,6 @@ extern phys_addr_t prior_stage_fdt_address; /* * Flash configuration. */ -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_SPI_FLASH_MACRONIX /* * Filesystem configuration. diff --git a/include/configs/blanche.h b/include/configs/blanche.h index f048f158ed..882b94f55a 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -45,8 +45,6 @@ #endif /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK /* ENV setting */ diff --git a/include/configs/broadcom_bcm963158.h b/include/configs/broadcom_bcm963158.h index de45f74923..5aa784d88c 100644 --- a/include/configs/broadcom_bcm963158.h +++ b/include/configs/broadcom_bcm963158.h @@ -28,7 +28,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_SELF_INIT #endif /* CONFIG_MTD_RAW_NAND */ /* diff --git a/include/configs/broadcom_bcm968360bg.h b/include/configs/broadcom_bcm968360bg.h index 0391f06218..01bab046dd 100644 --- a/include/configs/broadcom_bcm968360bg.h +++ b/include/configs/broadcom_bcm968360bg.h @@ -27,7 +27,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_SELF_INIT #endif /* CONFIG_MTD_RAW_NAND */ /* diff --git a/include/configs/broadcom_bcm968380gerg.h b/include/configs/broadcom_bcm968380gerg.h index 866de2527d..c1c1b37fab 100644 --- a/include/configs/broadcom_bcm968380gerg.h +++ b/include/configs/broadcom_bcm968380gerg.h @@ -8,5 +8,4 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_SELF_INIT #endif /* CONFIG_MTD_RAW_NAND */ diff --git a/include/configs/broadcom_bcm968580xref.h b/include/configs/broadcom_bcm968580xref.h index 179aa9d608..ebfc2ecc0b 100644 --- a/include/configs/broadcom_bcm968580xref.h +++ b/include/configs/broadcom_bcm968580xref.h @@ -27,7 +27,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_SELF_INIT #endif /* CONFIG_MTD_RAW_NAND */ /* diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index e42f2b544c..1cde5f77f2 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -11,15 +11,12 @@ #include <asm/arch/imx-regs.h> #include "siemens-env-common.h" -#include "siemens-ccp-common.h" /* SPL config */ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 #define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 @@ -35,9 +32,6 @@ #define CONFIG_FACTORYSET -#undef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING GENERATE_CCP_VERSION("01", "07") - #define CONFIG_REMAKE_ELF /* ENET Config */ @@ -122,7 +116,6 @@ /* On CCP board, USDHC1 is for eMMC */ #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* eMMC */ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 220eb81910..d5549f62ce 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -14,8 +14,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 #define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 @@ -33,7 +31,6 @@ #define CONFIG_REMAKE_ELF /* Flat Device Tree Definitions */ -#define CONFIG_OF_BOARD_SETUP #define CONFIG_SYS_BOOTMAPSZ (256 << 20) #define CONFIG_SYS_FSL_ESDHC_ADDR 0 @@ -82,7 +79,7 @@ "boot_fdt=try\0" \ "fdt_file=imx8qm-cgt-qmx8.dtb\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \ @@ -127,8 +124,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ #define CONFIG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/chromebook_coral.h b/include/configs/chromebook_coral.h index 27e60d8f58..0eeea80b32 100644 --- a/include/configs/chromebook_coral.h +++ b/include/configs/chromebook_coral.h @@ -18,8 +18,6 @@ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" -#define CONFIG_TPL_TEXT_BASE 0xffff8000 - #define CONFIG_SYS_NS16550_MEM32 #undef CONFIG_SYS_NS16550_PORT_MAPPED diff --git a/include/configs/chromebook_samus.h b/include/configs/chromebook_samus.h index 2fe3e72199..9d5a63caba 100644 --- a/include/configs/chromebook_samus.h +++ b/include/configs/chromebook_samus.h @@ -23,6 +23,4 @@ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" -#define CONFIG_TPL_TEXT_BASE 0xfffd8000 - #endif /* __CONFIG_H */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 0a7043a80c..17954fe3aa 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -35,7 +35,6 @@ #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ -#define CONFIG_VERSION_VARIABLE /* U-BOOT version */ /* Miscellaneous configuration options */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) @@ -50,6 +49,4 @@ #define CONFIG_SPL_START_S_PATH "arch/mips/mach-jz47xx" -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x1c /* 14 KiB offset */ - #endif /* __CONFIG_CI20_H__ */ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index 92770e8909..a5bf6ccbf4 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -49,7 +49,7 @@ "fdtaddr=0x83000000\0" \ "mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \ "usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \ "doboot=bootz ${loadaddr} - ${fdtaddr}\0" \ "mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index d61d759092..e1723c927f 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -13,7 +13,6 @@ #include "mx6_common.h" /* Machine config */ -#define CONFIG_SYS_LITTLE_ENDIAN /* MMC */ #define CONFIG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index be62caabb5..3e19e99c24 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -54,7 +54,6 @@ */ #if 0 -#define CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ #endif diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 82926afbdf..01182505cc 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -80,7 +80,7 @@ "mmcargs=setenv bootargs ${consoleargs} " \ "root=PARTUUID=${uuid} rootwait " \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "netargs=setenv bootargs ${consoleargs} " \ "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \ "${vidargs}\0" \ @@ -102,8 +102,6 @@ /* Environment in eMMC, before config block at the end of 1st "boot sector" */ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - /* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index b103186bf4..9a6f17f5bd 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -35,7 +35,6 @@ #define CONFIG_USBD_HS /* Framebuffer and LCD */ -#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 22eab7779b..0be7f5a416 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -12,7 +12,6 @@ /* * High Level Board Configuration Options */ -#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ /* Avoid overwriting factory configuration block */ #define CONFIG_BOARD_SIZE_LIMIT 0x40000 diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index e947b58d96..c377187b80 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -19,7 +19,6 @@ #define CONFIG_LCD_LOGO /* NAND support */ -#define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define UBOOT_UPDATE \ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index a7c91b9f1d..40984d661c 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -14,8 +14,6 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#define CONFIG_SYS_FSL_CLK - #ifdef CONFIG_VIDEO_FSL_DCU_FB #define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO diff --git a/include/configs/comtrend_vr3032u.h b/include/configs/comtrend_vr3032u.h index fc890af915..ee29f702f8 100644 --- a/include/configs/comtrend_vr3032u.h +++ b/include/configs/comtrend_vr3032u.h @@ -10,5 +10,4 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_SELF_INIT #endif /* CONFIG_MTD_RAW_NAND */ diff --git a/include/configs/condor.h b/include/configs/condor.h index 36466f0f50..822ef7118e 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -27,7 +27,6 @@ /* Board Clock */ /* XTAL_CLK : 33.33MHz */ -#define CONFIG_SYS_CLK_FREQ 33333333u /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index a04e7f98b9..f6e0b2a7ea 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -47,15 +47,12 @@ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #if defined(CONFIG_SPIFLASH) #elif defined(CONFIG_SDCARD) #define CONFIG_FSL_FIXED_MMC_LOCATION #endif -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() /* sysclk for MPC85xx */ - /* * These can be toggled for performance analysis, otherwise use default. */ @@ -392,7 +389,6 @@ #define CONFIG_HAS_FSL_MPH_USB #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) -#define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 2d615d0e11..27284f7913 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -66,7 +66,6 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 -#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT #endif /* Ethernet */ diff --git a/include/configs/crs3xx-98dx3236.h b/include/configs/crs3xx-98dx3236.h index 27b45a7605..4dbc758266 100644 --- a/include/configs/crs3xx-98dx3236.h +++ b/include/configs/crs3xx-98dx3236.h @@ -11,7 +11,6 @@ */ #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* 64 MB */ -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg /* Environment in SPI NOR flash */ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index bd78866294..97c9276e0e 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -18,7 +18,6 @@ * SoC Configuration */ #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH -#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) @@ -136,10 +135,6 @@ 59, 60, 61, 62, 63 } #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 10 - -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_NAND_SELF_INIT -#endif #endif /* diff --git a/include/configs/db-xc3-24g4xg.h b/include/configs/db-xc3-24g4xg.h index 6a4c5a7ab5..1d242bf4e6 100644 --- a/include/configs/db-xc3-24g4xg.h +++ b/include/configs/db-xc3-24g4xg.h @@ -6,12 +6,6 @@ #ifndef _CONFIG_DB_XC3_24G4G_H #define _CONFIG_DB_XC3_24G4G_H -/* - * High Level Configuration Options (easy to change) - */ - -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg - /* Environment in SPI NOR flash */ /* NAND */ diff --git a/include/configs/deneb.h b/include/configs/deneb.h index a33165c1ca..f155bb8bf5 100644 --- a/include/configs/deneb.h +++ b/include/configs/deneb.h @@ -9,9 +9,6 @@ #include "capricorn-common.h" -#undef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING GENERATE_CCP_VERSION("01", "06") - /* DDR3 board total DDR is 2 GB */ #undef PHYS_SDRAM_1_SIZE #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 7fbe9dff96..1e24d05bfb 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -28,7 +28,6 @@ /* * GPIO */ -#define CONFIG_LPC32XX_GPIO /* * Ethernet diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index d813d924a6..9282f83728 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -46,15 +46,6 @@ /* TWL4030 */ -/* Board NAND Info */ -#define CONFIG_JFFS2_NAND -/* nand device jffs2 lives on */ -#define CONFIG_JFFS2_DEV "nand0" -/* start of jffs2 partition */ -#define CONFIG_JFFS2_PART_OFFSET 0x680000 -#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ - /* partition */ - /* BOOTP/DHCP options */ #define CONFIG_BOOTP_NISDOMAIN #define CONFIG_BOOTP_BOOTFILESIZE diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 3233bf16a5..8b8cd4c31b 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -64,13 +64,6 @@ #endif #endif -/* Watchdog */ -#if defined(CONFIG_SPL_BUILD) -#undef CONFIG_WDT -#undef CONFIG_WATCHDOG -#define CONFIG_HW_WATCHDOG -#endif - #ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200\0" \ diff --git a/include/configs/display5.h b/include/configs/display5.h index 8633efbd6c..38ac869289 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -314,13 +314,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -/* Watchdog */ -#if defined(CONFIG_SPL_BUILD) -#undef CONFIG_WDT -#undef CONFIG_WATCHDOG -#define CONFIG_HW_WATCHDOG -#endif - /* ENV config */ #ifdef CONFIG_ENV_IS_IN_SPI_FLASH /* The 0x120000 value corresponds to above SPI-NOR memory MAP */ diff --git a/include/configs/dns325.h b/include/configs/dns325.h index 8e298ddfa1..0590704000 100644 --- a/include/configs/dns325.h +++ b/include/configs/dns325.h @@ -12,12 +12,6 @@ #ifndef _CONFIG_DNS325_H #define _CONFIG_DNS325_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -#define CONFIG_KW88F6281 /* SOC Name */ - #include "mv-common.h" /* Remove or override few declarations from mv-common.h */ @@ -32,7 +26,6 @@ /* * Enable GPI0 support */ -#define CONFIG_KIRKWOOD_GPIO /* * Environment variables configurations diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h index 8a5daf48c0..0ad04eee1b 100644 --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h @@ -12,12 +12,6 @@ #define _CONFIG_DOCKSTAR_H /* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ -#define CONFIG_KW88F6281 1 /* SOC Name */ - -/* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros */ diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index 61b1e0fc1f..beea234d8d 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -11,12 +11,7 @@ #ifndef _CONFIG_DREAMPLUG_H #define _CONFIG_DREAMPLUG_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ - -#include "mv-plug-common.h" +#include "mv-common.h" /* * Environment variables configurations diff --git a/include/configs/ds109.h b/include/configs/ds109.h index c57461c7e6..8553ea0b95 100644 --- a/include/configs/ds109.h +++ b/include/configs/ds109.h @@ -11,12 +11,7 @@ #ifndef _CONFIG_DS109_H #define _CONFIG_DS109_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ - -#include "mv-plug-common.h" +#include "mv-common.h" /* * Environment variables configurations diff --git a/include/configs/durian.h b/include/configs/durian.h index 1dec09b4ce..c0ea42e180 100644 --- a/include/configs/durian.h +++ b/include/configs/durian.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (0x88000000 - 0x100000) /* PCI CONFIG */ -#define CONFIG_SYS_PCI_64BIT 1 #define CONFIG_PCI_SCAN_SHOW /* SCSI */ diff --git a/include/configs/eagle.h b/include/configs/eagle.h index ee53504250..b8a7b5a916 100644 --- a/include/configs/eagle.h +++ b/include/configs/eagle.h @@ -18,7 +18,6 @@ /* Board Clock */ /* XTAL_CLK : 33.33MHz */ -#define CONFIG_SYS_CLK_FREQ 33333333u /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 6a32bc649a..62b62e07c5 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -25,8 +25,6 @@ #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_RESET_TO_RETRY -#define CONFIG_HW_WATCHDOG - #define STATUS_LED_ACTIVE 0 /*----------------------------------------------------------------------* @@ -187,8 +185,6 @@ * I2C */ -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR - #ifdef CONFIG_CMD_DATE #define CONFIG_RTC_DS1338 #define CONFIG_I2C_RTC_ADDR 0x68 diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h index 48d4c8a948..081d5e9aaa 100644 --- a/include/configs/ebisu.h +++ b/include/configs/ebisu.h @@ -25,7 +25,6 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 6b487b310c..e20e058e0a 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -28,9 +28,6 @@ * High Level Configuration Options (easy to change) */ -#define CONFIG_FEROCEON 1 /* CPU Core subversion */ -#define CONFIG_88F5182 1 /* SOC Name */ - #include <asm/arch/orion5x.h> /* * CLKs configurations diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 5570086171..dc83ab7190 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -84,9 +84,6 @@ */ /* nedded by compliance test in read mode */ -#if defined(CONFIG_SPL_CMT) -#define CONFIG_SYS_DCACHE_OFF -#endif /* Define own nand partitions */ #define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index f9a739ede0..ccf615efa3 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -54,9 +54,6 @@ #endif /* JFFS2 */ -#ifdef CONFIG_CMD_JFFS2 -#define CONFIG_JFFS2_NAND -#endif /* Ethernet */ #define CONFIG_NET_RETRY_COUNT 20 @@ -66,7 +63,6 @@ /* MMC */ #ifdef CONFIG_CMD_MMC -#define CONFIG_GENERIC_ATMEL_MCI #define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8 #endif diff --git a/include/configs/evb_ast2500.h b/include/configs/evb_ast2500.h index 558d6f9452..b109a15183 100644 --- a/include/configs/evb_ast2500.h +++ b/include/configs/evb_ast2500.h @@ -13,9 +13,6 @@ #define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE -/* Memory Info */ -#define CONFIG_SYS_LOAD_ADDR 0x83000000 - /* Misc */ #define CONFIG_EXTRA_ENV_SETTINGS \ "" diff --git a/include/configs/evb_ast2600.h b/include/configs/evb_ast2600.h index 9049a9fc10..3c2155da46 100644 --- a/include/configs/evb_ast2600.h +++ b/include/configs/evb_ast2600.h @@ -10,9 +10,6 @@ #define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE -/* Memory Info */ -#define CONFIG_SYS_LOAD_ADDR 0x83000000 - /* Misc */ #define STR_HELPER(s) #s #define STR(s) STR_HELPER(s) diff --git a/include/configs/evb_px30.h b/include/configs/evb_px30.h index 27201fcfd7..53781ba7ae 100644 --- a/include/configs/evb_px30.h +++ b/include/configs/evb_px30.h @@ -12,6 +12,4 @@ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" -#define CONFIG_SUPPORT_EMMC_RPMB - #endif diff --git a/include/configs/evb_rk3308.h b/include/configs/evb_rk3308.h index e8893eb7de..0273e751ce 100644 --- a/include/configs/evb_rk3308.h +++ b/include/configs/evb_rk3308.h @@ -8,8 +8,6 @@ #include <configs/rk3308_common.h> -#define CONFIG_SUPPORT_EMMC_RPMB - #define ROCKCHIP_DEVICE_SETTINGS \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/evb_rk3568.h b/include/configs/evb_rk3568.h index 2b255a11da..a0f2383bf2 100644 --- a/include/configs/evb_rk3568.h +++ b/include/configs/evb_rk3568.h @@ -8,8 +8,6 @@ #include <configs/rk3568_common.h> -#define CONFIG_SUPPORT_EMMC_RPMB - #define ROCKCHIP_DEVICE_SETTINGS \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 95aaa747e4..eb2606905f 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -19,8 +19,7 @@ /* Keep L2 Cache Disabled */ /* input clock of PLL: 24MHz input clock */ -#define CONFIG_SYS_CLK_FREQ 24000000 -#define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ +#define COUNTER_FREQUENCY 24000000 /* select serial console configuration */ diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 478a0c42b1..8d3449f028 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -67,23 +67,6 @@ #define PHYS_SDRAM_12 (CONFIG_SYS_SDRAM_BASE + (11 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_12_SIZE SDRAM_BANK_SIZE -#define CONFIG_DEBUG_UART_CLOCK 132710400 - -#define CONFIG_PREBOOT \ -"echo Read pressed buttons status;" \ -"KEY_VOLUMEUP=gpa20;" \ -"KEY_HOME=gpa17;" \ -"KEY_VOLUMEDOWN=gpa21;" \ -"KEY_POWER=gpa00;" \ -"PRESSED=0;" \ -"RELEASED=1;" \ -"if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; " \ -"else setenv VOLUME_UP $RELEASED; fi;" \ -"if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; " \ -"else setenv VOLUME_DOWN $RELEASED; fi;" \ -"if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;" \ -"if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" - #ifndef MEM_LAYOUT_ENV_SETTINGS #define MEM_LAYOUT_ENV_SETTINGS \ "bootm_size=0x10000000\0" \ diff --git a/include/configs/falcon.h b/include/configs/falcon.h index d783faf180..1d6a9b9b73 100644 --- a/include/configs/falcon.h +++ b/include/configs/falcon.h @@ -26,7 +26,6 @@ /* Board Clock */ /* XTAL_CLK : 16.66MHz */ -#define CONFIG_SYS_CLK_FREQ 16666666u /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ diff --git a/include/configs/firefly_rk3308.h b/include/configs/firefly_rk3308.h index 3af2493043..28e3a547e3 100644 --- a/include/configs/firefly_rk3308.h +++ b/include/configs/firefly_rk3308.h @@ -8,8 +8,6 @@ #include <configs/rk3308_common.h> -#define CONFIG_SUPPORT_EMMC_RPMB - #define ROCKCHIP_DEVICE_SETTINGS \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/giedi.h b/include/configs/giedi.h index dabb1fb171..19a795bcf8 100644 --- a/include/configs/giedi.h +++ b/include/configs/giedi.h @@ -9,9 +9,6 @@ #include "capricorn-common.h" -#undef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING GENERATE_CCP_VERSION("01", "07") - /* DDR3 board total DDR is 1 GB */ #undef PHYS_SDRAM_1_SIZE #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1 GB */ diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h index 269178c9c2..90e37d9853 100644 --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h @@ -15,12 +15,6 @@ #define _CONFIG_GOFLEXHOME_H /* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ -#define CONFIG_KW88F6281 1 /* SOC Name */ - -/* * Default GPIO configuration and LED status */ #define GOFLEXHOME_OE_LOW (~(0)) diff --git a/include/configs/gose.h b/include/configs/gose.h index 60a89e0023..01657d7a66 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -30,8 +30,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 29a446c2f5..fb01c5614b 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -9,7 +9,6 @@ #define __GRPEACH_H /* Board Clock , P1 clock frequency (XTAL=13.33MHz) */ -#define CONFIG_SYS_CLK_FREQ 66666666 /* Miscellaneous */ #define CONFIG_SYS_PBSIZE 256 diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h index e51f3f2483..25c5a97c69 100644 --- a/include/configs/guruplug.h +++ b/include/configs/guruplug.h @@ -9,20 +9,7 @@ #ifndef _CONFIG_GURUPLUG_H #define _CONFIG_GURUPLUG_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ - -/* - * Standard filesystems - */ - -/* - * mv-plug-common.h should be defined after CMD configs since it used them - * to enable certain macros - */ -#include "mv-plug-common.h" +#include "mv-common.h" /* * Environment variables configurations diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 5a1e72c537..879bd5c953 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -24,7 +24,6 @@ #endif /* NAND support */ -#define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Environment in NAND (which is 512M), aligned to start of last sector */ diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index b03b45f837..9783fd89ec 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -8,12 +8,6 @@ #ifndef _CONFIG_IB62x0_H #define _CONFIG_IB62x0_H -/* - * High level configuration options - */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -#define CONFIG_KW88F6281 /* SOC Name */ - #include "mv-common.h" /* @@ -50,11 +44,4 @@ #define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET #endif /* CONFIG_IDE */ -/* - * RTC driver configuration - */ -#ifdef CONFIG_CMD_DATE -#define CONFIG_RTC_MV -#endif /* CONFIG_CMD_DATE */ - #endif /* _CONFIG_IB62x0_H */ diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index 4903b92ca3..f1aad1efde 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -8,12 +8,6 @@ #ifndef _CONFIG_ICONNECT_H #define _CONFIG_ICONNECT_H -/* - * High level configuration options - */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -#define CONFIG_KW88F6281 /* SOC Name */ - #include "mv-common.h" /* diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 49f5d68892..206a57a653 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -153,7 +153,6 @@ /* * HW-Watchdog */ -#define CONFIG_WATCHDOG 1 #define CONFIG_SYS_WATCHDOG_VALUE 0xFFFF /* @@ -234,9 +233,6 @@ #define CONFIG_TIMESTAMP #undef CONFIG_SYS_LOADS_BAUD_CHANGE -#define CONFIG_JFFS2_NAND -#define CONFIG_JFFS2_DEV "0" - /* mtdparts command line support */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index c289d694e9..dffe175f50 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -103,7 +103,6 @@ #define CONFIG_MXC_NAND_REGS_BASE 0xd8000000 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0xd8000000 -#define CONFIG_JFFS2_NAND #define CONFIG_MXC_NAND_HWECC /* diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index 4a0050b45a..261ed900fe 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -32,7 +32,7 @@ "fdt_file=imx7-cm.dtb\0" \ "fdt_addr=0x83000000\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ @@ -85,7 +85,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ /* USB Configs */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 988058780f..991839c0bc 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -14,8 +14,6 @@ #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -81,7 +79,7 @@ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ @@ -154,8 +152,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_XCV_TYPE RGMII diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 5d91de3d1e..77f062474d 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -11,8 +11,6 @@ #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -40,7 +38,7 @@ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "initrd_addr=0x43800000\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate}" \ @@ -93,9 +91,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) - #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ @@ -108,7 +103,6 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 /* FEC*/ #define CONFIG_ETHPRIME "FEC" diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 167ca19f21..c7022ef0f7 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -53,7 +51,7 @@ "fdtfile=imx8mm-evk.dtb\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ /* Link Definitions */ @@ -85,8 +83,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_XCV_TYPE RGMII diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 4b22ba10a0..d75fcf747e 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -12,8 +12,6 @@ #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -30,9 +28,6 @@ # define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* CONFIG_SPL_BUILD */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) - #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 2) \ @@ -71,10 +66,6 @@ #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ #define CONFIG_SYS_BOOTM_LEN SZ_256M -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END \ - (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) - /* UART */ #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR @@ -88,6 +79,5 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #endif /* __IMX8MM_ICORE_MX8MM_H */ diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index f8d41425c6..7ab11cc8fb 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -11,8 +11,6 @@ #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -105,7 +103,6 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 /* FEC */ #define CONFIG_ETHPRIME "eth0" diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 438a3820c7..2843535973 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -11,9 +11,6 @@ #define CONFIG_SPL_MAX_SIZE (148 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -46,7 +43,7 @@ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "initrd_addr=0x43800000\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} " \ @@ -124,7 +121,6 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 /* ENET Config */ #if defined(CONFIG_FEC_MXC) diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index ab89321492..142fc3e4ff 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -14,8 +14,6 @@ #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -52,7 +50,7 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ /* Link Definitions */ @@ -84,6 +82,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #endif diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 30cce1a49e..b810a558ad 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -14,8 +14,6 @@ #define CONFIG_SPL_MAX_SIZE (152 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD @@ -67,7 +65,7 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ /* Link Definitions */ @@ -100,6 +98,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #endif diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 7206c08a8c..b099004937 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -14,8 +14,6 @@ #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x187FF0 @@ -61,7 +59,7 @@ "fdt_file=imx8mq-cm.dtb\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ /* Link Definitions */ @@ -91,6 +89,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #endif diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 49a9526d96..6e1d387e2b 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -14,8 +14,6 @@ #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ @@ -72,7 +70,7 @@ "fdt_file=imx8mq-evk.dtb\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ /* Link Definitions */ @@ -102,10 +100,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - -#define CONFIG_MXC_GPIO - -#define CONFIG_OF_SYSTEM_SETUP - #endif diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 9f55b039f2..1668ca8acf 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -11,8 +11,6 @@ #define CONFIG_SPL_MAX_SIZE (172 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ @@ -62,7 +60,7 @@ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ @@ -118,10 +116,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - (PHYS_SDRAM_SIZE >> 1)) - #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR /* Monitor Command Prompt */ @@ -134,10 +128,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - -#define CONFIG_MXC_GPIO - -#define CONFIG_OF_SYSTEM_SETUP - #endif diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 6b8d9405f4..884d741789 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -15,8 +15,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 #define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 @@ -33,9 +31,6 @@ #define CONFIG_REMAKE_ELF -/* Flat Device Tree Definitions */ -#define CONFIG_OF_BOARD_SETUP - #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 #define USDHC2_BASE_ADDR 0x5B020000 @@ -60,7 +55,7 @@ "initrd_addr=0x83800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ @@ -127,8 +122,6 @@ /* Default environment is in SD */ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */ #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 3dea00ca28..1a553510f6 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -64,7 +64,7 @@ "fdt_file=imx8qm-rom7720-a1.dtb\0" \ "initrd_addr=0x83800000\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \ @@ -109,17 +109,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 -/* Default environment is in SD */ - -#ifdef CONFIG_QSPI_BOOT -#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS -#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS -#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE -#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED -#endif - -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board, * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND, * USDHC2 is for SD, USDHC3 is for SD on base board diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 76ef124134..3900ef1b50 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -13,8 +13,6 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 #define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 @@ -31,9 +29,6 @@ #define CONFIG_REMAKE_ELF -/* Flat Device Tree Definitions */ -#define CONFIG_OF_BOARD_SETUP - #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 #define USDHC2_BASE_ADDR 0x5B020000 @@ -58,7 +53,7 @@ "initrd_addr=0x83800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot}\0 " \ @@ -125,8 +120,6 @@ /* Default environment is in SD */ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */ #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 501f465b9e..6b25b485de 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -12,9 +12,6 @@ #define CONFIG_SYS_BOOTM_LEN (SZ_64M) #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD @@ -64,7 +61,7 @@ "fdtfile=imx8ulp-evk.dtb\0" \ "initrd_addr=0x83800000\0" \ "bootm_size=0x10000000\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ /* Link Definitions */ diff --git a/include/configs/imxrt1020-evk.h b/include/configs/imxrt1020-evk.h index 64c0f5eaf0..79feab389e 100644 --- a/include/configs/imxrt1020-evk.h +++ b/include/configs/imxrt1020-evk.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x20240000 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC135 1 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1 #define PHYS_SDRAM 0x80000000 diff --git a/include/configs/imxrt1050-evk.h b/include/configs/imxrt1050-evk.h index 99d25c1e6e..241e87234f 100644 --- a/include/configs/imxrt1050-evk.h +++ b/include/configs/imxrt1050-evk.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x20280000 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC135 1 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1 #define PHYS_SDRAM 0x80000000 diff --git a/include/configs/km/km-mpc8309.h b/include/configs/km/km-mpc8309.h index 869bd9b30a..98204bd3c6 100644 --- a/include/configs/km/km-mpc8309.h +++ b/include/configs/km/km-mpc8309.h @@ -5,12 +5,6 @@ #define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0" -/* - * System Clock Setup - */ -#define CONFIG_SYS_CLK_FREQ 66000000 -#define CONFIG_83XX_PCICLK 66000000 - /* QE microcode/firmware address */ /* between the u-boot partition and env */ diff --git a/include/configs/km/km-mpc832x.h b/include/configs/km/km-mpc832x.h index de6e7daf06..888bb2981f 100644 --- a/include/configs/km/km-mpc832x.h +++ b/include/configs/km/km-mpc832x.h @@ -1,15 +1,4 @@ /* - * High Level Configuration Options - */ -#define CONFIG_KM8321 /* Keymile PBEC8321 board specific */ - -/* - * System Clock Setup - */ -#define CONFIG_SYS_CLK_FREQ 66000000 -#define CONFIG_83XX_PCICLK 66000000 - -/* * System IO Config */ #define CONFIG_SYS_SICRL SICRL_IRQ_CKS @@ -69,6 +58,3 @@ #define CONFIG_SYS_KMBEC_FPGA_BASE 0xE8000000 #define CONFIG_SYS_KMBEC_FPGA_SIZE 128 - -/* EEprom support */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index cca624ea3e..a485c3ac6d 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -19,12 +19,6 @@ #ifndef _CONFIG_KM_ARM_H #define _CONFIG_KM_ARM_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -#define CONFIG_KW88F6281 /* SOC Name */ - #define CONFIG_NAND_ECC_BCH /* include common defines/options for all Keymile boards */ @@ -74,7 +68,6 @@ #undef CONFIG_I2C_MVTWSI #define CONFIG_SYS_I2C_INIT_BOARD -#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */ #define CONFIG_SYS_NUM_I2C_BUSES 6 #define CONFIG_SYS_I2C_MAX_HOPS 1 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 743d09e9c4..ba0e4dd5c6 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -6,8 +6,6 @@ #ifndef __CONFIG_PG_WCOM_LS102XA_H #define __CONFIG_PG_WCOM_LS102XA_H -#define CONFIG_SYS_FSL_CLK - /* include common defines/options for all Keymile boards */ #include "keymile-common.h" @@ -18,8 +16,6 @@ CONFIG_KM_PHRAM + \ CONFIG_KM_RESERVED_PRAM) >> 10) -#define CONFIG_SYS_CLK_FREQ 66666666 - #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) @@ -40,7 +36,6 @@ * IFC Definitions */ /* NOR Flash Definitions */ -#define CONFIG_FSL_IFC #define CONFIG_SYS_FLASH_BASE 0x60000000 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index 82c2a12922..e58a69501b 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -34,8 +34,6 @@ /* KM_KIRKWOOD_128M16 */ #elif defined(CONFIG_KM_KIRKWOOD_128M16) #define CONFIG_HOSTNAME "km_kirkwood_128m16" -#undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg #define CONFIG_KM_DISABLE_PCIE /* KM_NUSA */ @@ -43,21 +41,14 @@ #define CONFIG_HOSTNAME "kmnusa" -#undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg - /* KMCOGE5UN */ #elif defined(CONFIG_KM_COGE5UN) -#undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg #define CONFIG_HOSTNAME "kmcoge5un" #define CONFIG_KM_DISABLE_PCIE /* KM_SUSE2 */ #elif defined(CONFIG_KM_SUSE2) #define CONFIG_HOSTNAME "kmsuse2" -#undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg #define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048" #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE #else diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 4dbd53c387..98e572397b 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -141,14 +141,11 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* Environment in parallel NOR-Flash */ #define CONFIG_ENV_TOTAL_SIZE 0x040000 #define ENV_DEL_ADDR 0xebf00000 /*direct for newenv*/ -#define CONFIG_SYS_CLK_FREQ 66666666 - /* * These can be toggled for performance analysis, otherwise use default. */ @@ -362,7 +359,6 @@ * Retain non-DM serial port for debug purposes. */ #if !defined(CONFIG_DM_SERIAL) -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index 60fe4ae383..8f4685c271 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -24,12 +24,6 @@ #include "km/km-mpc83xx.h" #include "km/km-mpc8360.h" -/* - * System Clock Setup - */ -#define CONFIG_SYS_CLK_FREQ 66000000 -#define CONFIG_83XX_PCICLK 66000000 - /** * KMCOGE5NE has 512 MB RAM */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 65a38c5757..eca8998a51 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -30,8 +30,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index 34304f9102..2bac0008e2 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -59,7 +59,6 @@ #ifdef CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #endif #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 4152851ba4..448749a7f8 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -30,10 +30,6 @@ /* early stack pointer */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xeff0) -/* memtest command */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff - /* SMP */ #define CPU_RELEASE_ADDR secondary_boot_addr @@ -46,8 +42,7 @@ /* serial port */ #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) -#define CONFIG_SYS_CLK_FREQ 100000000 -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) /* ethernet */ #define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index 8ac381c5d7..0983d40ec4 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -10,8 +10,6 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#define CONFIG_SYS_FSL_CLK - /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index c3f690c7d7..1eb6dafe20 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -68,9 +68,8 @@ /* Clock */ #define CONFIG_GLOBAL_TIMER -#define CONFIG_SYS_CLK_FREQ (48000000) #define CONFIG_SYS_CPU_CLK (1196000000) -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SH_SCIF_CLK_FREQ get_board_sys_clk() #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ #define CONFIG_NFS_TIMEOUT 10000UL diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index 6180563ab7..046f1888cb 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -6,35 +6,6 @@ #ifndef _CONFIG_LACIE_KW_H #define _CONFIG_LACIE_KW_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -/* SoC name */ -#if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2) -#define CONFIG_KW88F6192 -#else -#define CONFIG_KW88F6281 -#endif - -/* - * SDRAM configuration - */ - -/* - * Different SDRAM configuration and size for some of the boards derived - * from the Network Space v2 - */ -#if defined(CONFIG_INETSPACE_V2) -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-is2.cfg -#elif defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2) -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-ns2l.cfg -#endif - -/* - * mv-common.h should be defined after CMD configs since it used them - * to enable certain macros - */ #include "mv-common.h" /* Remove or override few declarations from mv-common.h */ @@ -70,7 +41,6 @@ /* * Enable GPI0 support */ -#define CONFIG_KIRKWOOD_GPIO /* * Enable I2C support diff --git a/include/configs/lager.h b/include/configs/lager.h index c5001e3ec7..4c291aa89b 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -31,8 +31,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 0e4d134dbd..b912db11d0 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -18,7 +18,6 @@ * SoC Configuration */ #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH -#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 2d051e5944..3a8dd475b2 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -23,8 +23,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #endif -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -36,7 +34,7 @@ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index ffc23debb8..bda4283ef5 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -14,8 +14,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* SATA */ -#define CONFIG_LIBATA -#define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SATA AHCI_BASE_ADDR diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 88986f973f..5d561009c5 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -10,8 +10,6 @@ #include <asm/arch/stream_id_lsch2.h> #include <linux/sizes.h> -#define CONFIG_SYS_CLK_FREQ 125000000 - #ifdef CONFIG_TFABOOT #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE #else @@ -45,11 +43,6 @@ /* I2C */ /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index 391f0f3be7..c61865ccd4 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -8,9 +8,6 @@ #include "ls1012a_common.h" -#undef CONFIG_SYS_BOARD -#define CONFIG_SYS_BOARD "ls1012afrwy" - /* Board Rev*/ #define BOARD_REV_A_B 0x0 #define BOARD_REV_C 0x00080000 diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 98c04339af..cbcb3f72a5 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -75,19 +75,16 @@ DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \ DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \ DSPI_CTAR_DT(0)) -#define CONFIG_SPI_FLASH_SST /* cs1 */ #define CONFIG_SYS_DSPI_CTAR2 (DSPI_CTAR_TRSZ(7) | DSPI_CTAR_PCSSCK_1CLK |\ DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \ DSPI_CTAR_CSSCK(0) | DSPI_CTAR_ASC(0) | \ DSPI_CTAR_DT(0)) -#define CONFIG_SPI_FLASH_STMICRO /* cs2 */ #define CONFIG_SYS_DSPI_CTAR3 (DSPI_CTAR_TRSZ(7) | DSPI_CTAR_PCSSCK_1CLK |\ DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \ DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \ DSPI_CTAR_DT(0)) -#define CONFIG_SPI_FLASH_EON /* cs3 */ #define CONFIG_PCIE1 /* PCIE controller 1 */ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 222caa161d..7b4044fba7 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -9,13 +9,9 @@ #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR -#define CONFIG_SYS_FSL_CLK - #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE -#define CONFIG_SYS_CLK_FREQ 100000000 - /* * DDR: 800 MHz ( 1600 MT/s data rate ) */ @@ -48,8 +44,6 @@ #define SDRAM_CFG_BI 0x00000001 #ifdef CONFIG_SD_BOOT -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8 - #define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SPL_PAD_TO 0x1c000 @@ -100,9 +94,6 @@ CONFIG_SYS_SCSI_MAX_LUN) /* SPI */ -#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SPI_FLASH_SPANSION -#endif /* * eTSEC @@ -174,9 +165,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #endif -#define CONFIG_OF_BOARD_SETUP -#define CONFIG_OF_STDOUT_VIA_ALIAS - #include <asm/fsl_secure_boot.h> #endif diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 27b97ffd2f..7ef42a6d8c 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -9,22 +9,13 @@ #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR -#define CONFIG_SYS_FSL_CLK - #define CONFIG_DEEP_SLEEP #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_QIXIS_I2C_ACCESS -#else -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() #endif #ifdef CONFIG_SD_BOOT @@ -76,7 +67,6 @@ unsigned long get_board_sys_clk(void); * IFC Definitions */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_FSL_IFC #define CONFIG_SYS_FLASH_BASE 0x60000000 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE @@ -298,11 +288,6 @@ unsigned long get_board_sys_clk(void); */ /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* EEPROM */ #define CONFIG_SYS_I2C_EEPROM_NXID diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index f70b6e94c0..5f6c2a0037 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -8,8 +8,6 @@ #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR -#define CONFIG_SYS_FSL_CLK - #define CONFIG_DEEP_SLEEP #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR @@ -18,8 +16,6 @@ /* XHCI Support - enabled by default */ #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#define CONFIG_SYS_CLK_FREQ 100000000 - #define DDR_SDRAM_CFG 0x470c0008 #define DDR_CS0_BNDS 0x008000bf #define DDR_CS0_CONFIG 0x80014302 @@ -75,7 +71,6 @@ #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ #endif -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index b7c2cd7add..75fab4328a 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -9,15 +9,11 @@ #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR -#define CONFIG_SYS_FSL_CLK - #define CONFIG_DEEP_SLEEP #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE -#define CONFIG_SYS_CLK_FREQ 100000000 - #define DDR_SDRAM_CFG 0x470c0008 #define DDR_CS0_BNDS 0x008000bf #define DDR_CS0_CONFIG 0x80014302 @@ -89,7 +85,6 @@ * IFC Definitions */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_FSL_IFC #define CONFIG_SYS_FLASH_BASE 0x60000000 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE @@ -191,11 +186,6 @@ */ /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* EEPROM */ #define CONFIG_SYS_I2C_EEPROM_NXID diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index b443180672..f47bc73984 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -7,7 +7,6 @@ #define __L1028A_COMMON_H #define CONFIG_REMAKE_ELF -#define CONFIG_MP #include <asm/arch/stream_id_lsch3.h> #include <asm/arch/config.h> @@ -32,11 +31,6 @@ #define COUNTER_FREQUENCY 25000000 /* 25MHz */ /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* I2C */ diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index fe20363e69..8e3bd7790f 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -8,8 +8,7 @@ #include "ls1028a_common.h" -#define CONFIG_SYS_CLK_FREQ 100000000 -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 348db1e2f8..5ce9ebbae9 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -8,8 +8,7 @@ #include "ls1028a_common.h" -#define CONFIG_SYS_CLK_FREQ 100000000 -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) #define CONFIG_SYS_RTC_BUS_NUM 0 diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index b3f91176d6..3b4f822ecf 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -112,17 +112,11 @@ #endif /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* IFC */ #ifndef SPL_NO_IFC #if defined(CONFIG_TFABOOT) || \ (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)) -#define CONFIG_FSL_IFC /* * CONFIG_SYS_FLASH_BASE has the final address (core view) * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) @@ -154,13 +148,6 @@ #endif /* DSPI */ -#ifndef SPL_NO_DSPI -#ifdef CONFIG_FSL_DSPI -#define CONFIG_SPI_FLASH_STMICRO /* cs0 */ -#define CONFIG_SPI_FLASH_SST /* cs1 */ -#define CONFIG_SPI_FLASH_EON /* cs2 */ -#endif -#endif /* FMan ucode */ #ifndef SPL_NO_FMAN diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index ee5660571e..80eff7b1a9 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -8,12 +8,6 @@ #include "ls1043a_common.h" -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() - #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 @@ -330,12 +324,6 @@ unsigned long get_board_sys_clk(void); #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 -#define CONFIG_VID_FLS_ENV "ls1043aqds_vdd_mv" -#ifndef CONFIG_SPL_BUILD -#define CONFIG_VID -#endif -#define CONFIG_VOL_MONITOR_IR36021_SET -#define CONFIG_VOL_MONITOR_INA220 /* The lowest and highest voltage allowed for LS1043AQDS */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 0d071c4ab7..7b6d19374e 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -8,8 +8,6 @@ #include "ls1043a_common.h" -#define CONFIG_SYS_CLK_FREQ 100000000 - #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 515f4209bb..d07d27d1f5 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -110,11 +110,6 @@ #endif /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* I2C */ diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index fa37c681ab..14ad84a1ef 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -8,8 +8,6 @@ #include "ls1046a_common.h" -#define CONFIG_SYS_CLK_FREQ 100000000 - #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 @@ -17,8 +15,6 @@ #define CONFIG_SYS_UBOOT_BASE 0x40100000 -/* IFC */ -#define CONFIG_FSL_IFC /* * NAND Flash Definitions */ diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 3a502bc346..97bf4182be 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -8,12 +8,6 @@ #include "ls1046a_common.h" -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() - #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 @@ -43,7 +37,6 @@ unsigned long get_board_sys_clk(void); /* IFC */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_FSL_IFC /* * CONFIG_SYS_FLASH_BASE has the final address (core view) * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) @@ -339,12 +332,6 @@ unsigned long get_board_sys_clk(void); #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 -#define CONFIG_VID_FLS_ENV "ls1046aqds_vdd_mv" -#ifndef CONFIG_SPL_BUILD -#define CONFIG_VID -#endif -#define CONFIG_VOL_MONITOR_IR36021_SET -#define CONFIG_VOL_MONITOR_INA220 /* The lowest and highest voltage allowed for LS1046AQDS */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index c27eb73338..8ed1dceb23 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -9,8 +9,6 @@ #include "ls1046a_common.h" -#define CONFIG_SYS_CLK_FREQ 100000000 - #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 @@ -27,14 +25,6 @@ #define CONFIG_SYS_SPL_ARGS_ADDR 0x90000000 #endif -#ifndef SPL_NO_IFC -/* IFC */ -#define CONFIG_FSL_IFC -/* - * NAND Flash Definitions - */ -#endif - #define CONFIG_SYS_NAND_BASE 0x7e800000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 140362cf4f..2e52108c23 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -49,11 +49,6 @@ #define CPU_RELEASE_ADDR secondary_boot_addr /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* I2C */ @@ -63,11 +58,6 @@ #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) -#if !defined(SPL_NO_IFC) || defined(CONFIG_TARGET_LS1088AQDS) -/* IFC */ -#define CONFIG_FSL_IFC -#endif - /* * During booting, IFC is mapped at the region of 0x30000000. * But this region is limited to 256MB. To accommodate NOR, promjet diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index d001acfd68..5912fe95cc 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -8,22 +8,14 @@ #include "ls1088a_common.h" - -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_QIXIS_I2C_ACCESS #define SYS_NO_FLASH - -#define CONFIG_SYS_CLK_FREQ 100000000 #else #define CONFIG_QIXIS_I2C_ACCESS -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() #endif -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) #define COUNTER_FREQUENCY 25000000 /* 25MHz */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 @@ -298,16 +290,10 @@ unsigned long get_board_sys_clk(void); #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 #define I2C_SVDD_MONITOR_ADDR 0x4F -#define CONFIG_VID_FLS_ENV "ls1088aqds_vdd_mv" -#define CONFIG_VID - /* The lowest and highest voltage allowed for LS1088AQDS */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 -#define CONFIG_VOL_MONITOR_LTC3882_SET -#define CONFIG_VOL_MONITOR_LTC3882_READ - #define PWM_CHANNEL0 0x0 /* @@ -321,9 +307,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_EEPROM_BUS_NUM 0 #ifdef CONFIG_FSL_DSPI -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_SPI_FLASH_SST -#define CONFIG_SPI_FLASH_EON #if !defined(CONFIG_TFABOOT) && \ !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) #endif diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 9351042908..400b8adb24 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -16,7 +16,6 @@ #define SYS_NO_FLASH #endif -#define CONFIG_SYS_CLK_FREQ 100000000 #define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */ #define COUNTER_FREQUENCY 25000000 /* 25MHz */ @@ -197,16 +196,10 @@ #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 #define I2C_SVDD_MONITOR_ADDR 0x4F -#define CONFIG_VID_FLS_ENV "ls1088ardb_vdd_mv" -#define CONFIG_VID - /* The lowest and highest voltage allowed for LS1088ARDB */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 -#define CONFIG_VOL_MONITOR_LTC3882_SET -#define CONFIG_VOL_MONITOR_LTC3882_READ - #define PWM_CHANNEL0 0x0 /* diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 0ca03e0702..eea6ce53db 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -61,11 +61,6 @@ #define COUNTER_FREQUENCY 25000000 /* 25MHz */ /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* I2C */ @@ -74,9 +69,6 @@ #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_serial_clock()) -/* IFC */ -#define CONFIG_FSL_IFC - /* * During booting, IFC is mapped at the region of 0x30000000. * But this region is limited to 256MB. To accommodate NOR, promjet diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index e67dee0f00..b0a05dd807 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -9,18 +9,13 @@ #include "ls2080a_common.h" -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - #ifdef CONFIG_FSL_QSPI #define CONFIG_QIXIS_I2C_ACCESS #define CONFIG_SYS_I2C_IFDR_DIV 0x7e #endif #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 @@ -256,15 +251,7 @@ unsigned long get_board_sys_clk(void); #define I2C_MUX_CH_DEFAULT 0x8 /* SPI */ -#ifdef CONFIG_FSL_DSPI -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_SPI_FLASH_SST -#define CONFIG_SPI_FLASH_EON -#endif -#ifdef CONFIG_FSL_QSPI -#define CONFIG_SPI_FLASH_SPANSION -#endif /* * Verify QSPI when boot from NAND, QIXIS brdcfg9 need configure. * If boot from on-board NAND, ISO1 = 1, ISO2 = 0, IBOOT = 0 @@ -285,9 +272,7 @@ unsigned long get_board_sys_clk(void); */ #define RTC #define CONFIG_RTC_DS3231 1 -#define CONFIG_RTC_ENABLE_32KHZ_OUTPUT #define CONFIG_SYS_I2C_RTC_ADDR 0x68 -#define CONFIG_RTC_ENABLE_32KHZ_OUTPUT /* EEPROM */ #define CONFIG_SYS_I2C_EEPROM_NXID diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 674d27ff8c..a54387e16c 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -17,13 +17,7 @@ #define I2C_MUX_CH_VOL_MONITOR 0xa #define I2C_VOL_MONITOR_ADDR 0x38 -#define CONFIG_VOL_MONITOR_IR36021_READ -#define CONFIG_VOL_MONITOR_IR36021_SET -#define CONFIG_VID_FLS_ENV "ls2080ardb_vdd_mv" -#ifndef CONFIG_SPL_BUILD -#define CONFIG_VID -#endif /* step the IR regulator in 5mV increments */ #define IR_VDD_STEP_DOWN 5 #define IR_VDD_STEP_UP 5 @@ -31,12 +25,7 @@ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 @@ -258,9 +247,6 @@ unsigned long get_board_sys_clk(void); #define I2C_MUX_CH_DEFAULT 0x8 /* SPI */ -#if defined(CONFIG_FSL_DSPI) -#define CONFIG_SPI_FLASH_STMICRO -#endif /* * RTC configuration diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 7294a3c20a..afa0206fb9 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -8,23 +8,8 @@ #define _CONFIG_LSXL_H /* - * Version number information - */ -#if defined(CONFIG_LSCHLV2) -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg -#elif defined(CONFIG_LSXHL) -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg -#else -#error "unknown board" -#endif - -/* * General configuration options */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -#define CONFIG_KW88F6281 /* SOC Name */ - -#define CONFIG_KIRKWOOD_GPIO #include "mv-common.h" diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 0710004776..e285109cbb 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -11,7 +11,6 @@ #include <asm/arch/soc.h> #define CONFIG_REMAKE_ELF -#define CONFIG_FSL_TZPC_BP147 #define CONFIG_FSL_MEMAC #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE @@ -105,7 +104,6 @@ /* PCI */ #ifdef CONFIG_PCI -#define CONFIG_SYS_PCI_64BIT #define CONFIG_PCI_SCAN_SHOW #endif @@ -128,19 +126,7 @@ #endif #endif -/* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif - -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() -#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4) +#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h index a04bbb6e6e..a07ebeb723 100644 --- a/include/configs/lx2160aqds.h +++ b/include/configs/lx2160aqds.h @@ -8,12 +8,6 @@ #include "lx2160a_common.h" -/* VID */ -#define CONFIG_VID_FLS_ENV "lx2160aqds_vdd_mv" -#define CONFIG_VID -#define CONFIG_VOL_MONITOR_LTC3882_SET -#define CONFIG_VOL_MONITOR_LTC3882_READ - /* RTC */ #define CONFIG_SYS_RTC_BUS_NUM 0 diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h index 4fd3e54830..a8a9f8259e 100644 --- a/include/configs/lx2160ardb.h +++ b/include/configs/lx2160ardb.h @@ -8,12 +8,6 @@ #include "lx2160a_common.h" -/* VID */ -#define CONFIG_VID_FLS_ENV "lx2160ardb_vdd_mv" -#define CONFIG_VID -#define CONFIG_VOL_MONITOR_LTC3882_SET -#define CONFIG_VOL_MONITOR_LTC3882_READ - /* RTC */ #define CONFIG_SYS_RTC_BUS_NUM 4 diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h index 67c469c009..c2fa5794c8 100644 --- a/include/configs/lx2162aqds.h +++ b/include/configs/lx2162aqds.h @@ -12,12 +12,6 @@ #undef CONFIG_USB_MAX_CONTROLLER_COUNT #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -/* Voltage monitor on channel 2*/ -#define CONFIG_VID_FLS_ENV "lx2162aqds_vdd_mv" -#define CONFIG_VID -#define CONFIG_VOL_MONITOR_LTC3882_SET -#define CONFIG_VOL_MONITOR_LTC3882_READ - /* RTC */ #define CONFIG_SYS_RTC_BUS_NUM 0 diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 2844553067..c2345e8224 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -11,8 +11,6 @@ #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_FSL_CLK - #define CONFIG_TIMESTAMP /* Print image info with timestamp */ /* @@ -204,9 +202,4 @@ "fi ; " \ "fi\0" -#if defined(CONFIG_SPL_BUILD) -#undef CONFIG_WATCHDOG -#define CONFIG_HW_WATCHDOG -#endif - #endif /* __M53MENLO_CONFIG_H__ */ diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index 84b998e23a..b35ba59aba 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ -#define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Environment in NAND, aligned to start of last sector */ diff --git a/include/configs/meson64.h b/include/configs/meson64.h index cb202d5555..44f2967fc6 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -29,7 +29,6 @@ #define STDIN_CFG "serial" #endif -#define CONFIG_CPU_ARMV8 #define CONFIG_REMAKE_ELF #define CONFIG_SYS_MAXARGS 32 #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/mt8183.h b/include/configs/mt8183.h index ebd2b326ad..2b4e976aa1 100644 --- a/include/configs/mt8183.h +++ b/include/configs/mt8183.h @@ -11,7 +11,6 @@ #include <linux/sizes.h> -#define CONFIG_CPU_ARMV8 #define COUNTER_FREQUENCY 13000000 #define CONFIG_SYS_NS16550_SERIAL diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h index 8882a5a409..9c443db9f5 100644 --- a/include/configs/mt8512.h +++ b/include/configs/mt8512.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M -#define CONFIG_CPU_ARMV8 - #define COUNTER_FREQUENCY 13000000 #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/mt8516.h b/include/configs/mt8516.h index 12840b883d..47132c1db1 100644 --- a/include/configs/mt8516.h +++ b/include/configs/mt8516.h @@ -11,7 +11,6 @@ #include <linux/sizes.h> -#define CONFIG_CPU_ARMV8 #define COUNTER_FREQUENCY 13000000 #define CONFIG_SYS_NS16550_SERIAL diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h index 593c6a11d7..49ee926b0c 100644 --- a/include/configs/mt8518.h +++ b/include/configs/mt8518.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M -#define CONFIG_CPU_ARMV8 - #define COUNTER_FREQUENCY 13000000 /* DRAM definition */ diff --git a/include/configs/mv-plug-common.h b/include/configs/mv-plug-common.h deleted file mode 100644 index d38d9872c0..0000000000 --- a/include/configs/mv-plug-common.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2009-2015 - * Marvell Semiconductor <www.marvell.com> - */ - -#ifndef _CONFIG_MARVELL_PLUG_H -#define _CONFIG_MARVELL_PLUG_H - -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_KW88F6281 1 /* SOC Name */ - -/* - * mv-common.h should be defined after CMD configs since it used them - * to enable certain macros - */ -#include "mv-common.h" - -#endif /* _CONFIG_MARVELL_PLUG_H */ diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index f1a87faaec..fd42d2b0f5 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -12,8 +12,6 @@ /* High Level Configuration Options */ -#define CONFIG_SYS_FSL_CLK - #include <asm/arch/imx-regs.h> /* diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index f03e425297..16c2241fd5 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -14,8 +14,6 @@ #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_FSL_CLK - #define CONFIG_MXC_UART_BASE UART2_BASE #define CONFIG_FPGA_COUNT 1 diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 92c75f5ee8..a972410db7 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -11,8 +11,6 @@ #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_FSL_CLK - #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 80487e099b..8f8dfe94ca 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -11,8 +11,6 @@ #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_FSL_CLK - /* USB Configs */ #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 0ae8305c59..5ff931ee3b 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -27,8 +27,6 @@ #include <asm/arch/imx-regs.h> #include <asm/mach-imx/gpio.h> -#define CONFIG_SYS_FSL_CLK - /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 512 #define CONFIG_SYS_MAXARGS 32 diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 5d74964124..90b053bc20 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -33,8 +33,6 @@ #endif -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -48,7 +46,7 @@ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 5e857bd705..6bcca11c4c 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -30,8 +30,6 @@ #endif #endif -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -44,7 +42,7 @@ "ip_dyn=yes\0" \ "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ @@ -124,8 +122,6 @@ #define CONFIG_IOMUX_LPSR -#define CONFIG_SOFT_SPI - #ifdef CONFIG_CMD_NET #define CONFIG_FEC_ENET_DEV 1 #if (CONFIG_FEC_ENET_DEV == 0) diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index ffe8c758dd..2e976df698 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -17,7 +17,6 @@ #define CONFIG_MXC_GPT_HCLK #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ #define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK -#define CONFIG_SYS_FSL_CLK #define CONFIG_SYS_BOOTM_LEN 0x1000000 diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index f11e2e3f80..a853e2b880 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -17,8 +17,6 @@ /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #ifdef CONFIG_IMX_BOOTAUX /* Set to QSPI1 A flash at default */ #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000 diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index 58d48edac4..8c4d94215b 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -25,7 +25,6 @@ */ #define CONFIG_BOARD_SIZE_LIMIT 785408 #define CONFIG_MMCROOT "/dev/mmcblk0p2" -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG1_RBASE @@ -48,7 +47,7 @@ "fdt_file=imx7ulp-com.dtb\0" \ "fdt_addr=0x63000000\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 7540a7732b..8f2cbc643e 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_BOOTM_LEN 0x1000000 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG1_RBASE @@ -48,7 +47,7 @@ "earlycon=lpuart32,0x402D0010\0" \ "ip_dyn=yes\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ diff --git a/include/configs/nas220.h b/include/configs/nas220.h index 9f89cca0b0..815f81f649 100644 --- a/include/configs/nas220.h +++ b/include/configs/nas220.h @@ -11,12 +11,6 @@ #ifndef _CONFIG_NAS220_H #define _CONFIG_NAS220_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 /* #define CPU Core subversion */ -#define CONFIG_KW88F6192 /* SOC Name */ - /* power-on led, regulator, sata0, sata1 */ #define NAS220_GE_OE_VAL_LOW ((1 << 12)|(1 << 14)|(1 << 24)|(1 << 28)) #define NAS220_GE_OE_VAL_HIGH (0) @@ -60,15 +54,7 @@ #endif /* CONFIG_CMD_NET */ /* - * File system - */ -#define CONFIG_JFFS2_NAND -#define CONFIG_JFFS2_LZO - -/* * EFI partition */ -#define CONFIG_KIRKWOOD_GPIO - #endif /* _CONFIG_NAS220_H */ diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index c575798bf0..081101941a 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -21,7 +21,6 @@ /* * High Level Configuration Options */ -#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap.h> diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index cf52a6d0f0..8cc9ca6a49 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -9,11 +9,6 @@ #ifndef _CONFIG_NSA310S_H #define _CONFIG_NSA310S_H -/* high level configuration options */ -#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ -#define CONFIG_KW88F6192 1 /* SOC Name */ -#define CONFIG_KW88F6702 1 /* SOC Name */ - #include "mv-common.h" /* environment variables configuration */ @@ -41,9 +36,4 @@ #define CONFIG_LBA48 #endif /* CONFIG_SATA */ -/* RTC driver configuration */ -#ifdef CONFIG_CMD_DATE -#define CONFIG_RTC_MV -#endif /* CONFIG_CMD_DATE */ - #endif /* _CONFIG_NSA310S_H */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index bc21b795cf..536dff2bdf 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -7,8 +7,6 @@ #ifndef __OCTEONTX2_COMMON_H__ #define __OCTEONTX2_COMMON_H__ -#define CONFIG_SUPPORT_RAW_INITRD - /** Maximum size of image supported for bootm (and bootable FIT images) */ #define CONFIG_SYS_BOOTM_LEN (256 << 20) @@ -43,7 +41,6 @@ #if defined(CONFIG_MMC_OCTEONTX) #define MMC_SUPPORTS_TUNING /** EMMC specific defines */ -#define CONFIG_SUPPORT_EMMC_RPMB #endif #endif /* __OCTEONTX2_COMMON_H__ */ diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 46908be32a..8185f4b625 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -61,12 +61,6 @@ # define CONFIG_SYS_64BIT_LBA #endif -/***** SPI Defines *********/ -#ifdef CONFIG_DM_SPI_FLASH -# define CONFIG_SF_DEFAULT_BUS 0 -# define CONFIG_SF_DEFAULT_CS 0 -#endif - /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /** Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE @@ -76,9 +70,6 @@ #define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192 /** EMMC specific defines */ -#if defined(CONFIG_MMC_OCTEONTX) -#define CONFIG_SUPPORT_EMMC_RPMB -#endif #if defined(CONFIG_NAND_OCTEONTX) /*#define CONFIG_MTD_CONCAT */ diff --git a/include/configs/odroid.h b/include/configs/odroid.h index 1a63f46160..ed9b41d179 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -13,7 +13,6 @@ #include <configs/exynos4-common.h> -#define CONFIG_SYS_L2CACHE_OFF #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 70481b5d0c..a4825982a8 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -80,8 +80,6 @@ * Need to override existing one (smdk5420) with odroid so set_board_info will * use proper prefix when creating full board_name (SYS_BOARD + type) */ -#undef CONFIG_SYS_BOARD -#define CONFIG_SYS_BOARD "odroid" /* Define new extra env settings, including DFU settings */ #undef CONFIG_EXTRA_ENV_SETTINGS diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index bc707ebfdc..45297b9a61 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -17,7 +17,6 @@ /* * SoC Configuration */ -#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) diff --git a/include/configs/openrd.h b/include/configs/openrd.h index bd27e503ca..43d089657b 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -13,12 +13,6 @@ #ifndef _CONFIG_OPENRD_H #define _CONFIG_OPENRD_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ -#define CONFIG_KW88F6281 1 /* SOC Name */ - #include "mv-common.h" /* diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 365f61bef8..2e1331b9b0 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -102,12 +102,10 @@ #define CONFIG_SPL_NAND_INIT #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SPL_MAX_SIZE (128 << 10) -#define CONFIG_TPL_TEXT_BASE 0xf8f81000 #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) -#define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10) #elif defined(CONFIG_SPL_BUILD) #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE @@ -116,7 +114,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 #define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (128 << 10) #endif /* not CONFIG_TPL_BUILD */ #define CONFIG_SPL_PAD_TO 0x20000 @@ -130,7 +127,7 @@ #ifndef CONFIG_SYS_MONITOR_BASE #ifdef CONFIG_TPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_TPL_TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE 0xf8f81000 #elif defined(CONFIG_SPL_BUILD) #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE #else @@ -140,17 +137,10 @@ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_LBA48 -#if defined(CONFIG_TARGET_P2020RDB) -#define CONFIG_SYS_CLK_FREQ 100000000 -#else -#define CONFIG_SYS_CLK_FREQ 66666666 -#endif - #define CONFIG_HWCONFIG /* * These can be toggled for performance analysis, otherwise use default. @@ -534,7 +524,6 @@ #if defined(CONFIG_HAS_FSL_DR_USB) #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#define CONFIG_USB_EHCI_FSL #endif #endif @@ -546,8 +535,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #endif -#undef CONFIG_WATCHDOG /* watchdog disabled */ - /* * Miscellaneous configurable options */ diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h index 7f05bebbcd..b03d3a433b 100644 --- a/include/configs/p3450-0000.h +++ b/include/configs/p3450-0000.h @@ -24,12 +24,8 @@ func(DHCP, dhcp, na) /* Environment at end of QSPI, in the VER partition */ -#define CONFIG_ENV_SPI_MAX_HZ 48000000 -#define CONFIG_ENV_SPI_MODE SPI_MODE_0 #define CONFIG_SPI_FLASH_SIZE (4 << 20) -#define CONFIG_PREBOOT - #define BOARD_EXTRA_ENV_SETTINGS \ "preboot=if test -e mmc 1:1 /u-boot-preboot.scr; then " \ "load mmc 1:1 ${scriptaddr} /u-boot-preboot.scr; " \ diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index a9797362a8..7438d0a464 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -14,8 +14,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SPL_MAX_SIZE (148 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -39,7 +37,7 @@ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "ip_dyn=yes\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=2\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} " \ @@ -97,6 +95,5 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #endif /* __PHYCORE_IMX8MM_H */ diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 7ca3965fc6..8c5ffeef54 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -14,8 +14,6 @@ #define CONFIG_SPL_MAX_SIZE (152 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -39,7 +37,7 @@ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "ip_dyn=yes\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=2\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} " \ @@ -97,6 +95,5 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #endif /* __PHYCORE_IMX8MP_H */ diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index cc2e6a7ae8..3624c122fc 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -33,9 +33,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) -#define CONFIG_SYS_ENV_ADDR 0x88300000 -#define CONFIG_SYS_FDT_ADDR 0x89d00000 - /* Memory Test */ /*---------------------------------------------------------------------- @@ -74,8 +71,8 @@ #define MEM_LAYOUT_ENV_SETTINGS \ "kernel_addr_r="__stringify(CONFIG_SYS_LOAD_ADDR)"\0" \ - "fdt_addr_r="__stringify(CONFIG_SYS_FDT_ADDR)"\0" \ - "scriptaddr="__stringify(CONFIG_SYS_ENV_ADDR)"\0" + "fdt_addr_r=0x89d00000\0" \ + "scriptaddr=0x88300000\0" \ #define CONFIG_LEGACY_BOOTCMD_ENV \ "legacy_bootcmd= " \ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 3fe178316f..6e1c382648 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -64,8 +64,6 @@ "bootmenu_2=Boot using PICO-Pi baseboard=" \ "setenv fdtfile imx6ul-pico-pi.dtb\0" \ -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index cbac950549..6137f21bba 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -65,9 +65,6 @@ BOOTENV #endif - -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ "splashpos=m,m\0" \ diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index f1b406f0a8..2293a2919e 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -11,8 +11,6 @@ #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ @@ -56,7 +54,7 @@ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ @@ -97,10 +95,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - (PHYS_SDRAM_SIZE >> 1)) - #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR /* Monitor Command Prompt */ @@ -113,12 +107,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - -#define CONFIG_MXC_GPIO - -#define CONFIG_OF_SYSTEM_SETUP - #define CONFIG_SYS_BOOTM_LEN SZ_128M #endif diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 7fc06e8326..9a4a632a52 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ -#define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Environment in NAND, aligned to start of last sector */ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index d4f7870298..e9eb736ecb 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -179,11 +179,6 @@ #endif -#define CONFIG_JFFS2_NAND 1 -#define CONFIG_JFFS2_DEV "nand0" /* NAND device jffs2 lives on */ -#define CONFIG_JFFS2_PART_OFFSET 0 /* start of jffs2 partition */ -#define CONFIG_JFFS2_PART_SIZE (256 * 1024 * 1024) /* partition size*/ - /* PSRAM */ #define PHYS_PSRAM 0x70000000 #define PHYS_PSRAM_SIZE 0x00400000 /* 4MB */ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index eab3825021..b205391642 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -45,7 +45,6 @@ #define CONFIG_SYS_NAND_MASK_CLE BIT(22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD3 -#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT #endif /* Ethernet */ diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h index 196e362bd7..3e94125cb3 100644 --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h @@ -12,12 +12,6 @@ #ifndef _CONFIG_POGO_E02_H #define _CONFIG_POGO_E02_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -#define CONFIG_KW88F6281 /* SOC Name */ - #include "mv-common.h" /* diff --git a/include/configs/porter.h b/include/configs/porter.h index 7ffcf5fc38..867dadaedd 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -35,8 +35,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 3df51437ca..928ccb1e18 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -10,8 +10,6 @@ #define CONFIG_REMAKE_ELF -#define CONFIG_SUPPORT_RAW_INITRD - #define CONFIG_SYS_INIT_SP_ADDR 0x00100000 #define CONFIG_SYS_BOOTM_LEN 0x00c00000 diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 169d79c1fa..e257c0ec1f 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_RAMBOOT -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ - #define CONFIG_ENABLE_36BIT_PHYS /* Needed to fill the ccsrbar pointer */ @@ -47,8 +45,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_CHIP_SELECTS_PER_CTRL 0 -#define CONFIG_SYS_CLK_FREQ 33000000 - #define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 1dd83dbf64..8e86830e61 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -1,7 +1,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_CPU_SH7751 1 #define __LITTLE_ENDIAN__ 1 /* SCIF */ @@ -29,7 +28,6 @@ /* * SuperH Clock setting */ -#define CONFIG_SYS_CLK_FREQ 60000000 #define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */ /* diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 595482c22e..f1f5d07bf8 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -42,6 +42,6 @@ #define CONFIG_TMU_TIMER #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ -#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 8) +#define CONFIG_SYS_TIMER_RATE (get_board_sys_clk() / 8) #endif /* __RCAR_GEN2_COMMON_H */ diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index b133d8ec48..00c453d739 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -12,7 +12,6 @@ #define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 8b7a0bbbca..97caceacfe 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -13,7 +13,6 @@ #define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index e7c09645ec..7449e816b7 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -22,7 +22,6 @@ /* spl size 32kb sram - 2kb bootrom */ #define CONFIG_SPL_MAX_SIZE (0x8000 - 0x800) -#define CONFIG_ROCKCHIP_SERIAL 1 #define CONFIG_SPL_STACK 0x10087fff diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index a46b1ffe86..ef55ef0a83 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -13,7 +13,6 @@ #define CONFIG_ROCKCHIP_STIMER_BASE 0x110d0020 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_SYS_INIT_SP_ADDR 0x61100000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index abbb27395e..490da7cb23 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -15,7 +15,6 @@ #define CONFIG_ROCKCHIP_STIMER_BASE 0xff810020 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 496f4628d3..1664707ca6 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -12,7 +12,6 @@ #define CONFIG_SPL_MAX_SIZE 0x20000 #define CONFIG_SPL_BSS_START_ADDR 0x00400000 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 #define CONFIG_SYS_NS16550_MEM32 diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index 2e94613c37..207ad00766 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -104,16 +104,6 @@ (void *)PHY_BASEADDR_UART3} /*----------------------------------------------------------------------- - * PLL - */ -#define CONFIG_SYS_PLLFIN 24000000UL - -/*----------------------------------------------------------------------- - * Timer - */ -#define CONFIG_TIMER_SYS_TICK_CH 0 - -/*----------------------------------------------------------------------- * BACKLIGHT */ #ifndef CONFIG_S5P4418_ONEWIRE diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 14840a453a..e3b091a937 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -18,9 +18,6 @@ #include <linux/sizes.h> #include <asm/arch/cpu.h> /* get chip and board defs */ -/* input clock of PLL: has 24MHz input clock at S5PC110 */ -#define CONFIG_SYS_CLK_FREQ_C110 24000000 - /* DRAM Base */ #define CONFIG_SYS_SDRAM_BASE 0x30000000 diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 680f6ce60b..29adab3392 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -14,7 +14,6 @@ #define CONFIG_TIZEN /* TIZEN lib */ /* Keep L2 Cache Disabled */ -#define CONFIG_SYS_L2CACHE_OFF 1 /* Universal has 2 banks of DRAM */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 @@ -104,11 +103,6 @@ #define CONFIG_USB_GADGET_DWC2_OTG_PHY -/* - * SPI Settings - */ -#define CONFIG_SOFT_SPI - #ifndef __ASSEMBLY__ void universal_spi_scl(int bit); void universal_spi_sda(int bit); diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index 1eafff10ff..c29b34e231 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -23,7 +23,6 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index a62a5fa418..c3a5c2ae32 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -25,11 +25,6 @@ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) #endif -/* NAND flash */ - -/* SPI flash */ -#define CONFIG_SF_DEFAULT_SPEED 66000000 - #ifdef CONFIG_SD_BOOT /* u-boot env in sd/mmc card */ #define FAT_ENV_INTERFACE "mmc" diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index 34fd272467..11c13c65d8 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -30,12 +30,6 @@ #endif -#ifdef CONFIG_QSPI_BOOT -#undef CONFIG_ENV_SPI_BUS -#define CONFIG_ENV_SPI_BUS 1 - -#endif - /* SPL */ #define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index c51517a76b..e6c200f761 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -27,7 +27,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ /* NAND support */ -#define CONFIG_TEGRA_NAND /* Max number of NAND devices */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index bb7ce8d3ed..8dba4fcb4f 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -9,12 +9,7 @@ #ifndef _CONFIG_SHEEVAPLUG_H #define _CONFIG_SHEEVAPLUG_H -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ - -#include "mv-plug-common.h" +#include "mv-common.h" /* * Environment variables configurations diff --git a/include/configs/siemens-ccp-common.h b/include/configs/siemens-ccp-common.h deleted file mode 100644 index 01051c8ad7..0000000000 --- a/include/configs/siemens-ccp-common.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* Be very careful updating CONFIG_IDENT_STRING - * This string will control the update flow whether an U-Boot should be - * updated or not. If the version of installed U-Boot (in flash) is smaller - * than the version to be installed (from update file), an update will - * be performed. - * - * General rules: - * 1. First 4 characters ' ##v' or IDENT_MAGIC represent kind of a magic number - * to identify the following strings after easily. Don't change them! - * - * 2. First 2 digits after 'v' or CCP_MAJOR are updated with U-Boot version - * change, e.g. from 2015.04 to 2018.03 - * - * 3. Second 2 digits after '.' or CCP_MINOR are updated if we want to upgrade - * U-Boot within an U-Boot version. - */ -#define CCP_IDENT_MAGIC " ##v" -#define GENERATE_CCP_VERSION(MAJOR, MINOR) CCP_IDENT_MAGIC MAJOR "." MINOR diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 85356789ef..920f3140f6 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -74,10 +74,6 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ BOOTENV \ BOOTENV_SF - -#define CONFIG_PREBOOT \ - "setenv fdt_addr ${fdtcontroladdr};" \ - "fdt addr ${fdtcontroladdr};" #endif #endif /* __CONFIG_H */ diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index f68d7d7676..30adfe948f 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -32,8 +32,6 @@ #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 -#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit resources */ - #define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 /* Environment options */ @@ -72,10 +70,6 @@ "partitions=" PARTS_DEFAULT "\0" \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ BOOTENV - -#define CONFIG_PREBOOT \ - "setenv fdt_addr ${fdtcontroladdr};" \ - "fdt addr ${fdtcontroladdr};" #endif /* CONFIG_SPL_BUILD */ #define CONFIG_SYS_EEPROM_BUS_NUM 0 diff --git a/include/configs/silk.h b/include/configs/silk.h index eee60fdfab..29350a635b 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -35,8 +35,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 8fdb692713..28ff48bf3d 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -22,7 +22,6 @@ #include <asm/arch/cpu.h> /* get chip and board defs */ /* input clock of PLL: SMDKC100 has 12MHz input clock */ -#define CONFIG_SYS_CLK_FREQ 12000000 /* DRAM Base */ #define CONFIG_SYS_SDRAM_BASE 0x30000000 diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 47d4f68778..a7f7756604 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -16,7 +16,6 @@ /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index de918e7680..3889a88ae9 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -45,9 +45,6 @@ #define CONFIG_AT91_WANTS_COMMON_PHY #define CONFIG_TFTP_PORT -/* MMC */ -#define CONFIG_GENERIC_ATMEL_MCI - /* LCD */ #define CONFIG_ATMEL_LCD #define CONFIG_GURNARD_SPLASH diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 9ce5fa62d5..0935eaedac 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -95,7 +95,4 @@ /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> -#undef CONFIG_WATCHDOG_TIMEOUT_MSECS -#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000 - #endif /* __CONFIG_SOCFPGA_SECU1_H__ */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 31f95f52f8..155aece4c3 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -187,10 +187,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif -#else -#ifndef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 -#endif #endif /* SPL QSPI boot support */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 4d7072c4db..928582ab8c 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -60,7 +60,6 @@ /* Flash device info */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_MTD_PARTITIONS #define MTDIDS_DEFAULT "nor0=ff705000.spi.0" #endif /* CONFIG_SPL_BUILD */ @@ -148,7 +147,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * L4 Watchdog */ #ifndef CONFIG_SPL_BUILD -#undef CONFIG_HW_WATCHDOG #undef CONFIG_DESIGNWARE_WATCHDOG #endif #define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS diff --git a/include/configs/socrates.h b/include/configs/socrates.h index b7296daa37..15e93d044e 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -38,10 +38,6 @@ * in the README.mpc85xxads. */ -#ifndef CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_CLK_FREQ 66666666 -#endif - /* * These can be toggled for performance analysis, otherwise use default. */ @@ -181,8 +177,6 @@ */ #define CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_WATCHDOG /* watchdog disabled */ - /* * Miscellaneous configurable options */ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 1a5cf6b781..18a57f2231 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -41,9 +41,6 @@ #define CONFIG_RTC_MCFRRTC #define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000 -/* spi not partitions */ -#define CONFIG_JFFS2_DEV "nor0" - /* Timer */ #define CONFIG_MCFTMR diff --git a/include/configs/stout.h b/include/configs/stout.h index a1e7e86f39..df2d9676b5 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -39,8 +39,6 @@ #define CONFIG_BITBANGMII_MULTI /* Board Clock */ -#define RMOBILE_XTAL_CLK 20000000u -#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 3d099b4f11..0409589152 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -41,15 +41,11 @@ #define CONFIG_SYS_FLASH_BASE (0x08000000) #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + (512 * 1024)) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_SIZE) - #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_MAXARGS 128 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */ -/* #define CONFIG_SYS_PCI_64BIT 1 */ #define DEFAULT_DFU_ALT_INFO "dfu_alt_info=" \ "mtd nor1=u-boot.bin raw 200000 100000;" \ diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h deleted file mode 100644 index a47e2c5b28..0000000000 --- a/include/configs/tam3517-common.h +++ /dev/null @@ -1,281 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * Copyright (C) 2009 TechNexion Ltd. - */ - -#ifndef __TAM3517_H -#define __TAM3517_H - -/* - * High Level Configuration Options - */ - -#include <asm/arch/cpu.h> /* get chip and board defs */ -#include <asm/arch/omap.h> - -/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - -/* - * DDR related - */ -#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) - -/* - * Hardware drivers - */ - -/* - * NS16550 Configuration - */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ - -/* - * select serial console configuration - */ -#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 - -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ - 115200} - -#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 - -/* - * Board NAND Info. - */ -#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ - /* to access */ - /* nand at CS0 */ - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ - /* NAND devices */ - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ - -#define CONFIG_SYS_MAXARGS 32 /* max number of command */ - /* args */ - -/* - * AM3517 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ - -/* - * Physical Memory Map - */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 - -/* - * FLASH and environment organization - */ - -/* **** PISMO SUPPORT *** */ - -/* Redundant Environment */ -#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -/* - * ethernet support, EMAC - * - */ -#define CONFIG_NET_RETRY_COUNT 10 - -/* Defines for SPL */ -#define CONFIG_SPL_CONSOLE -#define CONFIG_SPL_NAND_SOFTECC -#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ - -#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ - CONFIG_SPL_TEXT_BASE) -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK - -#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 -#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 - -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - -/* FAT */ -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" -#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" - -/* RAW SD card / eMMC */ -#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ - -/* NAND boot config */ -#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ - 48, 49, 50, 51, 52, 53, 54, 55,\ - 56, 57, 58, 59, 60, 61, 62, 63} -#define CONFIG_SYS_NAND_ECCSIZE 256 -#define CONFIG_SYS_NAND_ECCBYTES 3 - -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE - -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 - -/* Setup MTD for NAND on the SOM */ - -#define CONFIG_TAM3517_SETTINGS \ - "netdev=eth0\0" \ - "nandargs=setenv bootargs root=${nandroot} " \ - "rootfstype=${nandrootfstype}\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "addip_sta=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off panic=1\0" \ - "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ - "addip=if test -n ${ipdyn};then run addip_dyn;" \ - "else run addip_sta;fi\0" \ - "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ - "addtty=setenv bootargs ${bootargs}" \ - " console=ttyO0,${baudrate}\0" \ - "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ - "loadaddr=82000000\0" \ - "kernel_addr_r=82000000\0" \ - "hostname=" CONFIG_HOSTNAME "\0" \ - "bootfile=" CONFIG_HOSTNAME "/uImage\0" \ - "flash_self=run ramargs addip addtty addmtd addmisc;" \ - "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ - "bootm ${kernel_addr}\0" \ - "nandboot=run nandargs addip addtty addmtd addmisc;" \ - "nand read ${kernel_addr_r} kernel\0" \ - "bootm ${kernel_addr_r}\0" \ - "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ - "run nfsargs addip addtty addmtd addmisc;" \ - "bootm ${kernel_addr_r}\0" \ - "net_self=if run net_self_load;then " \ - "run ramargs addip addtty addmtd addmisc;" \ - "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ - "else echo Images not loades;fi\0" \ - "u-boot=" CONFIG_HOSTNAME "/u-boot.img\0" \ - "load=tftp ${loadaddr} ${u-boot}\0" \ - "loadmlo=tftp ${loadaddr} ${mlo}\0" \ - "mlo=" CONFIG_HOSTNAME "/MLO\0" \ - "uboot_addr=0x80000\0" \ - "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ - "nand write ${loadaddr} ${uboot_addr} 80000\0" \ - "updatemlo=nandecc hw;nand erase 0 20000;" \ - "nand write ${loadaddr} 0 20000\0" \ - "upd=if run load;then echo Updating u-boot;if run update;" \ - "then echo U-Boot updated;" \ - "else echo Error updating u-boot !;" \ - "echo Board without bootloader !!;" \ - "fi;" \ - "else echo U-Boot not downloaded..exiting;fi\0" \ - -/* - * this is common code for all TAM3517 boards. - * MAC address is stored from manufacturer in - * I2C EEPROM - */ -#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) -/* - * The I2C EEPROM on the TAM3517 contains - * mac address and production data - */ -struct tam3517_module_info { - char customer[48]; - char product[48]; - - /* - * bit 0~47 : sequence number - * bit 48~55 : week of year, from 0. - * bit 56~63 : year - */ - unsigned long long sequence_number; - - /* - * bit 0~7 : revision fixed - * bit 8~15 : revision major - * bit 16~31 : TNxxx - */ - unsigned int revision; - unsigned char eth_addr[4][8]; - unsigned char _rev[100]; -}; - -#define TAM3517_READ_EEPROM(info, ret) \ -do { \ - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \ - if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \ - (void *)info, sizeof(*info))) \ - ret = 1; \ - else \ - ret = 0; \ -} while (0) - -#define TAM3517_READ_MAC_FROM_EEPROM(info) \ -do { \ - char buf[80], ethname[20]; \ - int i; \ - memset(buf, 0, sizeof(buf)); \ - for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \ - sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \ - (info)->eth_addr[i][5], \ - (info)->eth_addr[i][4], \ - (info)->eth_addr[i][3], \ - (info)->eth_addr[i][2], \ - (info)->eth_addr[i][1], \ - (info)->eth_addr[i][0]); \ - \ - if (i) \ - sprintf(ethname, "eth%daddr", i); \ - else \ - strcpy(ethname, "ethaddr"); \ - printf("Setting %s from EEPROM with %s\n", ethname, buf);\ - env_set(ethname, buf); \ - } \ -} while (0) - -/* The following macros are taken from Technexion's documentation */ -#define TAM3517_sequence_number(info) \ - ((info)->sequence_number % 0x1000000000000LL) -#define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100) -#define TAM3517_year(info) ((info)->sequence_number >> 56) -#define TAM3517_revision_fixed(info) ((info)->revision % 0x100) -#define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100) -#define TAM3517_revision_tn(info) ((info)->revision >> 16) - -#define TAM3517_PRINT_SOM_INFO(info) \ -do { \ - printf("Vendor:%s\n", (info)->customer); \ - printf("SOM: %s\n", (info)->product); \ - printf("SeqNr: %02llu%02llu%012llu\n", \ - TAM3517_year(info), \ - TAM3517_week_of_year(info), \ - TAM3517_sequence_number(info)); \ - printf("Rev: TN%u %u.%u\n", \ - TAM3517_revision_tn(info), \ - TAM3517_revision_major(info), \ - TAM3517_revision_fixed(info)); \ -} while (0) - -#endif - -#endif /* __TAM3517_H */ diff --git a/include/configs/tec.h b/include/configs/tec.h index aa9665eab5..432ccbdc32 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ -#define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Environment in NAND, aligned to start of last sector */ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 673056ce51..99b7bd07aa 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -12,7 +12,6 @@ /* * High Level Configuration Options */ -#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ #include <asm/arch/tegra.h> /* get chip and board defs */ diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 063213cbfe..fac8692728 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -79,6 +79,4 @@ */ #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 -#define CONFIG_SYS_NAND_SELF_INIT - #endif /* _TEGRA20_COMMON_H_ */ diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 44dca25b43..533673ba5d 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -27,7 +27,6 @@ /** * Platform/Board specific defs */ -#define CONFIG_SYS_CLK_FREQ 27000000 #define CONFIG_SYS_TIMERBASE 0x4802E000 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ diff --git a/include/configs/trats.h b/include/configs/trats.h index d34b9e8e6c..5217400b6b 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -15,7 +15,6 @@ #define CONFIG_TIZEN /* TIZEN lib */ -#define CONFIG_SYS_L2CACHE_OFF #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 32e7b91de9..8d4b782372 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -14,7 +14,6 @@ #define CONFIG_TIZEN /* TIZEN lib */ -#define CONFIG_SYS_L2CACHE_OFF #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h index 1ce844f492..bdd6b4b0d9 100644 --- a/include/configs/ulcb.h +++ b/include/configs/ulcb.h @@ -23,7 +23,6 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index b91b0db2c4..fb7b83d285 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -198,6 +198,4 @@ #define CONFIG_SPL_PAD_TO 0x20000 -#define CONFIG_SYS_PCI_64BIT - #endif /* __CONFIG_UNIPHIER_H__ */ diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 77da2bfdd7..0faa656bc6 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -10,8 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_FSL_CLK - #include <asm/arch/imx-regs.h> /* U-Boot environment */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 7fbec270bf..17583c0a6a 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -11,8 +11,6 @@ #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -103,7 +101,6 @@ /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 /* ENET */ #define CONFIG_ETHPRIME "FEC" diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 990f5ed547..91d50bc4a0 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -109,8 +109,6 @@ /* Board info register */ #define SYS_ID V2M_SYSREGS -#define CONFIG_SYS_L2CACHE_OFF 1 - #define SCTL_BASE V2M_SYSCTL #define VEXPRESS_FLASHPROG_FLVPPEN (1 << 0) diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index c42db3686f..d90c2fa053 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -11,8 +11,6 @@ #include <asm/arch/imx-regs.h> #include <linux/stringify.h> -#define CONFIG_SYS_FSL_CLK - /* NAND support */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/vinco.h b/include/configs/vinco.h index 49679312e4..7bd48820ed 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -34,13 +34,11 @@ #ifdef CONFIG_CMD_SF #define CONFIG_ATMEL_SPI0 -#define CONFIG_SPI_FLASH_STMICRO #endif /* MMC */ #ifdef CONFIG_CMD_MMC -#define CONFIG_GENERIC_ATMEL_MCI #define ATMEL_BASE_MMCI 0xfc000000 #define CONFIG_SYS_MMC_CLK_OD 500000 diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index 58888d4caf..c60da8ac12 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_NS16550_CLK 40000000 #define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_SYS_NS16550_COM3 0xb0000e00 -#define CONFIG_CONS_INDEX 3 /* RAM */ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index 33eef9016b..83ee1784ce 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -16,7 +16,6 @@ /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_DFU_ENV_SETTINGS \ "dfu_alt_info=boot raw 0x2 0x1000 mmcpart 1\0" \ @@ -40,12 +39,12 @@ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "fdt_file=imx7s-warp.dtb\0" \ - "fdt_addr=" __stringify(CONFIG_SYS_FDT_ADDR)"\0" \ + "fdt_addr=0x83000000\0" \ "fdtovaddr=0x83100000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "rootpart=" __stringify(CONFIG_WARP7_ROOT_PART) "\0" \ "finduuid=part uuid mmc 0:${rootpart} uuid\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index a45d3b4547..a43fd81e45 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -55,7 +55,6 @@ */ /* driver configuration */ -#define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_MAX_NAND_CHIPS 1 #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE @@ -64,8 +63,6 @@ * GPIO */ -#define CONFIG_LPC32XX_GPIO - /* * Environment */ diff --git a/include/configs/xea.h b/include/configs/xea.h index 5b968f0820..aa48bb9263 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -29,10 +29,6 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (SZ_32K / 0x200) #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR (SZ_1M / 0x200) -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SPI_FLASH_MTD -#endif - /* Memory configuration */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */ diff --git a/include/configs/xenguest_arm64.h b/include/configs/xenguest_arm64.h index c5e3d1678d..408c7b5dd6 100644 --- a/include/configs/xenguest_arm64.h +++ b/include/configs/xenguest_arm64.h @@ -11,17 +11,8 @@ #define CONFIG_EXTRA_ENV_SETTINGS -#undef CONFIG_NR_DRAM_BANKS #undef CONFIG_SYS_SDRAM_BASE -#define CONFIG_NR_DRAM_BANKS 1 - -/* - * This can be any arbitrary address as we are using PIE, but - * please note, that CONFIG_SYS_TEXT_BASE must match the below. - */ -#define CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE CONFIG_SYS_LOAD_ADDR - /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_MAXARGS 64 @@ -29,8 +20,6 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_OF_SYSTEM_SETUP - #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ "loadimage=ext4load pvblock 0 0x90000000 /boot/Image;\0" \ diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 43486457a4..03539a41b4 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -26,8 +26,6 @@ #endif /* Serial setup */ -#define CONFIG_CPU_ARMV8 - #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index e214805787..f4b7f305bf 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -26,8 +26,6 @@ #endif /* Serial setup */ -#define CONFIG_CPU_ARMV8 - #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } @@ -39,10 +37,6 @@ # define CONFIG_SYS_MAX_NAND_DEVICE 1 #endif -#if defined(CONFIG_SPL_BUILD) -#define CONFIG_ZYNQMP_PSU_INIT_ENABLED -#endif - /* Miscellaneous configurable options */ #if defined(CONFIG_ZYNQMP_USB) diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h index 6d5b81e05e..3ec99e062d 100644 --- a/include/configs/xilinx_zynqmp_r5.h +++ b/include/configs/xilinx_zynqmp_r5.h @@ -8,9 +8,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS -/* CPU clock */ -#define CONFIG_CPU_FREQ_HZ 500000000 - /* Serial drivers */ /* The following table includes the supported baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index f6645a7294..6d621f24bd 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -48,8 +48,6 @@ #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - #define CONFIG_UBOOT_SECTOR_START 0x2 #define CONFIG_UBOOT_SECTOR_COUNT 0x3fe @@ -64,7 +62,7 @@ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcpart=1\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index ccc90a66f7..c8a6e9a61a 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -22,9 +22,6 @@ #define CONFIG_XTFPGA -/* FPGA CPU freq after init */ -#define CONFIG_SYS_CLK_FREQ (gd->cpu_clk) - /*===================*/ /* RAM Layout */ /*===================*/ @@ -169,7 +166,7 @@ #define CONFIG_SYS_NS16550_COM1 IOADDR(0x0D050020) /* Base address */ /* Input clk to NS16550 (in Hz; the SYS_CLK_FREQ is in kHz) */ -#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_CLK_FREQ +#define CONFIG_SYS_NS16550_CLK get_board_sys_clk() /*======================*/ /* Ethernet Driver Info */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 4de2f94b04..88c6490d81 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -9,15 +9,9 @@ #ifndef __CONFIG_ZYNQ_COMMON_H #define __CONFIG_ZYNQ_COMMON_H -/* CPU clock */ -#ifndef CONFIG_CPU_FREQ_HZ -# define CONFIG_CPU_FREQ_HZ 800000000 -#endif - #define CONFIG_REMAKE_ELF /* Cache options */ -#define CONFIG_SYS_L2CACHE_OFF #ifndef CONFIG_SYS_L2CACHE_OFF # define CONFIG_SYS_L2_PL310 # define CONFIG_SYS_PL310_BASE 0xf8f02000 diff --git a/include/faraday/ftwdt010_wdt.h b/include/faraday/ftwdt010_wdt.h index 20bf6d3125..804907d645 100644 --- a/include/faraday/ftwdt010_wdt.h +++ b/include/faraday/ftwdt010_wdt.h @@ -16,6 +16,8 @@ #ifndef __FTWDT010_H #define __FTWDT010_H +#include <clock_legacy.h> + struct ftwdt010_wdt { unsigned int wdcounter; /* Counter Reg - 0x00 */ unsigned int wdload; /* Counter Auto Reload Reg - 0x04 */ @@ -82,10 +84,10 @@ struct ftwdt010_wdt { /* * Variable timeout should be set in ms. - * (CONFIG_SYS_CLK_FREQ/1000) equals 1 ms. + * (get_board_sys_clk()/1000) equals 1 ms. * WDLOAD = timeout * TIMEOUT_FACTOR. */ -#define FTWDT010_TIMEOUT_FACTOR (CONFIG_SYS_CLK_FREQ / 1000) /* 1 ms */ +#define FTWDT010_TIMEOUT_FACTOR (get_board_sys_clk() / 1000) /* 1 ms */ void ftwdt010_wdt_reset(void); void ftwdt010_wdt_disable(void); diff --git a/include/mpc85xx.h b/include/mpc85xx.h index ce6d083eff..2c69a60de6 100644 --- a/include/mpc85xx.h +++ b/include/mpc85xx.h @@ -60,8 +60,4 @@ CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead." #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \ CONFIG_SYS_CCSRBAR_PHYS_LOW) -#ifndef CONFIG_SYS_IMMR -#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR -#endif - #endif /* __MPC85xx_H__ */ diff --git a/include/nand.h b/include/nand.h index 09dbda4e81..70c1286ccb 100644 --- a/include/nand.h +++ b/include/nand.h @@ -10,22 +10,6 @@ #include <config.h> -/* - * All boards using a given driver must convert to self-init - * at the same time, so do it here. When all drivers are - * converted, this will go away. - */ -#ifdef CONFIG_SPL_BUILD -#if defined(CONFIG_NAND_FSL_ELBC) || defined(CONFIG_NAND_FSL_IFC) -#define CONFIG_SYS_NAND_SELF_INIT -#endif -#else -#if defined(CONFIG_NAND_FSL_ELBC) || defined(CONFIG_NAND_ATMEL)\ - || defined(CONFIG_NAND_FSL_IFC) -#define CONFIG_SYS_NAND_SELF_INIT -#endif -#endif - extern void nand_init(void); unsigned long nand_size(void); @@ -34,7 +18,7 @@ unsigned long nand_size(void); int nand_mtd_to_devnum(struct mtd_info *mtd); -#ifdef CONFIG_SYS_NAND_SELF_INIT +#if CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT) void board_nand_init(void); int nand_register(int devnum, struct mtd_info *mtd); #else diff --git a/include/spi_flash.h b/include/spi_flash.h index 4d4ae89c19..4566feab63 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -14,20 +14,6 @@ struct udevice; -/* by default ENV use the same parameters than SF command */ -#ifndef CONFIG_ENV_SPI_BUS -# define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS -#endif -#ifndef CONFIG_ENV_SPI_CS -# define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS -#endif -#ifndef CONFIG_ENV_SPI_MAX_HZ -# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED -#endif -#ifndef CONFIG_ENV_SPI_MODE -# define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE -#endif - struct spi_slave; struct dm_spi_flash_ops { diff --git a/lib/time.c b/lib/time.c index 38a9758292..96074b84af 100644 --- a/lib/time.c +++ b/lib/time.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <bootstage.h> #include <dm.h> #include <errno.h> diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 6d961ccb3e..428667b438 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1,42 +1,23 @@ -CONFIG_64BIT_PHYS_ADDR -CONFIG_83XX -CONFIG_83XX_PCICLK -CONFIG_88F5182 CONFIG_A003399_NOR_WORKAROUND CONFIG_A008044_WORKAROUND -CONFIG_AEABI CONFIG_AM335X_USB0 CONFIG_AM335X_USB0_MODE CONFIG_AM335X_USB1 CONFIG_AM335X_USB1_MODE -CONFIG_ANDES_PCU -CONFIG_ANDES_PCU_BASE -CONFIG_ARCH_ADPAG101P -CONFIG_ARCH_HAS_ILOG2_U32 -CONFIG_ARCH_HAS_ILOG2_U64 -CONFIG_ARCH_OMAP4 -CONFIG_ARCH_RMOBILE_EXTRAM_BOOT -CONFIG_ARCH_USE_BUILTIN_BSWAP -CONFIG_ARC_MMU_VER CONFIG_ARMV7_SECURE_BASE CONFIG_ARMV7_SECURE_MAX_SIZE CONFIG_ARMV7_SECURE_RESERVE_SIZE CONFIG_ARMV8_SWITCH_TO_EL1 CONFIG_ARM_GIC_BASE_ADDRESS CONFIG_ARP_TIMEOUT -CONFIG_AT91C_PQFP_UHPBUG -CONFIG_AT91RESET_EXTRST -CONFIG_AT91RM9200 CONFIG_AT91SAM9260EK CONFIG_AT91SAM9261EK CONFIG_AT91SAM9G10 CONFIG_AT91SAM9G10EK CONFIG_AT91SAM9G20EK CONFIG_AT91SAM9G20EK_2MMC -CONFIG_AT91SAM9G45EKES CONFIG_AT91SAM9G45_LCD_BASE CONFIG_AT91SAM9M10G45EK -CONFIG_AT91_CAN CONFIG_AT91_EFLASH CONFIG_AT91_GPIO_PULLUP CONFIG_AT91_LED @@ -46,13 +27,9 @@ CONFIG_ATMEL_LCD CONFIG_ATMEL_LCD_BGR555 CONFIG_ATMEL_LCD_RGB565 CONFIG_ATMEL_LEGACY -CONFIG_ATMEL_MCI_8BIT CONFIG_ATMEL_SPI0 CONFIG_AUTO_ZRELADDR CONFIG_BACKSIDE_L2_CACHE -CONFIG_BCH_CONST_M -CONFIG_BCH_CONST_PARAMS -CONFIG_BCH_CONST_T CONFIG_BCM2835_GPIO CONFIG_BIOSEMU CONFIG_BITBANGMII_MULTI @@ -64,20 +41,14 @@ CONFIG_BOARDDIR CONFIG_BOARDNAME CONFIG_BOARD_COMMON CONFIG_BOARD_ECC_SUPPORT -CONFIG_BOARD_IS_OPENRD_BASE -CONFIG_BOARD_IS_OPENRD_CLIENT -CONFIG_BOARD_IS_OPENRD_ULTIMATE CONFIG_BOARD_NAME CONFIG_BOARD_POSTCLK_INIT CONFIG_BOARD_SIZE_LIMIT CONFIG_BOOTFILE CONFIG_BOOTMODE CONFIG_BOOTP_BOOTFILESIZE -CONFIG_BOOTP_DHCP_REQUEST_DELAY -CONFIG_BOOTP_ID_CACHE_SIZE CONFIG_BOOTP_MAY_FAIL CONFIG_BOOTP_NISDOMAIN -CONFIG_BOOTP_RANDOM_DELAY CONFIG_BOOTP_SERVERIP CONFIG_BOOTP_TIMEOFFSET CONFIG_BOOTP_VENDOREX @@ -85,7 +56,6 @@ CONFIG_BOOTROM_ERR_REG CONFIG_BOOTSCRIPT_ADDR CONFIG_BOOTSCRIPT_COPY_RAM CONFIG_BOOTSCRIPT_HDR_ADDR -CONFIG_BOOTSCRIPT_KEY_HASH CONFIG_BOOT_RETRY_MIN CONFIG_BOOT_RETRY_TIME CONFIG_BPTR_VIRT_ADDR @@ -98,35 +68,14 @@ CONFIG_BS_HDR_ADDR_RAM CONFIG_BS_HDR_SIZE CONFIG_BS_SIZE CONFIG_BTB -CONFIG_BUILD_ENVCRC -CONFIG_BUS_WIDTH -CONFIG_CDP_APPLIANCE_VLAN_TYPE -CONFIG_CDP_CAPABILITIES -CONFIG_CDP_DEVICE_ID -CONFIG_CDP_DEVICE_ID_PREFIX -CONFIG_CDP_PLATFORM -CONFIG_CDP_PORT_ID -CONFIG_CDP_POWER_CONSUMPTION -CONFIG_CDP_TRIGGER -CONFIG_CDP_VERSION -CONFIG_CFG_DATA_SECTOR CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS CONFIG_CF_DSPI CONFIG_CF_SBF -CONFIG_CF_V2 -CONFIG_CF_V3 -CONFIG_CF_V4 -CONFIG_CF_V4E CONFIG_CHAIN_BOOT_CMD CONFIG_CHIP_SELECTS_PER_CTRL -CONFIG_CHIP_SELECT_QUAD_CAPABLE CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS CONFIG_CI_UDC_HAS_HOSTPC -CONFIG_CLK_1000_200_200 -CONFIG_CLK_1000_330_165 CONFIG_CLK_1000_400_200 -CONFIG_CLK_800_330_165 -CONFIG_CLK_DEBUG CONFIG_CLOCKS CONFIG_CLOCK_SYNTHESIZER CONFIG_CM922T_XA10 @@ -136,11 +85,7 @@ CONFIG_CM_MULTIPLE_SSRAM CONFIG_CM_REMAP CONFIG_CM_SPD_DETECT CONFIG_CM_TCRAM -CONFIG_COLDFIRE CONFIG_COMMON_BOOT -CONFIG_COMPAT -CONFIG_CONS_EXTC_PINSEL -CONFIG_CONS_EXTC_RATE CONFIG_CONS_ON_SCC CONFIG_CONS_SCIF0 CONFIG_CONS_SCIF1 @@ -150,43 +95,12 @@ CONFIG_CON_ROT CONFIG_CPLD_BR_PRELIM CONFIG_CPLD_OR_PRELIM CONFIG_CPM2 -CONFIG_CPU_ARMV8 -CONFIG_CPU_FREQ_HZ -CONFIG_CPU_HAS_LLSC -CONFIG_CPU_HAS_PREFETCH -CONFIG_CPU_HAS_SMARTMIPS -CONFIG_CPU_HAS_SR_RB -CONFIG_CPU_HAS_WB -CONFIG_CPU_LITTLE_ENDIAN -CONFIG_CPU_MICROMIPS -CONFIG_CPU_MIPSR2 -CONFIG_CPU_MONAHANS -CONFIG_CPU_PXA25X -CONFIG_CPU_PXA26X -CONFIG_CPU_PXA27X -CONFIG_CPU_PXA300 -CONFIG_CPU_SH7751 -CONFIG_CPU_TYPE_R -CONFIG_CPU_VR41XX CONFIG_CQSPI_REF_CLK -CONFIG_CS8900_BUS16 -CONFIG_CS8900_BUS32 -CONFIG_CTL_JTAG -CONFIG_CTL_TBE CONFIG_CUSTOMER_BOARD_SUPPORT -CONFIG_D2NET_V2 -CONFIG_DA850_EVM_MAX_CPU_CLK CONFIG_DB_784MP_GP CONFIG_DCACHE -CONFIG_DCACHE_OFF -CONFIG_DCFG_ADDR CONFIG_DEBUG -CONFIG_DEBUG_FS CONFIG_DEBUG_LED -CONFIG_DEBUG_LOCK_ALLOC -CONFIG_DEBUG_SEMIHOSTING -CONFIG_DEBUG_UART_LINFLEXUART -CONFIG_DEBUG_WRITECOUNT CONFIG_DEEP_SLEEP CONFIG_DEFAULT CONFIG_DEFAULT_IMMR @@ -197,12 +111,9 @@ CONFIG_DFU_ALT_BOOT_EMMC CONFIG_DFU_ALT_BOOT_SD CONFIG_DFU_ALT_SYSTEM CONFIG_DFU_ENV_SETTINGS -CONFIG_DHCP_MIN_EXT_LEN CONFIG_DIALOG_POWER CONFIG_DIMM_SLOTS_PER_CTLR -CONFIG_DISCONTIGMEM CONFIG_DISCOVER_PHY -CONFIG_DISPLAY_AER_xxxx CONFIG_DM9000_BASE CONFIG_DM9000_BYTE_SWAPPED CONFIG_DM9000_DEBUG @@ -210,33 +121,20 @@ CONFIG_DM9000_NO_SROM CONFIG_DM9000_USE_16BIT CONFIG_DMA_COHERENT CONFIG_DMA_COHERENT_SIZE -CONFIG_DMA_NONCOHERENT -CONFIG_DNET_AUTONEG_TIMEOUT CONFIG_DP_DDR_CTRL CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR CONFIG_DP_DDR_NUM_CTRLS CONFIG_DRIVER_DM9000 CONFIG_DSP_CLUSTER_START -CONFIG_DWCDDR21MCTL -CONFIG_DWCDDR21MCTL_BASE CONFIG_DWC_AHSATA_BASE_ADDR CONFIG_DWC_AHSATA_PORT_ID CONFIG_DW_ALTDESCRIPTOR -CONFIG_DW_AXI_BURST_LEN CONFIG_DW_GMAC_DEFAULT_DMA_PBL -CONFIG_DW_MAC_FORCE_THRESHOLD_MODE CONFIG_DW_WDT_BASE CONFIG_DW_WDT_CLOCK_KHZ CONFIG_E1000_NO_NVM CONFIG_E300 CONFIG_E5500 -CONFIG_ECC -CONFIG_EDB9301 -CONFIG_EDB93XX_INDUSTRIAL -CONFIG_EDB93XX_SDCS0 -CONFIG_EDB93XX_SDCS1 -CONFIG_EDB93XX_SDCS2 -CONFIG_EDB93XX_SDCS3 CONFIG_EFLASH_PROTSECTORS CONFIG_EHCI_DESC_BIG_ENDIAN CONFIG_EHCI_HCD_INIT_AFTER_RESET @@ -246,16 +144,10 @@ CONFIG_EHCI_MXS_PORT1 CONFIG_EMU CONFIG_ENABLE_36BIT_PHYS CONFIG_ENABLE_MMU -CONFIG_ENABLE_MUST_CHECK -CONFIG_ENV_ADDR_FLEX -CONFIG_ENV_CALLBACK_LIST_DEFAULT -CONFIG_ENV_CALLBACK_LIST_STATIC -CONFIG_ENV_FLAGS_LIST_DEFAULT CONFIG_ENV_FLAGS_LIST_STATIC CONFIG_ENV_IS_EMBEDDED CONFIG_ENV_MAX_ENTRIES CONFIG_ENV_MIN_ENTRIES -CONFIG_ENV_OFFSET_OOB CONFIG_ENV_RANGE CONFIG_ENV_REFLASH CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS @@ -263,34 +155,25 @@ CONFIG_ENV_SETTINGS_NAND_V1 CONFIG_ENV_SETTINGS_NAND_V2 CONFIG_ENV_SETTINGS_V1 CONFIG_ENV_SETTINGS_V2 -CONFIG_ENV_SIZE_FLEX CONFIG_ENV_SROM_BANK CONFIG_ENV_TOTAL_SIZE CONFIG_ENV_VERSION -CONFIG_EPH_POWER_EN -CONFIG_EPOLL CONFIG_ESBC_ADDR_64BIT CONFIG_ESBC_HDR_LS -CONFIG_ESDHC_DETECT_8_BIT_QUIRK CONFIG_ESDHC_DETECT_QUIRK CONFIG_ESDHC_HC_BLK_ADDR CONFIG_ESPRESSO7420 CONFIG_ET1100_BASE -CONFIG_ETHADDR CONFIG_ETHBASE CONFIG_ETHPRIME -CONFIG_ETH_BUFSIZE -CONFIG_ETH_RXSIZE CONFIG_EXTRA_CLOCK CONFIG_EXTRA_ENV CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_COMMON -CONFIG_EXT_AHB2AHB_BASE CONFIG_EXT_AHBAPBBRG_BASE CONFIG_EXT_AHBPCIBRG_BASE CONFIG_EXT_AHBSLAVE01_BASE CONFIG_EXT_AHBSLAVE02_BASE -CONFIG_EXT_PHY CONFIG_EXT_USB_HOST_BASE CONFIG_EXYNOS4 CONFIG_EXYNOS4210 @@ -307,27 +190,12 @@ CONFIG_EXYNOS_SPL CONFIG_EXYNOS_TMU CONFIG_FACTORYSET CONFIG_FB_ADDR -CONFIG_FB_BACKLIGHT -CONFIG_FB_DEFERRED_IO CONFIG_FDTADDR CONFIG_FDTFILE -CONFIG_FEATURE_CLEAN_UP -CONFIG_FEATURE_COMMAND_EDITING -CONFIG_FEATURE_SH_APPLETS_ALWAYS_WIN -CONFIG_FEATURE_SH_EXTRA_QUIET -CONFIG_FEATURE_SH_FANCY_PROMPT -CONFIG_FEATURE_SH_STANDALONE_SHELL CONFIG_FEC_ENET_DEV CONFIG_FEC_FIXED_SPEED -CONFIG_FEC_MXC_25M_REF_CLK CONFIG_FEC_MXC_PHYADDR -CONFIG_FEC_MXC_SWAP_PACKET CONFIG_FEC_XCV_TYPE -CONFIG_FEROCEON -CONFIG_FEROCEON_88FR131 -CONFIG_FILE -CONFIG_FIXED_PHY -CONFIG_FIXED_PHY_ADDR CONFIG_FIXED_SDHCI_ALIGNED_BUFFER CONFIG_FLASH_BR_PRELIM CONFIG_FLASH_CFI_LEGACY @@ -337,16 +205,13 @@ CONFIG_FLASH_SHOW_PROGRESS CONFIG_FLASH_SPANSION_S29WS_N CONFIG_FLASH_VERIFY CONFIG_FM_PLAT_CLK_DIV -CONFIG_FORCE_DDR_DATA_BUS_WIDTH_32 CONFIG_FORMIKE CONFIG_FPGA_COUNT -CONFIG_FPGA_DELAY CONFIG_FPGA_STRATIX_V CONFIG_FSL_CADMUS CONFIG_FSL_CORENET CONFIG_FSL_CPLD CONFIG_FSL_DCU_SII9022A -CONFIG_FSL_DEEP_SLEEP CONFIG_FSL_DEVICE_DISABLE CONFIG_FSL_DIU_CH7301 CONFIG_FSL_DIU_FB @@ -354,8 +219,6 @@ CONFIG_FSL_DSPI1 CONFIG_FSL_ESDHC_PIN_MUX CONFIG_FSL_FIXED_MMC_LOCATION CONFIG_FSL_FM_10GEC_REGULAR_NOTATION -CONFIG_FSL_I2C_CUSTOM_DFSR -CONFIG_FSL_I2C_CUSTOM_FDR CONFIG_FSL_IIM CONFIG_FSL_ISBC_KEY_EXT CONFIG_FSL_LBC @@ -367,35 +230,25 @@ CONFIG_FSL_PMIC_CLK CONFIG_FSL_PMIC_CS CONFIG_FSL_PMIC_MODE CONFIG_FSL_QIXIS -CONFIG_FSL_QIXIS_CLOCK_MEASUREMENT CONFIG_FSL_SATA_V2 CONFIG_FSL_SDHC_V2_3 -CONFIG_FSL_SDRAM_TYPE CONFIG_FSL_SERDES CONFIG_FSL_SERDES1 CONFIG_FSL_SERDES2 CONFIG_FSL_SGMII_RISER -CONFIG_FSL_TBCLK_EXTRA_DIV -CONFIG_FSL_TRUST_ARCH_v1 -CONFIG_FSNOTIFY -CONFIG_FS_POSIX_ACL CONFIG_FTAHBC020S CONFIG_FTAHBC020S_BASE CONFIG_FTAPBBRG020S_01_BASE CONFIG_FTCFC010_BASE CONFIG_FTDMAC020_BASE -CONFIG_FTGMAC100_BASE CONFIG_FTGPIO010_BASE -CONFIG_FTIDE020S_BASE CONFIG_FTIIC010_BASE CONFIG_FTINTC010_BASE CONFIG_FTLCDC100_BASE CONFIG_FTMAC100_BASE -CONFIG_FTMAC110_BASE CONFIG_FTPMU010 CONFIG_FTPMU010_BASE CONFIG_FTPMU010_POWER -CONFIG_FTPWM010_BASE CONFIG_FTRTC010_BASE CONFIG_FTRTC010_EXTCLK CONFIG_FTRTC010_PCLK @@ -406,22 +259,15 @@ CONFIG_FTSMC020_BASE CONFIG_FTSSP010_01_BASE CONFIG_FTSSP010_02_BASE CONFIG_FTTMR010_BASE -CONFIG_FTTMR010_EXT_CLK CONFIG_FTUART010_01_BASE CONFIG_FTUART010_02_BASE CONFIG_FTUART010_03_BASE CONFIG_FTWDT010_BASE CONFIG_FTWDT010_WATCHDOG -CONFIG_FZOTG266HD0A_BASE CONFIG_GATEWAYIP -CONFIG_GLOBAL_DATA_NOT_REG10 CONFIG_GLOBAL_TIMER CONFIG_GMII -CONFIG_GPCNTRL -CONFIG_GPIO_LED_INVERTED_TABLE -CONFIG_GPIO_LED_STUBS CONFIG_GREEN_LED -CONFIG_GURNARD_FPGA CONFIG_GURNARD_SPLASH CONFIG_G_DNL_THOR_PRODUCT_NUM CONFIG_G_DNL_THOR_VENDOR_NUM @@ -438,7 +284,6 @@ CONFIG_HDMI_ENCODER_I2C_ADDR CONFIG_HETROGENOUS_CLUSTERS CONFIG_HIDE_LOGO_VERSION CONFIG_HIKEY_GPIO -CONFIG_HITACHI_SX14 CONFIG_HOSTNAME CONFIG_HPS_ALTERAGRP_DBGATCLK CONFIG_HPS_ALTERAGRP_MAINCLK @@ -588,64 +433,38 @@ CONFIG_HWCONFIG CONFIG_HW_ENV_SETTINGS CONFIG_I2C_ENV_EEPROM_BUS CONFIG_I2C_GSC -CONFIG_I2C_MBB_TIMEOUT CONFIG_I2C_MULTI_BUS CONFIG_I2C_MVTWSI CONFIG_I2C_MVTWSI_BASE CONFIG_I2C_MVTWSI_BASE0 CONFIG_I2C_MVTWSI_BASE1 -CONFIG_I2C_MVTWSI_BASE2 -CONFIG_I2C_MVTWSI_BASE3 -CONFIG_I2C_MVTWSI_BASE4 -CONFIG_I2C_MVTWSI_BASE5 -CONFIG_I2C_REPEATED_START CONFIG_I2C_RTC_ADDR -CONFIG_I2C_TIMEOUT CONFIG_ICACHE CONFIG_ICS307_REFCLK_HZ CONFIG_IDE_PREINIT CONFIG_IDE_RESET -CONFIG_IMA CONFIG_IMX CONFIG_IMX6_PWM_PER_CLK CONFIG_IMX_HDMI CONFIG_IMX_VIDEO_SKIP -CONFIG_INETSPACE_V2 -CONFIG_INI_ALLOW_MULTILINE -CONFIG_INI_CASE_INSENSITIVE -CONFIG_INI_MAX_LINE -CONFIG_INI_MAX_NAME -CONFIG_INI_MAX_SECTION -CONFIG_INTEGRITY CONFIG_INTERRUPTS CONFIG_IODELAY_RECALIBRATION CONFIG_IOMUX_LPSR CONFIG_IOMUX_SHARE_CONF_REG -CONFIG_IOS CONFIG_IO_TRACE CONFIG_IPADDR -CONFIG_IPROC CONFIG_IRAM_BASE CONFIG_IRAM_END CONFIG_IRAM_SIZE CONFIG_IRAM_STACK CONFIG_IRAM_TOP CONFIG_IRDA_BASE -CONFIG_JFFS2_DEV -CONFIG_JFFS2_LZO -CONFIG_JFFS2_NAND -CONFIG_JFFS2_PART_OFFSET -CONFIG_JFFS2_PART_SIZE -CONFIG_JFFS2_SUMMARY CONFIG_JRSTARTR_JR0 -CONFIG_JTAG_CONSOLE CONFIG_KEEP_SERVERADDR CONFIG_KEY_REVOCATION CONFIG_KIRKWOOD_EGIGA_INIT -CONFIG_KIRKWOOD_GPIO CONFIG_KIRKWOOD_PCIE_INIT CONFIG_KIRKWOOD_RGMII_PAD_1V8 -CONFIG_KM8321 CONFIG_KMTEGR1 CONFIG_KM_BOARD_EXTRA_ENV CONFIG_KM_COGE5UN @@ -683,18 +502,11 @@ CONFIG_KSNET_NETCP_V1_5 CONFIG_KSNET_SERDES_LANES_PER_SGMII CONFIG_KSNET_SERDES_SGMII2_BASE CONFIG_KSNET_SERDES_SGMII_BASE -CONFIG_KVM_GUEST -CONFIG_KW88F6192 -CONFIG_KW88F6281 -CONFIG_KW88F6702 CONFIG_L1_INIT_RAM CONFIG_L2_CACHE -CONFIG_LAN91C96_USE_32_BIT CONFIG_LAYERSCAPE_NS_ACCESS CONFIG_LBA48 -CONFIG_LBDAF CONFIG_LCD_ALIGNMENT -CONFIG_LCD_BMP_RLE8 CONFIG_LCD_INFO CONFIG_LCD_INFO_BELOW_LOGO CONFIG_LCD_IN_PSRAM @@ -703,14 +515,10 @@ CONFIG_LCD_MENU CONFIG_LD9040 CONFIG_LEGACY CONFIG_LEGACY_BOOTCMD_ENV -CONFIG_LITTLETON_LCD -CONFIG_LMS283GF05 CONFIG_LOADS_ECHO CONFIG_LOWPOWER_ADDR CONFIG_LOWPOWER_FLAG -CONFIG_LOW_MCFCLK CONFIG_LPC32XX_ETH -CONFIG_LPC32XX_ETH_BUFS_BASE CONFIG_LPC32XX_HSUART CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY CONFIG_LPC32XX_NAND_MLC_NAND_TA @@ -727,90 +535,41 @@ CONFIG_LPC32XX_NAND_SLC_WDR_CLKS CONFIG_LPC32XX_NAND_SLC_WHOLD CONFIG_LPC32XX_NAND_SLC_WSETUP CONFIG_LPC32XX_NAND_SLC_WWIDTH -CONFIG_LPC_BASE -CONFIG_LPC_IO_BASE CONFIG_LPUART CONFIG_LPUART_32B_REG -CONFIG_LQ038J7DH53 CONFIG_LS102XA_STREAM_ID CONFIG_LSCHLV2 CONFIG_LSXHL -CONFIG_M41T94_SPI_CS -CONFIG_M520x -CONFIG_M5301x CONFIG_MACB_SEARCH_PHY -CONFIG_MACRESET_TIMEOUT CONFIG_MALLOC_F_ADDR CONFIG_MALTA -CONFIG_MARCO_MEMSET -CONFIG_MASK_AER_AO CONFIG_MAX_DSP_CPUS -CONFIG_MAX_FPGA_DEVICES CONFIG_MAX_MEM_MAPPED -CONFIG_MAX_PKT CONFIG_MAX_RAM_BANK_SIZE -CONFIG_MCF5249 -CONFIG_MCF5253 CONFIG_MCFRTC CONFIG_MCFTMR -CONFIG_MDIO_TIMEOUT CONFIG_MEMSIZE_IN_BYTES -CONFIG_MEM_HOLE_16M CONFIG_MEM_INIT_VALUE CONFIG_MEM_REMAP CONFIG_MFG_ENV_SETTINGS CONFIG_MII_DEFAULT_TSEC CONFIG_MII_INIT -CONFIG_MIPS_HUGE_TLB_SUPPORT -CONFIG_MIPS_MT_FPAFF CONFIG_MISC_COMMON -CONFIG_MIU_1BIT_INTERLEAVED CONFIG_MIU_2BIT_21_7_INTERLEAVED CONFIG_MIU_2BIT_INTERLEAVED -CONFIG_MIU_LINEAR CONFIG_MMCROOT CONFIG_MMC_DEFAULT_DEV -CONFIG_MMC_RPMB_TRACE CONFIG_MMC_SUNXI_SLOT -CONFIG_MMU CONFIG_MONITOR_IS_IN_RAM -CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION -CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN -CONFIG_MPC83XX_GPIO_0_INIT_VALUE -CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION -CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN -CONFIG_MPC83XX_GPIO_1_INIT_VALUE CONFIG_MPC85XX_FEC CONFIG_MPC85XX_FEC_NAME -CONFIG_MPC8xxx_DISABLE_BPTR CONFIG_MTD_CONCAT -CONFIG_MTD_NAND_MUSEUM_IDS CONFIG_MTD_NAND_VERIFY_WRITE -CONFIG_MTD_ONENAND_VERIFY_WRITE CONFIG_MTD_PARTITION -CONFIG_MTD_UBI_BEB_RESERVE -CONFIG_MTD_UBI_BLOCK -CONFIG_MTD_UBI_DEBUG -CONFIG_MTD_UBI_DEBUG_MSG -CONFIG_MTD_UBI_DEBUG_MSG_BLD -CONFIG_MTD_UBI_DEBUG_MSG_EBA -CONFIG_MTD_UBI_DEBUG_MSG_IO -CONFIG_MTD_UBI_DEBUG_MSG_WL -CONFIG_MTD_UBI_DEBUG_PARANOID -CONFIG_MTD_UBI_GLUEBI -CONFIG_MTD_UBI_MODULE -CONFIG_MULTI_CS CONFIG_MVGBE_PORTS -CONFIG_MVMFP_V2 CONFIG_MVS -CONFIG_MV_ETH_RXQ -CONFIG_MV_I2C_NUM -CONFIG_MV_I2C_REG CONFIG_MX27 CONFIG_MX27_CLK32 -CONFIG_MX27_TIMER_HIGH_PRECISION -CONFIG_MX28_FEC_MAC_IN_OCOTP -CONFIG_MXC_EPDC CONFIG_MXC_GPT_HCLK CONFIG_MXC_NAND_HWECC CONFIG_MXC_NAND_IP_REGS_BASE @@ -823,60 +582,31 @@ CONFIG_MXS CONFIG_MXS_AUART CONFIG_MXS_AUART_BASE CONFIG_MXS_OCOTP -CONFIG_MY_OPTION CONFIG_NANDFLASH_SIZE CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC CONFIG_NAND_CS_INIT -CONFIG_NAND_DATA_REG CONFIG_NAND_ECC_BCH -CONFIG_NAND_ENV_DST CONFIG_NAND_KIRKWOOD CONFIG_NAND_KMETER1 -CONFIG_NAND_MODE_REG CONFIG_NAND_OMAP_GPMC_WSCFG CONFIG_NAND_SECBOOT CONFIG_NAND_SPL -CONFIG_NAND_U_BOOT -CONFIG_NATSEMI -CONFIG_NCEL2C100_BASE -CONFIG_NCEMIC100_BASE -CONFIG_NDS_DLM1_BASE -CONFIG_NDS_DLM2_BASE -CONFIG_NEO -CONFIG_NET2BIG_V2 -CONFIG_NETCONSOLE_BUFFER_SIZE CONFIG_NETDEV CONFIG_NETMASK -CONFIG_NETSPACE_LITE_V2 -CONFIG_NETSPACE_MAX_V2 -CONFIG_NETSPACE_MINI_V2 -CONFIG_NETSPACE_V2 -CONFIG_NET_MULTI CONFIG_NET_RETRY_COUNT CONFIG_NEVER_ASSERT_ODT_TO_CPU CONFIG_NFS_TIMEOUT CONFIG_NOBQFMAN -CONFIG_NON_SECURE CONFIG_NORBOOT CONFIG_NORFLASH_PS32BIT -CONFIG_NO_ETH -CONFIG_NO_WAIT CONFIG_NS16550_MIN_FUNCTIONS -CONFIG_NS8382X CONFIG_NUM_DSP_CPUS -CONFIG_NUM_PAMU CONFIG_ODROID_REV_AIN -CONFIG_OFF_PADCONF CONFIG_ORIGEN CONFIG_OTHBOOTARGS CONFIG_OVERWRITE_ETHADDR_ONCE -CONFIG_PALMAS_AUDPWR CONFIG_PALMAS_POWER -CONFIG_PALMAS_SMPS7_FPWM -CONFIG_PALMAS_USB_SS_PWR -CONFIG_PARAVIRT CONFIG_PCA953X -CONFIG_PCA9698 CONFIG_PCI1 CONFIG_PCI2 CONFIG_PCIE @@ -887,11 +617,8 @@ CONFIG_PCIE4 CONFIG_PCIE_IMX CONFIG_PCIE_IMX_PERST_GPIO CONFIG_PCIE_IMX_POWER_GPIO -CONFIG_PCI_BOOTDELAY CONFIG_PCI_CLK_FREQ CONFIG_PCI_CONFIG_HOST_BRIDGE -CONFIG_PCI_EHCI_DEVICE -CONFIG_PCI_EHCI_DEVNO CONFIG_PCI_GT64120 CONFIG_PCI_IO_BUS CONFIG_PCI_IO_PHYS @@ -900,27 +627,19 @@ CONFIG_PCI_MEM_BUS CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_SIZE CONFIG_PCI_MSC01 -CONFIG_PCI_NOSCAN CONFIG_PCI_OHCI -CONFIG_PCI_OHCI_DEVNO CONFIG_PCI_PREF_BUS CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_SIZE CONFIG_PCI_SCAN_SHOW -CONFIG_PCI_SYS_BUS -CONFIG_PCI_SYS_PHYS -CONFIG_PCI_SYS_SIZE CONFIG_PEN_ADDR_BIG_ENDIAN CONFIG_PHY_BASE_ADR CONFIG_PHY_ET1011C_TX_CLK_FIX CONFIG_PHY_ID CONFIG_PHY_INTERFACE_MODE CONFIG_PHY_IRAM_BASE -CONFIG_PHY_MODE_NEED_CHANGE CONFIG_PHY_RESET_DELAY -CONFIG_PIXIS_SGMII_CMD CONFIG_PL011_CLOCK -CONFIG_PL011_SERIAL_RLCR CONFIG_PL01x_PORTS CONFIG_PM CONFIG_PMC_BR_PRELIM @@ -928,24 +647,15 @@ CONFIG_PMC_OR_PRELIM CONFIG_PME_PLAT_CLK_DIV CONFIG_PMU CONFIG_PMW_BASE -CONFIG_PM_SLEEP CONFIG_POST CONFIG_POSTBOOTMENU -CONFIG_POST_BSPEC1 -CONFIG_POST_BSPEC2 -CONFIG_POST_BSPEC3 -CONFIG_POST_BSPEC4 -CONFIG_POST_BSPEC5 CONFIG_POST_EXTERNAL_WORD_FUNCS CONFIG_POST_SKIP_ENV_FLAGS -CONFIG_POST_UART -CONFIG_POST_WATCHDOG CONFIG_POWER_FSL CONFIG_POWER_FSL_MC13892 CONFIG_POWER_HI6553 CONFIG_POWER_LTC3676 CONFIG_POWER_LTC3676_I2C_ADDR -CONFIG_POWER_MAX77696_I2C_ADDR CONFIG_POWER_PFUZE100 CONFIG_POWER_PFUZE100_I2C_ADDR CONFIG_POWER_PFUZE3000 @@ -956,25 +666,18 @@ CONFIG_POWER_TPS65090_EC CONFIG_POWER_TPS65217 CONFIG_POWER_TPS65218 CONFIG_POWER_TPS65910 -CONFIG_PPC64BRIDGE CONFIG_PPC_CLUSTER_START CONFIG_PPC_SPINTABLE_COMPATIBLE CONFIG_PRAM -CONFIG_PRINTK -CONFIG_PROC_FS -CONFIG_PROFILE_ALL_BRANCHES -CONFIG_PROFILING CONFIG_PSRAM_SCFG CONFIG_PWM CONFIG_PXA_LCD CONFIG_PXA_PWR_I2C CONFIG_PXA_STD_I2C CONFIG_PXA_VGA -CONFIG_PXA_VIDEO CONFIG_QBMAN_CLK_DIV CONFIG_QIXIS_I2C_ACCESS CONFIG_QSPI -CONFIG_QUOTA CONFIG_RAMBOOT_NAND CONFIG_RAMBOOT_SPIFLASH CONFIG_RAMBOOT_TEXT_BASE @@ -982,11 +685,8 @@ CONFIG_RAMDISKFILE CONFIG_RAMDISK_ADDR CONFIG_RAMDISK_BOOT CONFIG_RD_LVL -CONFIG_REALMODE_DEBUG CONFIG_RED_LED -CONFIG_REG CONFIG_REMAKE_ELF -CONFIG_REQ CONFIG_RESERVED_01_BASE CONFIG_RESERVED_02_BASE CONFIG_RESERVED_03_BASE @@ -997,50 +697,29 @@ CONFIG_RESET_VECTOR_ADDRESS CONFIG_RESTORE_FLASH CONFIG_RES_BLOCK_SIZE CONFIG_RMII -CONFIG_RMSTP0_ENA -CONFIG_RMSTP10_ENA -CONFIG_RMSTP11_ENA -CONFIG_RMSTP1_ENA -CONFIG_RMSTP2_ENA -CONFIG_RMSTP3_ENA -CONFIG_RMSTP4_ENA -CONFIG_RMSTP5_ENA -CONFIG_RMSTP6_ENA -CONFIG_RMSTP7_ENA -CONFIG_RMSTP8_ENA -CONFIG_RMSTP9_ENA CONFIG_ROCKCHIP_CHIP_TAG CONFIG_ROCKCHIP_MAX_INIT_SIZE CONFIG_ROCKCHIP_SDHCI_MAX_FREQ CONFIG_ROCKCHIP_STIMER_BASE -CONFIG_ROM_STUBS CONFIG_ROOTPATH CONFIG_RTC_DS1337 CONFIG_RTC_DS1337_NOOSC CONFIG_RTC_DS1338 -CONFIG_RTC_DS1339_TCR_VAL CONFIG_RTC_DS1374 -CONFIG_RTC_DS1388 -CONFIG_RTC_DS1388_TCR_VAL CONFIG_RTC_DS3231 CONFIG_RTC_FTRTC010 -CONFIG_RTC_M41T11 CONFIG_RTC_MC13XXX CONFIG_RTC_MCFRRTC -CONFIG_RTC_MCP79411 CONFIG_RTC_MXS CONFIG_RTC_PT7C4338 -CONFIG_RX_DESCR_NUM CONFIG_S5P CONFIG_S5PC100 CONFIG_S5PC110 CONFIG_S5P_PA_SYSRAM -CONFIG_S6E8AX0 CONFIG_SAMA5D3_LCD_BASE CONFIG_SAMSUNG CONFIG_SAMSUNG_ONENAND CONFIG_SANDBOX_ARCH -CONFIG_SANDBOX_BIG_ENDIAN CONFIG_SANDBOX_SDL CONFIG_SANDBOX_SPI_MAX_BUS CONFIG_SANDBOX_SPI_MAX_CS @@ -1048,37 +727,24 @@ CONFIG_SAR2_REG CONFIG_SAR_REG CONFIG_SATA1 CONFIG_SATA2 -CONFIG_SATA_ULI5288 -CONFIG_SCF0403_LCD CONFIG_SCIF_A -CONFIG_SCIF_USE_EXT_CLK CONFIG_SCSI_AHCI_PLAT CONFIG_SCSI_DEV_LIST CONFIG_SC_TIMER_CLK CONFIG_SDCARD CONFIG_SDRAM_OFFSET_FOR_RT -CONFIG_SD_BOOT_QSPI CONFIG_SECBOOT CONFIG_SECURE_BL1_ONLY -CONFIG_SECURE_RUNTIME_RESV_SRAM_SZ -CONFIG_SECURITY CONFIG_SEC_FW_SIZE CONFIG_SERIAL_BOOT CONFIG_SERIAL_FLASH -CONFIG_SERIAL_HW_FLOW_CONTROL CONFIG_SERIAL_SOFTWARE_FIFO -CONFIG_SERIRQ_CONTINUOUS_MODE CONFIG_SERVERIP CONFIG_SETUP_INITRD_TAG CONFIG_SET_BOOTARGS CONFIG_SET_DFU_ALT_BUF_LEN -CONFIG_SGI_IP28 CONFIG_SH73A0 CONFIG_SH7751_PCI -CONFIG_SHARP_LM8V31 -CONFIG_SHEEVA_88SV131 -CONFIG_SH_CMT_CLK_FREQ -CONFIG_SH_DSP CONFIG_SH_ETHER_ALIGNE_SIZE CONFIG_SH_ETHER_BASE_ADDR CONFIG_SH_ETHER_CACHE_INVALIDATE @@ -1088,49 +754,28 @@ CONFIG_SH_ETHER_PHY_MODE CONFIG_SH_ETHER_SH7734_MII CONFIG_SH_ETHER_USE_PORT CONFIG_SH_GPIO_PFC -CONFIG_SH_MMCIF_CLK CONFIG_SH_QSPI_BASE CONFIG_SH_SCIF_CLK_FREQ -CONFIG_SH_SDHI_FREQ -CONFIG_SH_SDRAM_OFFSET CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION CONFIG_SKIP_TRUNOFF_WATCHDOG CONFIG_SLIC -CONFIG_SLTTMR CONFIG_SMC91111 CONFIG_SMC91111_BASE CONFIG_SMC91111_EXT_PHY -CONFIG_SMC_AUTONEG_TIMEOUT CONFIG_SMC_USE_32_BIT -CONFIG_SMC_USE_IOFUNCS CONFIG_SMDK5420 CONFIG_SMP_PEN_ADDR CONFIG_SMSC_LPC47M CONFIG_SMSC_SIO1007 -CONFIG_SMSTP0_ENA -CONFIG_SMSTP10_ENA -CONFIG_SMSTP11_ENA -CONFIG_SMSTP1_ENA -CONFIG_SMSTP2_ENA -CONFIG_SMSTP3_ENA -CONFIG_SMSTP4_ENA -CONFIG_SMSTP5_ENA -CONFIG_SMSTP6_ENA -CONFIG_SMSTP7_ENA -CONFIG_SMSTP8_ENA -CONFIG_SMSTP9_ENA CONFIG_SOCRATES -CONFIG_SOC_OMAP3430 CONFIG_SOFT_I2C_READ_REPEATED_START CONFIG_SPD_EEPROM CONFIG_SPIFLASH CONFIG_SPI_ADDR CONFIG_SPI_BOOTING -CONFIG_SPI_DATAFLASH_WRITE_VERIFY CONFIG_SPI_FLASH_QUAD CONFIG_SPI_FLASH_SIZE CONFIG_SPI_HALF_DUPLEX -CONFIG_SPI_IDLE_VAL CONFIG_SPI_N25Q256A_RESET CONFIG_SPL_ATMEL_SIZE CONFIG_SPL_BOARD_LOAD_IMAGE @@ -1141,29 +786,20 @@ CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_CMT CONFIG_SPL_CMT_DEBUG CONFIG_SPL_COMMON_INIT_DDR -CONFIG_SPL_CONSOLE -CONFIG_SPL_ETH_DEVICE CONFIG_SPL_FLUSH_IMAGE CONFIG_SPL_FS_LOAD_ARGS_NAME CONFIG_SPL_FS_LOAD_KERNEL_NAME CONFIG_SPL_FS_LOAD_PAYLOAD_NAME CONFIG_SPL_GD_ADDR CONFIG_SPL_INIT_MINIMAL -CONFIG_SPL_JR0_LIODN_NS -CONFIG_SPL_JR0_LIODN_S CONFIG_SPL_MAX_FOOTPRINT -CONFIG_SPL_MAX_PEB_SIZE CONFIG_SPL_MAX_SIZE -CONFIG_SPL_MXS_PSWITCH_WAIT CONFIG_SPL_NAND_INIT CONFIG_SPL_NAND_MINIMAL CONFIG_SPL_NAND_RAW_ONLY CONFIG_SPL_NAND_SOFTECC -CONFIG_SPL_NAND_WORKSPACE CONFIG_SPL_PAD_TO -CONFIG_SPL_PANIC_ON_RAW_IMAGE CONFIG_SPL_PBL_PAD -CONFIG_SPL_PPAACT_ADDR CONFIG_SPL_RELOC_MALLOC_ADDR CONFIG_SPL_RELOC_MALLOC_SIZE CONFIG_SPL_RELOC_STACK @@ -1171,14 +807,12 @@ CONFIG_SPL_RELOC_TEXT_BASE CONFIG_SPL_SATA_BOOT_DEVICE CONFIG_SPL_SIZE CONFIG_SPL_SKIP_RELOCATE -CONFIG_SPL_SPAACT_ADDR CONFIG_SPL_SPI_FLASH_MINIMAL CONFIG_SPL_STACK CONFIG_SPL_STACK_ADDR CONFIG_SPL_STACK_SIZE CONFIG_SPL_START_S_PATH CONFIG_SPL_TARGET -CONFIG_SPL_UBOOT_KEY_HASH CONFIG_SRAM_BASE CONFIG_SRAM_SIZE CONFIG_SRIO1 @@ -1194,28 +828,19 @@ CONFIG_SRIO_PCIE_BOOT_SLAVE CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE -CONFIG_SSE2 CONFIG_STACKBASE CONFIG_STANDALONE_LOAD_ADDR -CONFIG_STATIC_BOARD_REV CONFIG_STD_DEVICES_SETTINGS -CONFIG_SXNI855T -CONFIG_SYSFS -CONFIG_SYSMGR_ISWGRP_HANDOFF CONFIG_SYS_64BIT CONFIG_SYS_64BIT_LBA CONFIG_SYS_83XX_DDR_USES_CS0 -CONFIG_SYS_ADDRESS_MAP_A CONFIG_SYS_AMASK0 -CONFIG_SYS_AMASK0_FINAL CONFIG_SYS_AMASK1 CONFIG_SYS_AMASK1_FINAL CONFIG_SYS_AMASK2 CONFIG_SYS_AMASK2_FINAL CONFIG_SYS_AMASK3 -CONFIG_SYS_AMASK3_FINAL CONFIG_SYS_AMASK4 -CONFIG_SYS_AMASK5 CONFIG_SYS_AMASK6 CONFIG_SYS_AMASK7 CONFIG_SYS_AT91_MAIN_CLOCK @@ -1229,7 +854,6 @@ CONFIG_SYS_ATA_IDE0_OFFSET CONFIG_SYS_ATA_IDE1_OFFSET CONFIG_SYS_ATA_REG_OFFSET CONFIG_SYS_ATA_STRIDE -CONFIG_SYS_ATMEL_CPU_NAME CONFIG_SYS_AUTOLOAD CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION CONFIG_SYS_AUXCORE_BOOTDATA @@ -1238,8 +862,6 @@ CONFIG_SYS_BAUDRATE_TABLE CONFIG_SYS_BCSR CONFIG_SYS_BFTIC3_BASE CONFIG_SYS_BFTIC3_SIZE -CONFIG_SYS_BITBANG_PHY_PORT -CONFIG_SYS_BITBANG_PHY_PORTS CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_CENA_SIZE CONFIG_SYS_BMAN_CINH_BASE @@ -1251,11 +873,9 @@ CONFIG_SYS_BMAN_NUM_PORTALS CONFIG_SYS_BMAN_SP_CENA_SIZE CONFIG_SYS_BMAN_SP_CINH_SIZE CONFIG_SYS_BMAN_SWP_ISDR_REG -CONFIG_SYS_BOARD_NAME CONFIG_SYS_BOOK3E_HV CONFIG_SYS_BOOTCOUNT_BE CONFIG_SYS_BOOTCOUNT_LE -CONFIG_SYS_BOOTFILE_PREFIX CONFIG_SYS_BOOTMAPSZ CONFIG_SYS_BOOTM_LEN CONFIG_SYS_BOOTPARAMS_LEN @@ -1264,15 +884,9 @@ CONFIG_SYS_BOOT_RAMDISK_HIGH CONFIG_SYS_CACHE_ACR0 CONFIG_SYS_CACHE_ACR1 CONFIG_SYS_CACHE_ACR2 -CONFIG_SYS_CACHE_ACR3 -CONFIG_SYS_CACHE_ACR4 -CONFIG_SYS_CACHE_ACR5 -CONFIG_SYS_CACHE_ACR6 -CONFIG_SYS_CACHE_ACR7 CONFIG_SYS_CACHE_DCACR CONFIG_SYS_CACHE_ICACR CONFIG_SYS_CACHE_STASHING -CONFIG_SYS_CADMUS_BASE_REG CONFIG_SYS_CBSIZE CONFIG_SYS_CCCR CONFIG_SYS_CCSRBAR @@ -1280,20 +894,10 @@ CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_HIGH CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSR_DO_NOT_RELOCATE -CONFIG_SYS_CFI_FLASH_CONFIG_REGS CONFIG_SYS_CFI_FLASH_STATUS_POLL -CONFIG_SYS_CF_INTC_REG1 -CONFIG_SYS_CH7301_I2C CONFIG_SYS_CKEN CONFIG_SYS_CLK CONFIG_SYS_CLKTL_CBCDR -CONFIG_SYS_CLK_FREQ_C100 -CONFIG_SYS_CLK_FREQ_C110 -CONFIG_SYS_CMD_CONFIGURE -CONFIG_SYS_CMD_EL -CONFIG_SYS_CMD_IAS -CONFIG_SYS_CMD_INT -CONFIG_SYS_CMD_SUSPEND CONFIG_SYS_CORE_SRAM CONFIG_SYS_CORE_SRAM_SIZE CONFIG_SYS_CPC_REINIT_F @@ -1308,7 +912,6 @@ CONFIG_SYS_CPLD_FTIM1 CONFIG_SYS_CPLD_FTIM2 CONFIG_SYS_CPLD_FTIM3 CONFIG_SYS_CPLD_SIZE -CONFIG_SYS_CPM_INTERRUPT CONFIG_SYS_CPRI CONFIG_SYS_CPRI_CLK CONFIG_SYS_CPUSPEED @@ -1342,50 +945,25 @@ CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_CS3_MASK -CONFIG_SYS_CS4_BASE -CONFIG_SYS_CS4_CTRL CONFIG_SYS_CS4_FTIM0 CONFIG_SYS_CS4_FTIM1 CONFIG_SYS_CS4_FTIM2 CONFIG_SYS_CS4_FTIM3 -CONFIG_SYS_CS4_MASK -CONFIG_SYS_CS5_BASE -CONFIG_SYS_CS5_CTRL -CONFIG_SYS_CS5_FTIM0 -CONFIG_SYS_CS5_FTIM1 -CONFIG_SYS_CS5_FTIM2 -CONFIG_SYS_CS5_FTIM3 -CONFIG_SYS_CS5_MASK -CONFIG_SYS_CS6_BASE -CONFIG_SYS_CS6_CTRL CONFIG_SYS_CS6_FTIM0 CONFIG_SYS_CS6_FTIM1 CONFIG_SYS_CS6_FTIM2 CONFIG_SYS_CS6_FTIM3 -CONFIG_SYS_CS6_MASK -CONFIG_SYS_CS7_BASE -CONFIG_SYS_CS7_CTRL CONFIG_SYS_CS7_FTIM0 CONFIG_SYS_CS7_FTIM1 CONFIG_SYS_CS7_FTIM2 CONFIG_SYS_CS7_FTIM3 -CONFIG_SYS_CS7_MASK CONFIG_SYS_CSOR0 -CONFIG_SYS_CSOR0_EXT CONFIG_SYS_CSOR1 -CONFIG_SYS_CSOR1_EXT CONFIG_SYS_CSOR2 -CONFIG_SYS_CSOR2_EXT CONFIG_SYS_CSOR3 -CONFIG_SYS_CSOR3_EXT CONFIG_SYS_CSOR4 -CONFIG_SYS_CSOR4_EXT -CONFIG_SYS_CSOR5 -CONFIG_SYS_CSOR5_EXT CONFIG_SYS_CSOR6 -CONFIG_SYS_CSOR6_EXT CONFIG_SYS_CSOR7 -CONFIG_SYS_CSOR7_EXT CONFIG_SYS_CSPR0 CONFIG_SYS_CSPR0_EXT CONFIG_SYS_CSPR0_FINAL @@ -1400,8 +978,6 @@ CONFIG_SYS_CSPR3_EXT CONFIG_SYS_CSPR3_FINAL CONFIG_SYS_CSPR4 CONFIG_SYS_CSPR4_EXT -CONFIG_SYS_CSPR5 -CONFIG_SYS_CSPR5_EXT CONFIG_SYS_CSPR6 CONFIG_SYS_CSPR6_EXT CONFIG_SYS_CSPR7 @@ -1414,32 +990,14 @@ CONFIG_SYS_DA850_DDR2_SDRCR CONFIG_SYS_DA850_DDR2_SDTIMR CONFIG_SYS_DA850_DDR2_SDTIMR2 CONFIG_SYS_DA850_PLL0_PLLM -CONFIG_SYS_DA850_PLL0_PREDIV CONFIG_SYS_DA850_PLL1_PLLM CONFIG_SYS_DA850_SYSCFG_SUSPSRC -CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT CONFIG_SYS_DAVINCI_I2C_SLAVE CONFIG_SYS_DAVINCI_I2C_SLAVE1 CONFIG_SYS_DAVINCI_I2C_SLAVE2 CONFIG_SYS_DAVINCI_I2C_SPEED CONFIG_SYS_DAVINCI_I2C_SPEED1 CONFIG_SYS_DAVINCI_I2C_SPEED2 -CONFIG_SYS_DBAT0L -CONFIG_SYS_DBAT0U -CONFIG_SYS_DBAT1L -CONFIG_SYS_DBAT1U -CONFIG_SYS_DBAT2L -CONFIG_SYS_DBAT2U -CONFIG_SYS_DBAT3L -CONFIG_SYS_DBAT3U -CONFIG_SYS_DBAT4L -CONFIG_SYS_DBAT4U -CONFIG_SYS_DBAT5L -CONFIG_SYS_DBAT5U -CONFIG_SYS_DBAT6L -CONFIG_SYS_DBAT6U -CONFIG_SYS_DBAT7L -CONFIG_SYS_DBAT7U CONFIG_SYS_DCACHE_INV CONFIG_SYS_DCSRBAR CONFIG_SYS_DCSRBAR_PHYS @@ -1447,18 +1005,8 @@ CONFIG_SYS_DCSR_COP_CCP_ADDR CONFIG_SYS_DCSR_DCFG_ADDR CONFIG_SYS_DCSR_DCFG_OFFSET CONFIG_SYS_DCU_ADDR -CONFIG_SYS_DDR2_CS0_BNDS -CONFIG_SYS_DDR2_CS0_CONFIG -CONFIG_SYS_DDR2_CS1_BNDS -CONFIG_SYS_DDR2_CS1_CONFIG -CONFIG_SYS_DDR2_CS2_BNDS -CONFIG_SYS_DDR2_CS2_CONFIG -CONFIG_SYS_DDR2_CS3_BNDS -CONFIG_SYS_DDR2_CS3_CONFIG CONFIG_SYS_DDRCDR CONFIG_SYS_DDRCDR_VALUE -CONFIG_SYS_DDRD -CONFIG_SYS_DDRTC CONFIG_SYS_DDRUA CONFIG_SYS_DDR_BLOCK1_SIZE CONFIG_SYS_DDR_BLOCK2_BASE @@ -1466,52 +1014,34 @@ CONFIG_SYS_DDR_CLKSEL CONFIG_SYS_DDR_CLK_CNTL CONFIG_SYS_DDR_CLK_CONTROL CONFIG_SYS_DDR_CLK_CTRL -CONFIG_SYS_DDR_CLK_CTRL_1000 -CONFIG_SYS_DDR_CLK_CTRL_1200 CONFIG_SYS_DDR_CLK_CTRL_667 CONFIG_SYS_DDR_CLK_CTRL_800 -CONFIG_SYS_DDR_CLK_CTRL_900 CONFIG_SYS_DDR_CONFIG CONFIG_SYS_DDR_CONFIG_2 CONFIG_SYS_DDR_CONFIG_256 CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_2 -CONFIG_SYS_DDR_CPO CONFIG_SYS_DDR_CS0_BNDS CONFIG_SYS_DDR_CS0_CONFIG CONFIG_SYS_DDR_CS0_CONFIG_2 CONFIG_SYS_DDR_CS1_BNDS CONFIG_SYS_DDR_CS1_CONFIG CONFIG_SYS_DDR_CS1_CONFIG_2 -CONFIG_SYS_DDR_CS2_BNDS -CONFIG_SYS_DDR_CS2_CONFIG -CONFIG_SYS_DDR_CS3_BNDS -CONFIG_SYS_DDR_CS3_CONFIG CONFIG_SYS_DDR_DATA_INIT CONFIG_SYS_DDR_INIT_ADDR CONFIG_SYS_DDR_INIT_EXT_ADDR CONFIG_SYS_DDR_INTERVAL -CONFIG_SYS_DDR_INTERVAL_1000 -CONFIG_SYS_DDR_INTERVAL_1200 CONFIG_SYS_DDR_INTERVAL_667 CONFIG_SYS_DDR_INTERVAL_800 -CONFIG_SYS_DDR_INTERVAL_900 CONFIG_SYS_DDR_MODE CONFIG_SYS_DDR_MODE2 CONFIG_SYS_DDR_MODE_1 -CONFIG_SYS_DDR_MODE_1_1000 -CONFIG_SYS_DDR_MODE_1_1200 CONFIG_SYS_DDR_MODE_1_667 CONFIG_SYS_DDR_MODE_1_800 -CONFIG_SYS_DDR_MODE_1_900 CONFIG_SYS_DDR_MODE_2 -CONFIG_SYS_DDR_MODE_2_1000 -CONFIG_SYS_DDR_MODE_2_1200 CONFIG_SYS_DDR_MODE_2_667 CONFIG_SYS_DDR_MODE_2_800 -CONFIG_SYS_DDR_MODE_2_900 CONFIG_SYS_DDR_MODE_CONTROL -CONFIG_SYS_DDR_MODE_WEAK CONFIG_SYS_DDR_RAW_TIMING CONFIG_SYS_DDR_RCW_1 CONFIG_SYS_DDR_RCW_2 @@ -1522,53 +1052,31 @@ CONFIG_SYS_DDR_SDRAM_CLK_CNTL CONFIG_SYS_DDR_SIZE CONFIG_SYS_DDR_SR_CNTR CONFIG_SYS_DDR_TIMING_0 -CONFIG_SYS_DDR_TIMING_0_1000 -CONFIG_SYS_DDR_TIMING_0_1200 CONFIG_SYS_DDR_TIMING_0_667 CONFIG_SYS_DDR_TIMING_0_800 -CONFIG_SYS_DDR_TIMING_0_900 CONFIG_SYS_DDR_TIMING_1 -CONFIG_SYS_DDR_TIMING_1_1000 -CONFIG_SYS_DDR_TIMING_1_1200 CONFIG_SYS_DDR_TIMING_1_667 CONFIG_SYS_DDR_TIMING_1_800 -CONFIG_SYS_DDR_TIMING_1_900 CONFIG_SYS_DDR_TIMING_2 -CONFIG_SYS_DDR_TIMING_2_1000 -CONFIG_SYS_DDR_TIMING_2_1200 CONFIG_SYS_DDR_TIMING_2_667 CONFIG_SYS_DDR_TIMING_2_800 -CONFIG_SYS_DDR_TIMING_2_900 CONFIG_SYS_DDR_TIMING_3 -CONFIG_SYS_DDR_TIMING_3_1000 -CONFIG_SYS_DDR_TIMING_3_1200 CONFIG_SYS_DDR_TIMING_3_667 CONFIG_SYS_DDR_TIMING_3_800 -CONFIG_SYS_DDR_TIMING_3_900 CONFIG_SYS_DDR_TIMING_4 CONFIG_SYS_DDR_TIMING_5 -CONFIG_SYS_DDR_WRITE_DATA_DELAY -CONFIG_SYS_DDR_WRLVL_CNTL CONFIG_SYS_DDR_WRLVL_CONTROL CONFIG_SYS_DDR_WRLVL_CONTROL_667 CONFIG_SYS_DDR_WRLVL_CONTROL_800 -CONFIG_SYS_DDR_ZQ_CNTL CONFIG_SYS_DDR_ZQ_CONTROL CONFIG_SYS_DEBUG CONFIG_SYS_DEBUG_SERVER_FW_ADDR CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -CONFIG_SYS_DEFAULT_VIDEO_MODE CONFIG_SYS_DIALOG_PMIC_I2C_ADDR -CONFIG_SYS_DIMM_SLOTS_PER_CTLR -CONFIG_SYS_DIRECT_FLASH_NFS CONFIG_SYS_DIRECT_FLASH_TFTP CONFIG_SYS_DISCOVER_PHY CONFIG_SYS_DIU_ADDR -CONFIG_SYS_DP501_BASE -CONFIG_SYS_DP501_DIFFERENTIAL -CONFIG_SYS_DP501_I2C -CONFIG_SYS_DP501_VCAPCTRL0 CONFIG_SYS_DPAA_DCE CONFIG_SYS_DPAA_FMAN CONFIG_SYS_DPAA_PME @@ -1578,24 +1086,17 @@ CONFIG_SYS_DP_DDR_BASE_PHY CONFIG_SYS_DRAM_BASE CONFIG_SYS_DRAM_SIZE CONFIG_SYS_DRAM_TEST -CONFIG_SYS_DSPI_CS0 -CONFIG_SYS_DSPI_CS2 CONFIG_SYS_DSPI_CTAR0 CONFIG_SYS_DSPI_CTAR1 CONFIG_SYS_DSPI_CTAR2 CONFIG_SYS_DSPI_CTAR3 CONFIG_SYS_DV_NOR_BOOT_CFG -CONFIG_SYS_EBI_CFGR_VAL -CONFIG_SYS_EBI_CSA_VAL CONFIG_SYS_EEPROM_BUS_NUM CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE CONFIG_SYS_EEPROM_WREN CONFIG_SYS_EHCI_USB1_ADDR -CONFIG_SYS_ELO3_DMA3 -CONFIG_SYS_EMAC_TI_CLKDIV CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS CONFIG_SYS_ENET_BD_BASE -CONFIG_SYS_ENV_ADDR CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_ETHOC_BASE CONFIG_SYS_ETHOC_BUFFER_ADDR @@ -1603,22 +1104,14 @@ CONFIG_SYS_ETVPE_CLK CONFIG_SYS_EXCEPTION_VECTORS_HIGH CONFIG_SYS_FAST_CLK CONFIG_SYS_FAULT_ECHO_LINK_DOWN -CONFIG_SYS_FAULT_MII_ADDR CONFIG_SYS_FDT_BASE CONFIG_SYS_FDT_PAD -CONFIG_SYS_FEC0_IOBASE -CONFIG_SYS_FEC1_IOBASE CONFIG_SYS_FECI2C CONFIG_SYS_FEC_BUF_USE_SRAM -CONFIG_SYS_FIXED_PHY_ADDR -CONFIG_SYS_FIXED_PHY_PORT -CONFIG_SYS_FIXED_PHY_PORTS CONFIG_SYS_FLASH0 CONFIG_SYS_FLASH1 CONFIG_SYS_FLASH1_BASE_PHYS CONFIG_SYS_FLASH1_BASE_PHYS_EARLY -CONFIG_SYS_FLASHBOOT -CONFIG_SYS_FLASH_AUTOPROTECT_LIST CONFIG_SYS_FLASH_BANKS_LIST CONFIG_SYS_FLASH_BANKS_SIZES CONFIG_SYS_FLASH_BASE @@ -1627,16 +1120,11 @@ CONFIG_SYS_FLASH_BASE1 CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE_PHYS_EARLY CONFIG_SYS_FLASH_BR_PRELIM -CONFIG_SYS_FLASH_CFI_AMD_RESET CONFIG_SYS_FLASH_CFI_NONBLOCK CONFIG_SYS_FLASH_CFI_WIDTH CONFIG_SYS_FLASH_CHECKSUM -CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE CONFIG_SYS_FLASH_EMPTY_INFO CONFIG_SYS_FLASH_ERASE_TOUT -CONFIG_SYS_FLASH_LEGACY_256Kx8 -CONFIG_SYS_FLASH_LEGACY_512Kx16 -CONFIG_SYS_FLASH_LEGACY_512Kx8 CONFIG_SYS_FLASH_LOCK_TOUT CONFIG_SYS_FLASH_OR_PRELIM CONFIG_SYS_FLASH_PARMSECT_SZ @@ -1645,12 +1133,10 @@ CONFIG_SYS_FLASH_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ CONFIG_SYS_FLASH_SIZE CONFIG_SYS_FLASH_UNLOCK_TOUT -CONFIG_SYS_FLASH_VERIFY_AFTER_WRITE CONFIG_SYS_FLASH_WRITE_TOUT CONFIG_SYS_FLYCNFG_VAL CONFIG_SYS_FM1_10GEC1_PHY_ADDR CONFIG_SYS_FM1_CLK -CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR CONFIG_SYS_FM1_DTSEC1_PHY_ADDR CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR CONFIG_SYS_FM1_DTSEC2_PHY_ADDR @@ -1660,34 +1146,16 @@ CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR CONFIG_SYS_FM1_DTSEC4_PHY_ADDR CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR CONFIG_SYS_FM1_DTSEC5_PHY_ADDR -CONFIG_SYS_FM1_DTSEC_MDIO_ADDR CONFIG_SYS_FM1_QSGMII11_PHY_ADDR CONFIG_SYS_FM1_QSGMII21_PHY_ADDR -CONFIG_SYS_FM1_TGEC_MDIO_ADDR CONFIG_SYS_FM2_10GEC1_PHY_ADDR CONFIG_SYS_FM2_CLK CONFIG_SYS_FM2_DTSEC1_PHY_ADDR CONFIG_SYS_FM2_DTSEC2_PHY_ADDR CONFIG_SYS_FM2_DTSEC3_PHY_ADDR CONFIG_SYS_FM2_DTSEC4_PHY_ADDR -CONFIG_SYS_FM2_DTSEC_MDIO_ADDR -CONFIG_SYS_FM2_TGEC_MDIO_ADDR CONFIG_SYS_FMAN_V3 CONFIG_SYS_FM_MURAM_SIZE -CONFIG_SYS_FORM_3U_CPCI -CONFIG_SYS_FORM_3U_VPX -CONFIG_SYS_FORM_6U_CPCI -CONFIG_SYS_FORM_6U_VPX -CONFIG_SYS_FORM_AMC -CONFIG_SYS_FORM_ATCA_AMC -CONFIG_SYS_FORM_ATCA_PMC -CONFIG_SYS_FORM_CUSTOM -CONFIG_SYS_FORM_PCI -CONFIG_SYS_FORM_PCI_EXPRESS -CONFIG_SYS_FORM_PMC -CONFIG_SYS_FORM_PMC_XMC -CONFIG_SYS_FORM_VME -CONFIG_SYS_FORM_XMC CONFIG_SYS_FPGAREG_DATE CONFIG_SYS_FPGAREG_DIPSW CONFIG_SYS_FPGAREG_FREQ @@ -1695,10 +1163,6 @@ CONFIG_SYS_FPGAREG_RESET CONFIG_SYS_FPGAREG_RESET_CODE CONFIG_SYS_FPGA_AMASK CONFIG_SYS_FPGA_BASE -CONFIG_SYS_FPGA_CHECK_BUSY -CONFIG_SYS_FPGA_CHECK_CTRLC -CONFIG_SYS_FPGA_CHECK_ERROR -CONFIG_SYS_FPGA_COUNT CONFIG_SYS_FPGA_CSOR CONFIG_SYS_FPGA_CSPR CONFIG_SYS_FPGA_CSPR_EXT @@ -1706,25 +1170,15 @@ CONFIG_SYS_FPGA_FTIM0 CONFIG_SYS_FPGA_FTIM1 CONFIG_SYS_FPGA_FTIM2 CONFIG_SYS_FPGA_FTIM3 -CONFIG_SYS_FPGA_NO_RFL_HI CONFIG_SYS_FPGA_PROG_FEEDBACK -CONFIG_SYS_FPGA_PROG_TIME CONFIG_SYS_FPGA_SIZE CONFIG_SYS_FPGA_WAIT -CONFIG_SYS_FPGA_WAIT_BUSY -CONFIG_SYS_FPGA_WAIT_CONFIG -CONFIG_SYS_FPGA_WAIT_INIT -CONFIG_SYS_FSL_AIOP1_BASE -CONFIG_SYS_FSL_AIOP1_SIZE -CONFIG_SYS_FSL_B4860QDS_XFI_ERR CONFIG_SYS_FSL_BMAN_ADDR CONFIG_SYS_FSL_BMAN_OFFSET -CONFIG_SYS_FSL_CCSR_BASE CONFIG_SYS_FSL_CCSR_GUR_BE CONFIG_SYS_FSL_CCSR_GUR_LE CONFIG_SYS_FSL_CCSR_SCFG_BE CONFIG_SYS_FSL_CCSR_SCFG_LE -CONFIG_SYS_FSL_CCSR_SIZE CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR @@ -1761,28 +1215,19 @@ CONFIG_SYS_FSL_CPC_ADDR CONFIG_SYS_FSL_CPC_OFFSET CONFIG_SYS_FSL_CSU_ADDR CONFIG_SYS_FSL_DCFG_ADDR -CONFIG_SYS_FSL_DCSR_BASE CONFIG_SYS_FSL_DCSR_DDR2_ADDR CONFIG_SYS_FSL_DCSR_DDR3_ADDR CONFIG_SYS_FSL_DCSR_DDR4_ADDR CONFIG_SYS_FSL_DCSR_DDR_ADDR -CONFIG_SYS_FSL_DCSR_SIZE CONFIG_SYS_FSL_DCU_BE CONFIG_SYS_FSL_DCU_LE CONFIG_SYS_FSL_DDR2_ADDR -CONFIG_SYS_FSL_DDR3L CONFIG_SYS_FSL_DDR3_ADDR CONFIG_SYS_FSL_DDR_ADDR CONFIG_SYS_FSL_DDR_EMU CONFIG_SYS_FSL_DDR_INTLV_256B CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY -CONFIG_SYS_FSL_DRAM_BASE1 -CONFIG_SYS_FSL_DRAM_BASE2 -CONFIG_SYS_FSL_DRAM_BASE3 -CONFIG_SYS_FSL_DRAM_SIZE1 -CONFIG_SYS_FSL_DRAM_SIZE2 -CONFIG_SYS_FSL_DRAM_SIZE3 CONFIG_SYS_FSL_DSPI_BE CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR @@ -1791,7 +1236,6 @@ CONFIG_SYS_FSL_DSP_DDR_ADDR CONFIG_SYS_FSL_DSP_M2_RAM_ADDR CONFIG_SYS_FSL_DSP_M3_RAM_ADDR CONFIG_SYS_FSL_ERRATUM_A008751 -CONFIG_SYS_FSL_ERRATUM_A_004934 CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_FSL_ESDHC_BE CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT @@ -1799,7 +1243,6 @@ CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE CONFIG_SYS_FSL_ESDHC_LE CONFIG_SYS_FSL_ESDHC_NUM CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK -CONFIG_SYS_FSL_ESDHC_USE_PIO CONFIG_SYS_FSL_FM CONFIG_SYS_FSL_FM1_ADDR CONFIG_SYS_FSL_FM1_DTSEC1_ADDR @@ -1825,28 +1268,14 @@ CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET CONFIG_SYS_FSL_FMAN_ADDR CONFIG_SYS_FSL_GUTS_ADDR -CONFIG_SYS_FSL_I2C -CONFIG_SYS_FSL_IFC_BASE -CONFIG_SYS_FSL_IFC_BASE1 -CONFIG_SYS_FSL_IFC_BASE2 CONFIG_SYS_FSL_IFC_BE CONFIG_SYS_FSL_IFC_LE -CONFIG_SYS_FSL_IFC_SIZE -CONFIG_SYS_FSL_IFC_SIZE1 -CONFIG_SYS_FSL_IFC_SIZE1_1 -CONFIG_SYS_FSL_IFC_SIZE2 CONFIG_SYS_FSL_ISBC_VER CONFIG_SYS_FSL_JR0_ADDR CONFIG_SYS_FSL_JR0_OFFSET CONFIG_SYS_FSL_LS1_CLK_ADDR CONFIG_SYS_FSL_LSCH3_SERDES_ADDR CONFIG_SYS_FSL_MAX_NUM_OF_SEC -CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR -CONFIG_SYS_FSL_MC_BASE -CONFIG_SYS_FSL_MC_SIZE -CONFIG_SYS_FSL_NI_BASE -CONFIG_SYS_FSL_NI_SIZE -CONFIG_SYS_FSL_NO_SERDES CONFIG_SYS_FSL_NUM_CC_PLL CONFIG_SYS_FSL_NUM_CC_PLLS CONFIG_SYS_FSL_OCRAM_BASE @@ -1855,26 +1284,16 @@ CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS CONFIG_SYS_FSL_PAMU_OFFSET CONFIG_SYS_FSL_PCIE_COMPAT CONFIG_SYS_FSL_PCI_VER_3_X -CONFIG_SYS_FSL_PEBUF_BASE -CONFIG_SYS_FSL_PEBUF_SIZE CONFIG_SYS_FSL_PEX_LUT_BE CONFIG_SYS_FSL_PEX_LUT_LE CONFIG_SYS_FSL_PMIC_I2C_ADDR CONFIG_SYS_FSL_PMU_ADDR CONFIG_SYS_FSL_PMU_CLTBENR -CONFIG_SYS_FSL_QBMAN_BASE -CONFIG_SYS_FSL_QBMAN_SIZE -CONFIG_SYS_FSL_QBMAN_SIZE_1 CONFIG_SYS_FSL_QMAN_ADDR CONFIG_SYS_FSL_QMAN_OFFSET CONFIG_SYS_FSL_QMAN_V3 CONFIG_SYS_FSL_QSPI_BASE -CONFIG_SYS_FSL_QSPI_BASE1 -CONFIG_SYS_FSL_QSPI_BASE2 CONFIG_SYS_FSL_QSPI_LE -CONFIG_SYS_FSL_QSPI_SIZE -CONFIG_SYS_FSL_QSPI_SIZE1 -CONFIG_SYS_FSL_QSPI_SIZE2 CONFIG_SYS_FSL_RAID_ENGINE CONFIG_SYS_FSL_RAID_ENGINE_ADDR CONFIG_SYS_FSL_RAID_ENGINE_OFFSET @@ -1913,49 +1332,15 @@ CONFIG_SYS_FSL_SRIO_OFFSET CONFIG_SYS_FSL_SRK_LE CONFIG_SYS_FSL_TBCLK_DIV CONFIG_SYS_FSL_TIMER_ADDR -CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_FSL_USB1_PHY_ENABLE -CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_FSL_USB2_PHY_ENABLE -CONFIG_SYS_FSL_USB_CTRL_PHY_EN -CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE -CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE -CONFIG_SYS_FSL_USB_HS_DISCNCT_INC -CONFIG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV -CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN -CONFIG_SYS_FSL_USB_PLLPRG2_MFI -CONFIG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK -CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN -CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN -CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN -CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV -CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK -CONFIG_SYS_FSL_USB_PWRFLT_CR_EN -CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL -CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK -CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0 -CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3 -CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0 -CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3 -CONFIG_SYS_FSL_USB_SYS_CLK_VALID -CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN -CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK CONFIG_SYS_FSL_USDHC_NUM CONFIG_SYS_FSL_WDOG_BE CONFIG_SYS_FSL_WRIOP1_ADDR -CONFIG_SYS_FSL_WRIOP1_BASE CONFIG_SYS_FSL_WRIOP1_MDIO1 CONFIG_SYS_FSL_WRIOP1_MDIO2 -CONFIG_SYS_FSL_WRIOP1_SIZE -CONFIG_SYS_FSL_XHCI_USB1_ADDR -CONFIG_SYS_FSL_XHCI_USB2_ADDR -CONFIG_SYS_FSL_XHCI_USB3_ADDR -CONFIG_SYS_FSMC_BASE -CONFIG_SYS_FSMC_NAND_16BIT -CONFIG_SYS_FSMC_NAND_8BIT CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6 CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE CONFIG_SYS_FTPMU010_PDLLCR0_HCLKOUTDIS @@ -1992,16 +1377,10 @@ CONFIG_SYS_GPDR0_VAL CONFIG_SYS_GPDR1_VAL CONFIG_SYS_GPDR2_VAL CONFIG_SYS_GPDR3_VAL -CONFIG_SYS_GPIO1_DAT -CONFIG_SYS_GPIO1_DIR CONFIG_SYS_GPIO1_EN CONFIG_SYS_GPIO1_FUNC CONFIG_SYS_GPIO1_LED CONFIG_SYS_GPIO1_OUT -CONFIG_SYS_GPIO1_PRELIM -CONFIG_SYS_GPIO2_DAT -CONFIG_SYS_GPIO2_DIR -CONFIG_SYS_GPIO2_PRELIM CONFIG_SYS_GPIO_EN CONFIG_SYS_GPIO_FUNC CONFIG_SYS_GPIO_OUT @@ -2011,29 +1390,9 @@ CONFIG_SYS_GPSR1_VAL CONFIG_SYS_GPSR2_VAL CONFIG_SYS_GPSR3_VAL CONFIG_SYS_HALT_BEFOR_RAM_JUMP -CONFIG_SYS_HELP_CMD_WIDTH -CONFIG_SYS_HIGH CONFIG_SYS_HMI_BASE -CONFIG_SYS_HRCW_HIGH -CONFIG_SYS_HRCW_LOW CONFIG_SYS_HZ_CLOCK -CONFIG_SYS_I2C2_FSL_OFFSET -CONFIG_SYS_I2C2_OFFSET -CONFIG_SYS_I2C2_PINMUX_CLR -CONFIG_SYS_I2C2_PINMUX_REG -CONFIG_SYS_I2C2_PINMUX_SET -CONFIG_SYS_I2C_0 -CONFIG_SYS_I2C_2 -CONFIG_SYS_I2C_5 -CONFIG_SYS_I2C_BASE0 -CONFIG_SYS_I2C_BASE1 -CONFIG_SYS_I2C_BASE2 -CONFIG_SYS_I2C_BASE3 -CONFIG_SYS_I2C_BASE4 -CONFIG_SYS_I2C_BASE5 CONFIG_SYS_I2C_BUSES -CONFIG_SYS_I2C_CLK_OFFSET -CONFIG_SYS_I2C_DIRECT_BUS CONFIG_SYS_I2C_DVI_ADDR CONFIG_SYS_I2C_DVI_BUS_NUM CONFIG_SYS_I2C_EEPROM_CCID @@ -2042,13 +1401,10 @@ CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS CONFIG_SYS_I2C_EXPANDER_ADDR CONFIG_SYS_I2C_FPGA_ADDR -CONFIG_SYS_I2C_FRAM CONFIG_SYS_I2C_G762_ADDR CONFIG_SYS_I2C_IFDR_DIV CONFIG_SYS_I2C_INIT_BOARD CONFIG_SYS_I2C_LDI_ADDR -CONFIG_SYS_I2C_LPC32XX_SLAVE -CONFIG_SYS_I2C_LPC32XX_SPEED CONFIG_SYS_I2C_MAX_HOPS CONFIG_SYS_I2C_NOPROBES CONFIG_SYS_I2C_PCA953X_ADDR @@ -2062,24 +1418,7 @@ CONFIG_SYS_I2C_QIXIS_ADDR CONFIG_SYS_I2C_RTC_ADDR CONFIG_SYS_I2C_TCA642X_ADDR CONFIG_SYS_I2C_TCA642X_BUS_NUM -CONFIG_SYS_IBAT0L -CONFIG_SYS_IBAT0U -CONFIG_SYS_IBAT1L -CONFIG_SYS_IBAT1U -CONFIG_SYS_IBAT2L -CONFIG_SYS_IBAT2U -CONFIG_SYS_IBAT3L -CONFIG_SYS_IBAT3U -CONFIG_SYS_IBAT4L -CONFIG_SYS_IBAT4U -CONFIG_SYS_IBAT5L -CONFIG_SYS_IBAT5U -CONFIG_SYS_IBAT6L -CONFIG_SYS_IBAT6U -CONFIG_SYS_IBAT7L -CONFIG_SYS_IBAT7U CONFIG_SYS_ICACHE_INV -CONFIG_SYS_ICS8N3QV01_I2C CONFIG_SYS_IDE_MAXBUS CONFIG_SYS_IDE_MAXDEVICE CONFIG_SYS_IFC_ADDR @@ -2104,21 +1443,16 @@ CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_INPUT_CLKSRC CONFIG_SYS_INTERLAKEN -CONFIG_SYS_INTR_BASE CONFIG_SYS_INT_FLASH_BASE CONFIG_SYS_INT_FLASH_ENABLE CONFIG_SYS_IO_BASE -CONFIG_SYS_ISA_BASE CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS -CONFIG_SYS_ISA_MEM CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_JFFS2_FIRST_SECTOR CONFIG_SYS_JFFS2_NUM_BANKS -CONFIG_SYS_JFFS2_SORT_FRAGMENTS CONFIG_SYS_KMBEC_FPGA_BASE CONFIG_SYS_KMBEC_FPGA_SIZE -CONFIG_SYS_KWD_CONFIG CONFIG_SYS_L2_PL310 CONFIG_SYS_L2_SIZE CONFIG_SYS_L3_SIZE @@ -2142,27 +1476,20 @@ CONFIG_SYS_LBC_SDRAM_SIZE CONFIG_SYS_LDB_CLOCK CONFIG_SYS_LIME_BASE CONFIG_SYS_LIME_SIZE -CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE CONFIG_SYS_LOADS_BAUD_CHANGE CONFIG_SYS_LOW CONFIG_SYS_LOWMEM_BASE -CONFIG_SYS_LOW_RES_TIMER CONFIG_SYS_LPAE_SDRAM_BASE CONFIG_SYS_LS1_DDR_BLOCK1_SIZE CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS -CONFIG_SYS_LS_MC_DPC_IN_DDR CONFIG_SYS_LS_MC_DPC_MAX_LENGTH -CONFIG_SYS_LS_MC_DPL_IN_DDR CONFIG_SYS_LS_MC_DPL_MAX_LENGTH CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET -CONFIG_SYS_LS_MC_FW_IN_DDR -CONFIG_SYS_LS_PPA_FW_IN_xxx CONFIG_SYS_M41T11_BASE_YEAR -CONFIG_SYS_M41T11_EXT_CENTURY_DATA CONFIG_SYS_MAIN_PWR_ON CONFIG_SYS_MALLOC_SIMPLE CONFIG_SYS_MAMR @@ -2171,7 +1498,6 @@ CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_MASTER_CLOCK CONFIG_SYS_MATRIX_EBI0CSA_VAL CONFIG_SYS_MATRIX_EBICSA_VAL -CONFIG_SYS_MATRIX_MCFG_REMAP CONFIG_SYS_MAXARGS CONFIG_SYS_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT @@ -2179,39 +1505,32 @@ CONFIG_SYS_MAX_FLASH_SECT CONFIG_SYS_MAX_I2C_BUS CONFIG_SYS_MAX_NAND_CHIPS CONFIG_SYS_MAX_NAND_DEVICE -CONFIG_SYS_MAX_PCI_EPS CONFIG_SYS_MBAR CONFIG_SYS_MBAR2 CONFIG_SYS_MCATT0_VAL CONFIG_SYS_MCATT1_VAL CONFIG_SYS_MCFRRTC_BASE -CONFIG_SYS_MCFRTC_BASE -CONFIG_SYS_MCF_SYNCR CONFIG_SYS_MCIO0_VAL CONFIG_SYS_MCIO1_VAL CONFIG_SYS_MCKR CONFIG_SYS_MCKR1_VAL CONFIG_SYS_MCKR2_VAL CONFIG_SYS_MCKR_CSS -CONFIG_SYS_MCKR_VAL CONFIG_SYS_MCMEM0_VAL CONFIG_SYS_MCMEM1_VAL CONFIG_SYS_MDCNFG_VAL CONFIG_SYS_MDIO1_OFFSET -CONFIG_SYS_MDIO_BASE_ADDR CONFIG_SYS_MDMRS_VAL CONFIG_SYS_MDREFR_VAL CONFIG_SYS_MECR_VAL CONFIG_SYS_MEMAC_LITTLE_ENDIAN CONFIG_SYS_MEMORY_BASE CONFIG_SYS_MEMORY_SIZE -CONFIG_SYS_MEM_MAP CONFIG_SYS_MEM_RESERVE_SECURE CONFIG_SYS_MEM_SIZE CONFIG_SYS_MEM_TOP_HIDE CONFIG_SYS_MFD CONFIG_SYS_MHZ -CONFIG_SYS_MII_MODE CONFIG_SYS_MIPS_TIMER_FREQ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS @@ -2234,8 +1553,6 @@ CONFIG_SYS_MPC83xx_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_OFFSET CONFIG_SYS_MPC83xx_USB1_ADDR CONFIG_SYS_MPC83xx_USB1_OFFSET -CONFIG_SYS_MPC83xx_USB2_ADDR -CONFIG_SYS_MPC83xx_USB2_OFFSET CONFIG_SYS_MPC85XX_NO_RESETVEC CONFIG_SYS_MPC85xx_CPM_ADDR CONFIG_SYS_MPC85xx_CPM_OFFSET @@ -2296,42 +1613,24 @@ CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET CONFIG_SYS_MPC8xxx_DDR2_OFFSET CONFIG_SYS_MPC8xxx_DDR3_OFFSET CONFIG_SYS_MPC8xxx_DDR_OFFSET -CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC8xxx_PIC_ADDR -CONFIG_SYS_MPC92469AC CONFIG_SYS_MRAM_BASE CONFIG_SYS_MRAM_SIZE CONFIG_SYS_MSC0_VAL CONFIG_SYS_MSC1_VAL CONFIG_SYS_MSC2_VAL -CONFIG_SYS_MX5_CLK32 -CONFIG_SYS_MX5_HCLK -CONFIG_SYS_MX6_CLK32 -CONFIG_SYS_MX6_HCLK -CONFIG_SYS_MX7_CLK32 -CONFIG_SYS_MX7_HCLK -CONFIG_SYS_MXS_VDD5V_ONLY CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST -CONFIG_SYS_NAND_ACTL_ALE -CONFIG_SYS_NAND_ACTL_CLE -CONFIG_SYS_NAND_ACTL_DELAY -CONFIG_SYS_NAND_ACTL_NCE -CONFIG_SYS_NAND_ALE CONFIG_SYS_NAND_AMASK CONFIG_SYS_NAND_BASE CONFIG_SYS_NAND_BASE2 CONFIG_SYS_NAND_BASE_LIST CONFIG_SYS_NAND_BASE_PHYS -CONFIG_SYS_NAND_BOOT CONFIG_SYS_NAND_BR_PRELIM -CONFIG_SYS_NAND_BUSWIDTH_16 -CONFIG_SYS_NAND_CLE CONFIG_SYS_NAND_CS CONFIG_SYS_NAND_CSOR CONFIG_SYS_NAND_CSPR CONFIG_SYS_NAND_CSPR_EXT CONFIG_SYS_NAND_DATA_BASE -CONFIG_SYS_NAND_DBW_16 CONFIG_SYS_NAND_DBW_8 CONFIG_SYS_NAND_DDR_LAW CONFIG_SYS_NAND_ECCBYTES @@ -2349,8 +1648,6 @@ CONFIG_SYS_NAND_FTIM3 CONFIG_SYS_NAND_HW_ECC CONFIG_SYS_NAND_HW_ECC_OOBFIRST CONFIG_SYS_NAND_LARGEPAGE -CONFIG_SYS_NAND_LBLAWAR_PRELIM -CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_NAND_MASK_ALE CONFIG_SYS_NAND_MASK_CLE CONFIG_SYS_NAND_MAX_ECCPOS @@ -2360,10 +1657,8 @@ CONFIG_SYS_NAND_NO_SUBPAGE_WRITE CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_NAND_PAGE_2K CONFIG_SYS_NAND_PAGE_4K -CONFIG_SYS_NAND_QUIET CONFIG_SYS_NAND_READY_PIN CONFIG_SYS_NAND_REGS_BASE -CONFIG_SYS_NAND_SELECT_DEVICE CONFIG_SYS_NAND_SIZE CONFIG_SYS_NAND_SPL_KERNEL_OFFS CONFIG_SYS_NAND_U_BOOT_DST @@ -2387,14 +1682,12 @@ CONFIG_SYS_NOR_FTIM1 CONFIG_SYS_NOR_FTIM2 CONFIG_SYS_NOR_FTIM3 CONFIG_SYS_NS16550_CLK -CONFIG_SYS_NS16550_CLK_DIV CONFIG_SYS_NS16550_COM1 CONFIG_SYS_NS16550_COM2 CONFIG_SYS_NS16550_COM3 CONFIG_SYS_NS16550_COM4 CONFIG_SYS_NS16550_COM5 CONFIG_SYS_NS16550_COM6 -CONFIG_SYS_NS16550_IER CONFIG_SYS_NS16550_MEM32 CONFIG_SYS_NS16550_PORT_MAPPED CONFIG_SYS_NS16550_REG_SIZE @@ -2406,22 +1699,15 @@ CONFIG_SYS_NUM_FM2_10GEC CONFIG_SYS_NUM_FM2_DTSEC CONFIG_SYS_NUM_FMAN CONFIG_SYS_NUM_I2C_BUSES -CONFIG_SYS_NUM_IRQS -CONFIG_SYS_NVRAM_ACCESS_ROUTINE CONFIG_SYS_NVRAM_BASE_ADDR CONFIG_SYS_NVRAM_SIZE CONFIG_SYS_OBIR -CONFIG_SYS_OHCI_BE_CONTROLLER CONFIG_SYS_OHCI_SWAP_REG_ACCESS CONFIG_SYS_OMAP_ABE_SYSCK CONFIG_SYS_ONENAND_BASE CONFIG_SYS_ONENAND_BLOCK_SIZE -CONFIG_SYS_ONENAND_PAGE_SIZE -CONFIG_SYS_OR0_REMAP -CONFIG_SYS_OR1_REMAP CONFIG_SYS_OR_TIMING_MRAM CONFIG_SYS_OSCIN_FREQ -CONFIG_SYS_OSD_DH CONFIG_SYS_OSPR_OFFSET CONFIG_SYS_PACNT CONFIG_SYS_PADAT @@ -2437,7 +1723,6 @@ CONFIG_SYS_PBDDR CONFIG_SYS_PBI_FLASH_BASE CONFIG_SYS_PBI_FLASH_WINDOW CONFIG_SYS_PBSIZE -CONFIG_SYS_PCA953X_NVM_WP CONFIG_SYS_PCCNT CONFIG_SYS_PCDAT CONFIG_SYS_PCDDR @@ -2454,7 +1739,6 @@ CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_SIZE CONFIG_SYS_PCI1_MEM_VIRT CONFIG_SYS_PCI2_ADDR -CONFIG_SYS_PCI64_MEMORY_BUS CONFIG_SYS_PCIE CONFIG_SYS_PCIE1_ADDR CONFIG_SYS_PCIE1_BASE @@ -2468,10 +1752,8 @@ CONFIG_SYS_PCIE1_MEM_BASE CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_SIZE CONFIG_SYS_PCIE1_MEM_VIRT -CONFIG_SYS_PCIE1_NAME CONFIG_SYS_PCIE1_PHYS_ADDR CONFIG_SYS_PCIE1_PHYS_BASE -CONFIG_SYS_PCIE1_PHYS_SIZE CONFIG_SYS_PCIE1_VIRT_ADDR CONFIG_SYS_PCIE2_ADDR CONFIG_SYS_PCIE2_BASE @@ -2485,17 +1767,14 @@ CONFIG_SYS_PCIE2_MEM_BASE CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_SIZE CONFIG_SYS_PCIE2_MEM_VIRT -CONFIG_SYS_PCIE2_NAME CONFIG_SYS_PCIE2_PHYS_ADDR CONFIG_SYS_PCIE2_PHYS_BASE -CONFIG_SYS_PCIE2_PHYS_SIZE CONFIG_SYS_PCIE2_VIRT_ADDR CONFIG_SYS_PCIE3_ADDR CONFIG_SYS_PCIE3_IO_PHYS CONFIG_SYS_PCIE3_IO_VIRT CONFIG_SYS_PCIE3_MEM_PHYS CONFIG_SYS_PCIE3_MEM_VIRT -CONFIG_SYS_PCIE3_NAME CONFIG_SYS_PCIE3_PHYS_ADDR CONFIG_SYS_PCIE3_PHYS_SIZE CONFIG_SYS_PCIE4_ADDR @@ -2504,68 +1783,33 @@ CONFIG_SYS_PCIE4_IO_VIRT CONFIG_SYS_PCIE4_MEM_BUS CONFIG_SYS_PCIE4_MEM_PHYS CONFIG_SYS_PCIE4_MEM_VIRT -CONFIG_SYS_PCIE4_NAME CONFIG_SYS_PCIE4_PHYS_ADDR -CONFIG_SYS_PCIE4_PHYS_SIZE CONFIG_SYS_PCIE_MMAP_SIZE -CONFIG_SYS_PCI_BAR0 -CONFIG_SYS_PCI_BAR1 -CONFIG_SYS_PCI_BAR2 -CONFIG_SYS_PCI_BAR3 -CONFIG_SYS_PCI_BAR4 -CONFIG_SYS_PCI_BAR5 -CONFIG_SYS_PCI_CACHE_LINE_SIZE -CONFIG_SYS_PCI_CFG_PHYS -CONFIG_SYS_PCI_EP_MEMORY_BASE CONFIG_SYS_PCI_IO_BASE -CONFIG_SYS_PCI_IO_BUS CONFIG_SYS_PCI_IO_PHYS CONFIG_SYS_PCI_IO_SIZE CONFIG_SYS_PCI_MAP_END CONFIG_SYS_PCI_MAP_START -CONFIG_SYS_PCI_MEMORY_BUS -CONFIG_SYS_PCI_MEMORY_PHYS -CONFIG_SYS_PCI_MEMORY_SIZE CONFIG_SYS_PCI_MEM_BASE -CONFIG_SYS_PCI_MEM_BUS CONFIG_SYS_PCI_MEM_PHYS CONFIG_SYS_PCI_MEM_SIZE CONFIG_SYS_PCI_MMIO_BASE CONFIG_SYS_PCI_MMIO_PHYS CONFIG_SYS_PCI_MMIO_SIZE -CONFIG_SYS_PCI_NR_INBOUND_WIN CONFIG_SYS_PCI_SLV_MEM_BUS CONFIG_SYS_PCI_SLV_MEM_LOCAL CONFIG_SYS_PCI_SLV_MEM_SIZE -CONFIG_SYS_PCI_SYS_MEM_BUS -CONFIG_SYS_PCI_SYS_MEM_PHYS -CONFIG_SYS_PCI_SYS_MEM_SIZE -CONFIG_SYS_PCI_TBATR0 -CONFIG_SYS_PCI_TBATR1 -CONFIG_SYS_PCI_TBATR2 -CONFIG_SYS_PCI_TBATR3 -CONFIG_SYS_PCI_TBATR4 -CONFIG_SYS_PCI_TBATR5 CONFIG_SYS_PDCNT CONFIG_SYS_PEHLPAR -CONFIG_SYS_PEPAR -CONFIG_SYS_PFPAR -CONFIG_SYS_PHY_UBOOT_BASE -CONFIG_SYS_PIOC_ASR_VAL -CONFIG_SYS_PIOC_BSR_VAL CONFIG_SYS_PIOC_PDR_VAL CONFIG_SYS_PIOC_PDR_VAL1 CONFIG_SYS_PIOC_PPUDR_VAL CONFIG_SYS_PIOD_PDR_VAL1 CONFIG_SYS_PIOD_PPUDR_VAL CONFIG_SYS_PIO_MODE -CONFIG_SYS_PIXIS_VBOOT_ENABLE -CONFIG_SYS_PIXIS_VBOOT_MASK -CONFIG_SYS_PIXIS_VCFGEN0_ENABLE CONFIG_SYS_PJPAR CONFIG_SYS_PL310_BASE CONFIG_SYS_PLLAR_VAL -CONFIG_SYS_PLLBR_VAL CONFIG_SYS_PLLCR CONFIG_SYS_PLL_BYPASS CONFIG_SYS_PLL_FDR @@ -2575,44 +1819,9 @@ CONFIG_SYS_PMAN CONFIG_SYS_PMC_BASE CONFIG_SYS_PMC_BASE_PHYS CONFIG_SYS_PME_CLK -CONFIG_SYS_PORTTC -CONFIG_SYS_POST_BSPEC1 -CONFIG_SYS_POST_BSPEC2 -CONFIG_SYS_POST_BSPEC3 -CONFIG_SYS_POST_BSPEC4 -CONFIG_SYS_POST_BSPEC5 -CONFIG_SYS_POST_CACHE -CONFIG_SYS_POST_CODEC -CONFIG_SYS_POST_COPROC -CONFIG_SYS_POST_CPU -CONFIG_SYS_POST_DSP -CONFIG_SYS_POST_ECC -CONFIG_SYS_POST_ETHER -CONFIG_SYS_POST_FLASH -CONFIG_SYS_POST_FLASH_END -CONFIG_SYS_POST_FLASH_NUM -CONFIG_SYS_POST_FLASH_START -CONFIG_SYS_POST_FPU -CONFIG_SYS_POST_HOTKEYS_GPIO -CONFIG_SYS_POST_I2C -CONFIG_SYS_POST_I2C_ADDRS -CONFIG_SYS_POST_I2C_IGNORES CONFIG_SYS_POST_MEMORY CONFIG_SYS_POST_MEM_REGIONS -CONFIG_SYS_POST_OCM -CONFIG_SYS_POST_RTC -CONFIG_SYS_POST_SPR -CONFIG_SYS_POST_SYSMON -CONFIG_SYS_POST_UART -CONFIG_SYS_POST_USB -CONFIG_SYS_POST_WATCHDOG -CONFIG_SYS_POST_WORD_ADDR -CONFIG_SYS_PPC_DDR_WIMGE -CONFIG_SYS_PQSPAR -CONFIG_SYS_PSDPAR CONFIG_SYS_PSSR_VAL -CONFIG_SYS_PTCPAR -CONFIG_SYS_PTDPAR CONFIG_SYS_PTV CONFIG_SYS_PUAPAR CONFIG_SYS_QMAN_CENA_BASE @@ -2633,10 +1842,8 @@ CONFIG_SYS_RCAR_I2C0_BASE CONFIG_SYS_RCAR_I2C1_BASE CONFIG_SYS_RCAR_I2C2_BASE CONFIG_SYS_RCAR_I2C3_BASE -CONFIG_SYS_READ_SPD CONFIG_SYS_RESET_ADDR CONFIG_SYS_RESET_ADDRESS -CONFIG_SYS_RESET_SCTRL CONFIG_SYS_RFD CONFIG_SYS_RGMII1_PHY_ADDR CONFIG_SYS_RGMII2_PHY_ADDR @@ -2648,8 +1855,6 @@ CONFIG_SYS_ROM_BASE CONFIG_SYS_RSTC_RMR_VAL CONFIG_SYS_RTC_BUS_NUM CONFIG_SYS_RTC_CNT -CONFIG_SYS_RTC_OSCILLATOR -CONFIG_SYS_RTC_REG_BASE_ADDR CONFIG_SYS_RTC_SETUP CONFIG_SYS_RX_ETH_BUFFER CONFIG_SYS_SATA @@ -2659,45 +1864,22 @@ CONFIG_SYS_SATA1_OFFSET CONFIG_SYS_SATA2 CONFIG_SYS_SATA2_FLAGS CONFIG_SYS_SATA2_OFFSET -CONFIG_SYS_SATA_ENV_DEV CONFIG_SYS_SATA_FAT_BOOT_PARTITION CONFIG_SYS_SATA_MAX_DEVICE CONFIG_SYS_SBFHDR_DATA_OFFSET CONFIG_SYS_SBFHDR_SIZE -CONFIG_SYS_SCCR_ENCCM -CONFIG_SYS_SCCR_PCICM -CONFIG_SYS_SCCR_PCIEXP1CM -CONFIG_SYS_SCCR_PCIEXP2CM CONFIG_SYS_SCCR_SATACM CONFIG_SYS_SCCR_TSEC1CM -CONFIG_SYS_SCCR_TSEC1ON CONFIG_SYS_SCCR_TSEC2CM -CONFIG_SYS_SCCR_TSEC2ON -CONFIG_SYS_SCCR_TSECCM CONFIG_SYS_SCCR_USBDRCM -CONFIG_SYS_SCCR_USBMPHCM CONFIG_SYS_SCR CONFIG_SYS_SCSI_MAX_DEVICE CONFIG_SYS_SCSI_MAX_LUN CONFIG_SYS_SCSI_MAX_SCSI_ID -CONFIG_SYS_SDIO0 -CONFIG_SYS_SDIO0_MAX_CLK -CONFIG_SYS_SDIO1 -CONFIG_SYS_SDIO1_MAX_CLK -CONFIG_SYS_SDIO2 -CONFIG_SYS_SDIO2_MAX_CLK -CONFIG_SYS_SDIO3 -CONFIG_SYS_SDIO3_MAX_CLK -CONFIG_SYS_SDIO_BASE0 -CONFIG_SYS_SDIO_BASE1 -CONFIG_SYS_SDIO_BASE2 -CONFIG_SYS_SDIO_BASE3 CONFIG_SYS_SDRAM -CONFIG_SYS_SDRAM1 CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE0 CONFIG_SYS_SDRAM_BASE1 -CONFIG_SYS_SDRAM_BASE1xx CONFIG_SYS_SDRAM_BASE2 CONFIG_SYS_SDRAM_CFG CONFIG_SYS_SDRAM_CFG1 @@ -2707,7 +1889,6 @@ CONFIG_SYS_SDRAM_EMOD CONFIG_SYS_SDRAM_MODE CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0 -CONFIG_SYS_SDRAM_SIZE1 CONFIG_SYS_SDRAM_SIZE_LAW CONFIG_SYS_SDRAM_VAL CONFIG_SYS_SDRAM_VAL1 @@ -2756,13 +1937,10 @@ CONFIG_SYS_SH_SDHI3_BASE CONFIG_SYS_SH_SDHI_NR_CHANNEL CONFIG_SYS_SICRH CONFIG_SYS_SICRL -CONFIG_SYS_SIL1178_I2C CONFIG_SYS_SMC0_CYCLE0_VAL CONFIG_SYS_SMC0_MODE0_VAL CONFIG_SYS_SMC0_PULSE0_VAL CONFIG_SYS_SMC0_SETUP0_VAL -CONFIG_SYS_SMC_CSR0_VAL -CONFIG_SYS_SPCR_OPT CONFIG_SYS_SPD_BUS_NUM CONFIG_SYS_SPI_ARGS_OFFS CONFIG_SYS_SPI_ARGS_SIZE @@ -2773,8 +1951,6 @@ CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE CONFIG_SYS_SPI_FLASH_U_BOOT_START CONFIG_SYS_SPI_KERNEL_OFFS -CONFIG_SYS_SPI_MXC_WAIT -CONFIG_SYS_SPI_RTC_DEVID CONFIG_SYS_SPI_ST_ENABLE_WP_PIN CONFIG_SYS_SPI_U_BOOT_SIZE CONFIG_SYS_SPL_ARGS_ADDR @@ -2796,8 +1972,6 @@ CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS CONFIG_SYS_SST_SECT CONFIG_SYS_SST_SECTSZ CONFIG_SYS_STACK_SIZE -CONFIG_SYS_STATUS_C -CONFIG_SYS_STATUS_OK CONFIG_SYS_SXCNFG_VAL CONFIG_SYS_TBIPA_VALUE CONFIG_SYS_TCLK @@ -2805,30 +1979,17 @@ CONFIG_SYS_TIMERBASE CONFIG_SYS_TIMER_BASE CONFIG_SYS_TIMER_COUNTER CONFIG_SYS_TIMER_COUNTS_DOWN -CONFIG_SYS_TIMER_PRESCALER CONFIG_SYS_TIMER_RATE CONFIG_SYS_TMPVIRT -CONFIG_SYS_TMRINTR_MASK -CONFIG_SYS_TMRINTR_NO -CONFIG_SYS_TMRINTR_PEND -CONFIG_SYS_TMRINTR_PRI -CONFIG_SYS_TMRPND_REG -CONFIG_SYS_TMR_BASE CONFIG_SYS_TSEC1_OFFSET CONFIG_SYS_TSEC2_OFFSET CONFIG_SYS_TSEC3_OFFSET CONFIG_SYS_TX_ETH_BUFFER -CONFIG_SYS_UART1_ALT1_GPIO -CONFIG_SYS_UART2_ALT1_GPIO CONFIG_SYS_UART2_ALT3_GPIO -CONFIG_SYS_UART2_PRI_GPIO -CONFIG_SYS_UART_BASE CONFIG_SYS_UART_PORT CONFIG_SYS_UBOOT_BASE CONFIG_SYS_UBOOT_START -CONFIG_SYS_UDELAY_BASE CONFIG_SYS_UEC -CONFIG_SYS_UEC1_PHY_ADDR CONFIG_SYS_UEC2_ETH_TYPE CONFIG_SYS_UEC2_INTERFACE_SPEED CONFIG_SYS_UEC2_INTERFACE_TYPE @@ -2836,13 +1997,8 @@ CONFIG_SYS_UEC2_PHY_ADDR CONFIG_SYS_UEC2_RX_CLK CONFIG_SYS_UEC2_TX_CLK CONFIG_SYS_UEC2_UCC_NUM -CONFIG_SYS_UEC3_PHY_ADDR -CONFIG_SYS_UEC4_PHY_ADDR -CONFIG_SYS_UECx_PHY_ADDR CONFIG_SYS_ULB_CLK CONFIG_SYS_UNIFY_CACHE -CONFIG_SYS_UNSPEC_PHYID -CONFIG_SYS_UNSPEC_STRID CONFIG_SYS_USB_FAT_BOOT_PARTITION CONFIG_SYS_USB_OHCI_BOARD_INIT CONFIG_SYS_USB_OHCI_CPU_INIT @@ -2855,7 +2011,6 @@ CONFIG_SYS_USE_DATAFLASH_CS0 CONFIG_SYS_USE_DATAFLASH_CS1 CONFIG_SYS_USE_DATAFLASH_CS3 CONFIG_SYS_USE_FLASH -CONFIG_SYS_USE_MAIN_OSCILLATOR CONFIG_SYS_USE_MMC CONFIG_SYS_USE_NAND CONFIG_SYS_USE_NANDFLASH @@ -2864,7 +2019,6 @@ CONFIG_SYS_USR_EXCEP CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT -CONFIG_SYS_VCXK_AUTODETECT CONFIG_SYS_VCXK_BASE CONFIG_SYS_VCXK_DEFAULT_LINEALIGN CONFIG_SYS_VCXK_DOUBLEBUFFERED @@ -2877,34 +2031,24 @@ CONFIG_SYS_VCXK_INVERT_PORT CONFIG_SYS_VCXK_REQUEST_DDR CONFIG_SYS_VCXK_REQUEST_PIN CONFIG_SYS_VCXK_REQUEST_PORT -CONFIG_SYS_VCXK_RESET_DDR -CONFIG_SYS_VCXK_RESET_PIN -CONFIG_SYS_VCXK_RESET_PORT CONFIG_SYS_VIDEO_LOGO_MAX_SIZE CONFIG_SYS_VSC7385_BASE CONFIG_SYS_VSC7385_BASE_PHYS CONFIG_SYS_VSC7385_BR_PRELIM CONFIG_SYS_VSC7385_OR_PRELIM -CONFIG_SYS_WATCHDOG_FREQ CONFIG_SYS_WATCHDOG_VALUE CONFIG_SYS_WDTC_WDMR_VAL CONFIG_SYS_WRITE_SWAPPED_DATA CONFIG_SYS_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB3_ADDR -CONFIG_SYS_XIMG_LEN -CONFIG_TAM3517_SETTINGS CONFIG_TCA642X CONFIG_TEGRA_BOARD_STRING CONFIG_TEGRA_CLOCK_SCALING CONFIG_TEGRA_ENABLE_UARTA -CONFIG_TEGRA_ENABLE_UARTB -CONFIG_TEGRA_ENABLE_UARTC CONFIG_TEGRA_ENABLE_UARTD -CONFIG_TEGRA_ENABLE_UARTE CONFIG_TEGRA_GPU CONFIG_TEGRA_LP0 -CONFIG_TEGRA_NAND CONFIG_TEGRA_PMU CONFIG_TEGRA_SLINK_CTRLS CONFIG_TEGRA_SPI @@ -2914,8 +2058,6 @@ CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 CONFIG_TESTPIN_MASK CONFIG_TESTPIN_REG -CONFIG_TEST_LIST_SORT -CONFIG_TFTP_FILE_NAME_MAX_LEN CONFIG_TFTP_PORT CONFIG_THOR_RESET_OFF CONFIG_THUNDERX @@ -2939,7 +2081,6 @@ CONFIG_TSECV2 CONFIG_TSECV2_1 CONFIG_TSEC_TBICR_SETTINGS CONFIG_TWL6030_POWER -CONFIG_TX_DESCR_NUM CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_UBIFS_VOLUME CONFIG_UBI_PART @@ -2949,130 +2090,53 @@ CONFIG_UBOOT_SECTOR_COUNT CONFIG_UBOOT_SECTOR_START CONFIG_UDP_CHECKSUM CONFIG_UEC_ETH -CONFIG_UEC_ETH1 CONFIG_UEC_ETH2 -CONFIG_UEC_ETH3 -CONFIG_UEC_ETH4 -CONFIG_UEC_ETH5 -CONFIG_UEC_ETH6 -CONFIG_UEC_ETH7 -CONFIG_UEC_ETH8 -CONFIG_UID16 -CONFIG_ULPI_REF_CLK CONFIG_UPDATEB -CONFIG_UPDATE_LOAD_ADDR CONFIG_USART_BASE CONFIG_USART_ID -CONFIG_USBD_CONFIGURATION_STR -CONFIG_USBD_CTRL_INTERFACE_STR -CONFIG_USBD_DATA_INTERFACE_STR CONFIG_USBD_HS CONFIG_USBD_MANUFACTURER CONFIG_USBD_PRODUCTID_CDCACM CONFIG_USBD_PRODUCTID_GSERIAL CONFIG_USBD_PRODUCT_NAME -CONFIG_USBD_SERIAL_BULK_HS_PKTSIZE -CONFIG_USBD_SERIAL_BULK_PKTSIZE -CONFIG_USBD_SERIAL_INT_ENDPOINT -CONFIG_USBD_SERIAL_INT_PKTSIZE -CONFIG_USBD_SERIAL_IN_ENDPOINT -CONFIG_USBD_SERIAL_IN_PKTSIZE -CONFIG_USBD_SERIAL_OUT_ENDPOINT -CONFIG_USBD_SERIAL_OUT_PKTSIZE CONFIG_USBD_VENDORID CONFIG_USBNET_DEV_ADDR CONFIG_USB_ATMEL CONFIG_USB_ATMEL_CLK_SEL_PLLB CONFIG_USB_ATMEL_CLK_SEL_UPLL -CONFIG_USB_BIN_FIXUP CONFIG_USB_BOOTING CONFIG_USB_DEVICE CONFIG_USB_DEV_BASE -CONFIG_USB_DEV_PULLUP_GPIO -CONFIG_USB_EHCI_BASE -CONFIG_USB_EHCI_BASE_LIST CONFIG_USB_EHCI_EXYNOS -CONFIG_USB_EHCI_FARADAY CONFIG_USB_EHCI_TXFIFO_THRESH -CONFIG_USB_ETH_QMULT -CONFIG_USB_ETH_SUBSET CONFIG_USB_EXT2_BOOT CONFIG_USB_FAT_BOOT -CONFIG_USB_GADGET_AMD5536UDC CONFIG_USB_GADGET_AT91 -CONFIG_USB_GADGET_DUMMY_HCD CONFIG_USB_GADGET_DWC2_OTG_PHY -CONFIG_USB_GADGET_FOTG210 -CONFIG_USB_GADGET_FSL_USB2 -CONFIG_USB_GADGET_GOKU -CONFIG_USB_GADGET_IMX -CONFIG_USB_GADGET_M66592 -CONFIG_USB_GADGET_MQ11XX -CONFIG_USB_GADGET_MUSBHSFC -CONFIG_USB_GADGET_N9604 -CONFIG_USB_GADGET_NET2280 -CONFIG_USB_GADGET_OMAP -CONFIG_USB_GADGET_PXA27X -CONFIG_USB_GADGET_PXA2XX -CONFIG_USB_GADGET_SA1100 -CONFIG_USB_INVENTRA_DMA CONFIG_USB_ISP1301_I2C_ADDR CONFIG_USB_MAX_CONTROLLER_COUNT -CONFIG_USB_MUSB_TIMEOUT -CONFIG_USB_MUSB_TUSB6010 CONFIG_USB_OHCI_LPC32XX CONFIG_USB_OHCI_NEW -CONFIG_USB_OTG -CONFIG_USB_OTG_BLACKLIST_HUB -CONFIG_USB_PXA25X_SMALL -CONFIG_USB_TI_CPPI_DMA CONFIG_USB_TTY -CONFIG_USB_TUSB_OMAP_DMA -CONFIG_USB_ULPI_TIMEOUT CONFIG_USB_XHCI_EXYNOS CONFIG_USE_INTERRUPT CONFIG_USE_ONENAND_BOARD_INIT -CONFIG_UTBIPAR_INIT_TBIPA -CONFIG_U_BOOT_HDR_ADDR CONFIG_U_BOOT_HDR_SIZE CONFIG_VAR_SIZE_SPL CONFIG_VERY_BIG_RAM CONFIG_VIDEO_BCM2835 CONFIG_VIDEO_BMP_LOGO CONFIG_VIDEO_DA8XX -CONFIG_VIDEO_FONT_4X6 CONFIG_VIDEO_LOGO -CONFIG_VIDEO_MXS_MODE_SYSTEM -CONFIG_VIDEO_STD_TIMINGS -CONFIG_VID_FLS_ENV -CONFIG_VM86 -CONFIG_VOIPAC_LCD -CONFIG_VOL_MONITOR_INA220 -CONFIG_VOL_MONITOR_IR36021_READ -CONFIG_VOL_MONITOR_IR36021_SET CONFIG_VSC7385_ENET CONFIG_VSC7385_IMAGE CONFIG_VSC7385_IMAGE_SIZE CONFIG_VSC9953 -CONFIG_WATCHDOG_NOWAYOUT CONFIG_WATCHDOG_PRESC CONFIG_WATCHDOG_RC CONFIG_WATCHDOG_TIMEOUT -CONFIG_WD_PERIOD -CONFIG_X86EMU_DEBUG CONFIG_X86EMU_RAW_IO CONFIG_X86_MRC_ADDR CONFIG_X86_REFCODE_ADDR CONFIG_X86_REFCODE_RUN_ADDR -CONFIG_XGI_XG22_BASE -CONFIG_XSENGINE CONFIG_XTFPGA -CONFIG_YAFFS_AUTO_UNICODE -CONFIG_YAFFS_CASE_INSENSITIVE -CONFIG_YAFFS_DEFINES_TYPES -CONFIG_YAFFS_UNICODE -CONFIG_YAFFS_UTIL -CONFIG_YAFFS_WINCE -CONFIG_YELLOW_LED -CONFIG_ZLT -CONFIG_eTSEC_MDIO_BUS |