diff options
641 files changed, 5184 insertions, 4490 deletions
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 947c400f8d..30025ff751 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -2,7 +2,7 @@ variables: windows_vm: windows-2019 ubuntu_vm: ubuntu-22.04 macos_vm: macOS-12 - ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20230126-10Feb2023 + ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20230126-17Feb2023 # Add '-u 0' options for Azure pipelines, otherwise we get "permission # denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer", # since our $(ci_runner_image) user is not root. @@ -187,6 +187,13 @@ stages: options: $(container_option) steps: - script: | + mkdir nokia_rx51_tmp + ln -s /opt/nokia/u-boot-gen-combined nokia_rx51_tmp/ + ln -s /opt/nokia/qemu-n900.tar.gz nokia_rx51_tmp/ + ln -s /opt/nokia/kernel_2.6.28-20103103+0m5_armel.deb nokia_rx51_tmp/ + ln -s /opt/nokia/libc6_2.5.1-1eglibc27+0m5_armel.deb nokia_rx51_tmp/ + ln -s /opt/nokia/busybox_1.10.2.legal-1osso30+0m5_armel.deb nokia_rx51_tmp/ + ln -s /opt/nokia/qemu-system-arm nokia_rx51_tmp/ export PATH=/opt/gcc-12.2.0-nolibc/arm-linux-gnueabi/bin:$PATH test/nokia_rx51_test.sh @@ -213,6 +220,18 @@ stages: export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt make pylint_err + - job: check_for_pre_schema_tags + displayName: 'Check for pre-schema driver model tags' + pool: + vmImage: $(ubuntu_vm) + container: + image: $(ci_runner_image) + options: $(container_option) + steps: + # If grep succeeds and finds a match the test fails as we should + # have no matches. + - script: git grep u-boot,dm- -- '*.dts*' && exit 1 || exit 0 + - stage: test_py jobs: - job: test_py diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 272d69e220..e320a24ef3 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -2,7 +2,7 @@ # Grab our configured image. The source for this is found # in the u-boot tree at tools/docker/Dockerfile -image: trini/u-boot-gitlab-ci-runner:jammy-20230126-10Feb2023 +image: trini/u-boot-gitlab-ci-runner:jammy-20230126-17Feb2023 # We run some tests in different order, to catch some failures quicker. stages: @@ -213,7 +213,14 @@ Run binman, buildman, dtoc, Kconfig and patman testsuites: Run tests for Nokia RX-51 (aka N900): stage: testsuites script: - - export PATH=/opt/gcc-12.2.0-nolibc/arm-linux-gnueabi/bin:$PATH; + - mkdir nokia_rx51_tmp; + ln -s /opt/nokia/u-boot-gen-combined nokia_rx51_tmp/; + ln -s /opt/nokia/qemu-n900.tar.gz nokia_rx51_tmp/; + ln -s /opt/nokia/kernel_2.6.28-20103103+0m5_armel.deb nokia_rx51_tmp/; + ln -s /opt/nokia/libc6_2.5.1-1eglibc27+0m5_armel.deb nokia_rx51_tmp/; + ln -s /opt/nokia/busybox_1.10.2.legal-1osso30+0m5_armel.deb nokia_rx51_tmp/; + ln -s /opt/nokia/qemu-system-arm nokia_rx51_tmp/; + export PATH=/opt/gcc-12.2.0-nolibc/arm-linux-gnueabi/bin:$PATH; test/nokia_rx51_test.sh # Check for any pylint regressions @@ -235,6 +242,15 @@ Run pylint: - export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt" - make pylint_err +# Check for pre-schema driver model tags +Check for pre-schema tags: + stage: testsuites + script: + - git config --global --add safe.directory "${CI_PROJECT_DIR}"; + # If grep succeeds and finds a match the test fails as we should + # have no matches. + - git grep u-boot,dm- -- '*.dts*' && exit 1 || exit 0 + # Test sandbox with test.py sandbox test.py: variables: diff --git a/arch/arc/dts/abilis_tb100.dts b/arch/arc/dts/abilis_tb100.dts index 19e45b9c66..8f72e1aff4 100644 --- a/arch/arc/dts/abilis_tb100.dts +++ b/arch/arc/dts/abilis_tb100.dts @@ -18,7 +18,7 @@ #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <500000000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arc/dts/axc001.dtsi b/arch/arc/dts/axc001.dtsi index 412580a380..93d99186c3 100644 --- a/arch/arc/dts/axc001.dtsi +++ b/arch/arc/dts/axc001.dtsi @@ -11,7 +11,7 @@ #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <750000000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arc/dts/axc003.dtsi b/arch/arc/dts/axc003.dtsi index 75a9de61de..7765d8efa7 100644 --- a/arch/arc/dts/axc003.dtsi +++ b/arch/arc/dts/axc003.dtsi @@ -11,7 +11,7 @@ #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arc/dts/axs10x_mb.dtsi b/arch/arc/dts/axs10x_mb.dtsi index d4ff4f7039..3a7f939a00 100644 --- a/arch/arc/dts/axs10x_mb.dtsi +++ b/arch/arc/dts/axs10x_mb.dtsi @@ -13,11 +13,11 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x00000000 0xe0000000 0x10000000>; - u-boot,dm-pre-reloc; + bootph-all; clocks { compatible = "simple-bus"; - u-boot,dm-pre-reloc; + bootph-all; apbclk: apbclk { compatible = "fixed-clock"; @@ -29,7 +29,7 @@ compatible = "fixed-clock"; clock-frequency = <33333333>; #clock-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; mmcclk_ciu: mmcclk-ciu { diff --git a/arch/arc/dts/emsdp.dts b/arch/arc/dts/emsdp.dts index dbebdb4e76..8222d3ea66 100644 --- a/arch/arc/dts/emsdp.dts +++ b/arch/arc/dts/emsdp.dts @@ -21,7 +21,7 @@ #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <40000000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arc/dts/hsdk-common.dtsi b/arch/arc/dts/hsdk-common.dtsi index 3fc82e57d7..eef3ee01e8 100644 --- a/arch/arc/dts/hsdk-common.dtsi +++ b/arch/arc/dts/hsdk-common.dtsi @@ -23,7 +23,7 @@ #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <500000000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arc/dts/iot_devkit.dts b/arch/arc/dts/iot_devkit.dts index 2122827527..a33cf1d408 100644 --- a/arch/arc/dts/iot_devkit.dts +++ b/arch/arc/dts/iot_devkit.dts @@ -19,7 +19,7 @@ #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <144000000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arc/dts/nsim.dts b/arch/arc/dts/nsim.dts index c2899ef2ea..2d3a7ecbc2 100644 --- a/arch/arc/dts/nsim.dts +++ b/arch/arc/dts/nsim.dts @@ -18,7 +18,7 @@ #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <70000000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arc/dts/skeleton.dtsi b/arch/arc/dts/skeleton.dtsi index 279fc6cacf..d32ca3b77b 100644 --- a/arch/arc/dts/skeleton.dtsi +++ b/arch/arc/dts/skeleton.dtsi @@ -14,7 +14,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; timer@0 { compatible = "snps,arc-timer"; diff --git a/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi b/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi index a3d5650e48..fe28ded757 100644 --- a/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi +++ b/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi @@ -6,69 +6,69 @@ / { ocp { - u-boot,dm-pre-reloc; + bootph-all; }; }; &l4_wkup { - u-boot,dm-pre-reloc; + bootph-all; segment@200000 { - u-boot,dm-pre-reloc; + bootph-all; target-module@0 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; }; target-module@7000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; }; target-module@9000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; }; }; }; &wkup_cm { - u-boot,dm-pre-reloc; + bootph-all; }; &l4_wkup_clkctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &l4_per { - u-boot,dm-pre-reloc; + bootph-all; segment@0 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; target-module@4c000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; }; }; segment@100000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; target-module@ac000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; }; target-module@ae000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; }; }; }; &prcm { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio0_target { - u-boot,dm-pre-reloc; + bootph-all; }; &prcm_clocks { @@ -80,33 +80,33 @@ }; &i2c0 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc1 { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc2 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio0 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio1 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio2 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio3 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/am335x-brsmarc1.dts b/arch/arm/dts/am335x-brsmarc1.dts index 25cdb11164..2c525c6e62 100644 --- a/arch/arm/dts/am335x-brsmarc1.dts +++ b/arch/arm/dts/am335x-brsmarc1.dts @@ -122,7 +122,7 @@ }; &uart0 { /* console uart */ - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; }; @@ -139,12 +139,12 @@ }; &i2c0 { - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; clock-frequency = <100000>; tps: tps@24 { /* PMIC controller */ - u-boot,dm-spl; + bootph-pre-ram; reg = <0x24>; compatible = "ti,tps65217"; }; @@ -176,12 +176,12 @@ }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; }; &spi0 { - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; cs-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>, @@ -192,8 +192,8 @@ spi-max-frequency = <24000000>; spi_flash: spiflash@0 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; compatible = "spidev", "spi-flash"; spi-max-frequency = <24000000>; reg = <0>; @@ -201,7 +201,7 @@ }; &spi1 { - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; cs-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>, <&gpio0 19 GPIO_ACTIVE_HIGH>, @@ -302,10 +302,10 @@ segment@300000 { target-module@e000 { - u-boot,dm-pre-reloc; + bootph-all; lcdc: lcdc@0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; ti,no-reset-on-init; ti,no-idle-on-init; @@ -327,22 +327,22 @@ }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; ti,no-reset-on-init; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; ti,no-reset-on-init; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; ti,no-reset-on-init; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; ti,no-reset-on-init; }; diff --git a/arch/arm/dts/am335x-brxre1.dts b/arch/arm/dts/am335x-brxre1.dts index 485c8e3613..544dc5170f 100644 --- a/arch/arm/dts/am335x-brxre1.dts +++ b/arch/arm/dts/am335x-brxre1.dts @@ -113,7 +113,7 @@ }; &uart0 { /* console uart */ - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; }; @@ -130,12 +130,12 @@ }; &i2c0 { - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; clock-frequency = <100000>; tps: tps@24 { /* PMIC controller */ - u-boot,dm-spl; + bootph-pre-ram; reg = <0x24>; compatible = "ti,tps65217"; @@ -233,7 +233,7 @@ }; &mmc1 { - u-boot,dm-pre-reloc; + bootph-all; vmmc-supply = <&vmmcsd_fixed>; bus-width = <0x4>; ti,non-removable; @@ -243,7 +243,7 @@ }; &mmc2 { - u-boot,dm-pre-reloc; + bootph-all; vmmc-supply = <&vmmcsd_fixed>; bus-width = <0x8>; ti,non-removable; @@ -257,10 +257,10 @@ segment@300000 { target-module@e000 { - u-boot,dm-pre-reloc; + bootph-all; lcdc: lcdc@0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; ti,no-reset-on-init; ti,no-idle-on-init; @@ -282,22 +282,22 @@ }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; ti,no-reset-on-init; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; ti,no-reset-on-init; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; ti,no-reset-on-init; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; ti,no-reset-on-init; }; diff --git a/arch/arm/dts/am335x-evm-u-boot.dtsi b/arch/arm/dts/am335x-evm-u-boot.dtsi index 8fc65df2ef..82a483ae3e 100644 --- a/arch/arm/dts/am335x-evm-u-boot.dtsi +++ b/arch/arm/dts/am335x-evm-u-boot.dtsi @@ -6,14 +6,14 @@ #include "am33xx-u-boot.dtsi" &l4_per { - u-boot,dm-pre-reloc; + bootph-all; segment@300000 { - u-boot,dm-pre-reloc; + bootph-all; target-module@e000 { - u-boot,dm-pre-reloc; + bootph-all; lcdc: lcdc@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; @@ -28,27 +28,27 @@ }; &i2c0 { - u-boot,dm-pre-reloc; + bootph-all; }; &l4_wkup { - u-boot,dm-pre-reloc; + bootph-all; segment@200000 { - u-boot,dm-pre-reloc; + bootph-all; target-module@9000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc1 { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc2 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/am335x-evmsk-u-boot.dtsi b/arch/arm/dts/am335x-evmsk-u-boot.dtsi index 1003f4d31a..669cb6bf16 100644 --- a/arch/arm/dts/am335x-evmsk-u-boot.dtsi +++ b/arch/arm/dts/am335x-evmsk-u-boot.dtsi @@ -12,10 +12,10 @@ segment@300000 { target-module@e000 { - u-boot,dm-pre-reloc; + bootph-all; lcdc: lcdc@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/am335x-guardian-u-boot.dtsi b/arch/arm/dts/am335x-guardian-u-boot.dtsi index 29d8147014..26c011dacd 100644 --- a/arch/arm/dts/am335x-guardian-u-boot.dtsi +++ b/arch/arm/dts/am335x-guardian-u-boot.dtsi @@ -8,12 +8,12 @@ / { ocp { - u-boot,dm-pre-reloc; + bootph-all; }; }; &l4_wkup { - u-boot,dm-pre-reloc; + bootph-all; }; &l4_per { @@ -21,25 +21,25 @@ segment@300000 { target-module@e000 { - u-boot,dm-pre-reloc; + bootph-all; lcdc: lcdc@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; }; &mmc1 { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc1_pins { - u-boot,dm-pre-reloc; + bootph-all; }; &scm { - u-boot,dm-pre-reloc; + bootph-all; }; &spi0 { @@ -54,31 +54,31 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0_pins { - u-boot,dm-pre-reloc; + bootph-all; }; &usb { - u-boot,dm-pre-reloc; + bootph-all; }; &usb_ctrl_mod { - u-boot,dm-pre-reloc; + bootph-all; }; &usb0 { - u-boot,dm-pre-reloc; + bootph-all; }; &usb0_phy { - u-boot,dm-pre-reloc; + bootph-all; }; &am33xx_pinmux { - u-boot,dm-pre-reloc; + bootph-all; lcd0_pins: pinmux_lcd0_pins { pinctrl-single,pins = < diff --git a/arch/arm/dts/am335x-pdu001-u-boot.dtsi b/arch/arm/dts/am335x-pdu001-u-boot.dtsi index f1860ee3e4..4bb4bed4c0 100644 --- a/arch/arm/dts/am335x-pdu001-u-boot.dtsi +++ b/arch/arm/dts/am335x-pdu001-u-boot.dtsi @@ -6,65 +6,65 @@ #include "am33xx-u-boot.dtsi" &l4_wkup { - u-boot,dm-pre-reloc; + bootph-all; segment@200000 { target-module@10000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; &l4_per { - u-boot,dm-pre-reloc; + bootph-all; segment@100000 { - u-boot,dm-pre-reloc; + bootph-all; target-module@a6000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; segment@300000 { target-module@e000 { - u-boot,dm-pre-reloc; + bootph-all; lcdc: lcdc@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; }; &scm { - u-boot,dm-pre-reloc; + bootph-all; }; &am33xx_pinmux { - u-boot,dm-pre-reloc; + bootph-all; }; &uart3_pins { - u-boot,dm-pre-reloc; + bootph-all; }; &uart3 { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc1 { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc1_pins { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc2 { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc2_pins { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/am335x-pxm50-u-boot.dtsi b/arch/arm/dts/am335x-pxm50-u-boot.dtsi index e5af9fdf89..d8c21b6b82 100644 --- a/arch/arm/dts/am335x-pxm50-u-boot.dtsi +++ b/arch/arm/dts/am335x-pxm50-u-boot.dtsi @@ -12,10 +12,10 @@ segment@300000 { target-module@e000 { - u-boot,dm-pre-reloc; + bootph-all; lcdc: lcdc@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/am335x-regor-rdk-u-boot.dtsi b/arch/arm/dts/am335x-regor-rdk-u-boot.dtsi index 4052d0ee21..e07e3aa8cb 100644 --- a/arch/arm/dts/am335x-regor-rdk-u-boot.dtsi +++ b/arch/arm/dts/am335x-regor-rdk-u-boot.dtsi @@ -15,19 +15,19 @@ }; ocp { - u-boot,dm-pre-reloc; + bootph-all; }; }; &i2c0 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc1 { - u-boot,dm-pre-reloc; + bootph-all; cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/dts/am335x-rut-u-boot.dtsi b/arch/arm/dts/am335x-rut-u-boot.dtsi index a38c2dc607..62638c7da9 100644 --- a/arch/arm/dts/am335x-rut-u-boot.dtsi +++ b/arch/arm/dts/am335x-rut-u-boot.dtsi @@ -12,10 +12,10 @@ segment@300000 { target-module@e000 { - u-boot,dm-pre-reloc; + bootph-all; lcdc: lcdc@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi b/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi index 01c105ebb3..fd47bc23a2 100644 --- a/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi +++ b/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi @@ -9,36 +9,36 @@ &l4_wkup { segment@200000 { target-module@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; &prcm { - u-boot,dm-pre-reloc; + bootph-all; }; &per_cm { - u-boot,dm-pre-reloc; + bootph-all; }; &l4ls_clkctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &l4_per { - u-boot,dm-pre-reloc; + bootph-all; segment@0 { - u-boot,dm-pre-reloc; + bootph-all; target-module@30000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; &spi0 { - u-boot,dm-pre-reloc; + bootph-all; channel@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/am335x-shc-u-boot.dtsi b/arch/arm/dts/am335x-shc-u-boot.dtsi index 359ae05209..f9b6cb3256 100644 --- a/arch/arm/dts/am335x-shc-u-boot.dtsi +++ b/arch/arm/dts/am335x-shc-u-boot.dtsi @@ -7,45 +7,45 @@ / { ocp { - u-boot,dm-pre-reloc; + bootph-all; }; }; &l4_wkup { - u-boot,dm-pre-reloc; + bootph-all; }; &scm { - u-boot,dm-pre-reloc; + bootph-all; }; &am33xx_pinmux { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0_pins { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc1 { - u-boot,dm-pre-reloc; + bootph-all; cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; }; &emmc_pins { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc2 { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc1_pins { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc3 { diff --git a/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi b/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi index b3f21e7f52..0e9804bd31 100644 --- a/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi +++ b/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi @@ -15,16 +15,16 @@ }; ocp { - u-boot,dm-pre-reloc; + bootph-all; l4_wkup@44c00000 { - u-boot,dm-pre-reloc; + bootph-all; segment@200000 { - u-boot,dm-pre-reloc; + bootph-all; target-module@9000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; @@ -32,14 +32,14 @@ }; &i2c0 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc1 { - u-boot,dm-pre-reloc; + bootph-all; cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/dts/am33xx-u-boot.dtsi b/arch/arm/dts/am33xx-u-boot.dtsi index 61d10b841b..1d09f48bb2 100644 --- a/arch/arm/dts/am33xx-u-boot.dtsi +++ b/arch/arm/dts/am33xx-u-boot.dtsi @@ -6,7 +6,7 @@ / { ocp { - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/am3517-evm-u-boot.dtsi b/arch/arm/dts/am3517-evm-u-boot.dtsi index 1a70630322..8d486f0020 100644 --- a/arch/arm/dts/am3517-evm-u-boot.dtsi +++ b/arch/arm/dts/am3517-evm-u-boot.dtsi @@ -18,37 +18,37 @@ }; &gpio1 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio2 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio3 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio5 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio6 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &mmc2 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &mmc3 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &uart1 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &uart2 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; diff --git a/arch/arm/dts/am4372-generic-u-boot.dtsi b/arch/arm/dts/am4372-generic-u-boot.dtsi index 6ba5c16492..1dd0a5dac1 100644 --- a/arch/arm/dts/am4372-generic-u-boot.dtsi +++ b/arch/arm/dts/am4372-generic-u-boot.dtsi @@ -7,10 +7,10 @@ /{ ocp { - u-boot,dm-pre-reloc; + bootph-all; }; }; &i2c0 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/am4372-u-boot.dtsi b/arch/arm/dts/am4372-u-boot.dtsi index 986ae17470..2fac2fcdf9 100644 --- a/arch/arm/dts/am4372-u-boot.dtsi +++ b/arch/arm/dts/am4372-u-boot.dtsi @@ -27,41 +27,41 @@ }; &dwc3_1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb2_phy1 { - u-boot,dm-spl; + bootph-pre-ram; }; &am43xx_control_usb2phy1 { - u-boot,dm-spl; + bootph-pre-ram; }; &ocp2scp0 { - u-boot,dm-spl; + bootph-pre-ram; }; &dwc3_2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb2_phy2 { - u-boot,dm-spl; + bootph-pre-ram; }; &am43xx_control_usb2phy2 { - u-boot,dm-spl; + bootph-pre-ram; }; &ocp2scp1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/am437x-gp-evm-u-boot.dtsi b/arch/arm/dts/am437x-gp-evm-u-boot.dtsi index b55aa8e763..da0b1365ff 100644 --- a/arch/arm/dts/am437x-gp-evm-u-boot.dtsi +++ b/arch/arm/dts/am437x-gp-evm-u-boot.dtsi @@ -11,50 +11,50 @@ /{ ocp { - u-boot,dm-spl; + bootph-pre-ram; }; }; &uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &mac { - u-boot,dm-spl; + bootph-pre-ram; }; &davinci_mdio { - u-boot,dm-spl; + bootph-pre-ram; }; &cpsw_emac0 { - u-boot,dm-spl; + bootph-pre-ram; }; &phy_sel { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c0 { - u-boot,dm-spl; + bootph-pre-ram; }; &l4_wkup { - u-boot,dm-spl; + bootph-pre-ram; }; &scm { - u-boot,dm-spl; + bootph-pre-ram; }; &scm_conf { - u-boot,dm-spl; + bootph-pre-ram; }; ðphy0 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/am437x-idk-evm-u-boot.dtsi b/arch/arm/dts/am437x-idk-evm-u-boot.dtsi index 50fe09cfc3..4e6ad9445b 100644 --- a/arch/arm/dts/am437x-idk-evm-u-boot.dtsi +++ b/arch/arm/dts/am437x-idk-evm-u-boot.dtsi @@ -7,7 +7,7 @@ /{ ocp { - u-boot,dm-spl; + bootph-pre-ram; }; xtal25mhz: xtal25mhz { @@ -18,11 +18,11 @@ }; &uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c0 { - u-boot,dm-spl; + bootph-pre-ram; cdce913: cdce913@65 { compatible = "ti,cdce913"; @@ -34,5 +34,5 @@ }; &mmc1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/am437x-sk-evm-u-boot.dtsi b/arch/arm/dts/am437x-sk-evm-u-boot.dtsi index 3aa9195e44..43e519c4e5 100644 --- a/arch/arm/dts/am437x-sk-evm-u-boot.dtsi +++ b/arch/arm/dts/am437x-sk-evm-u-boot.dtsi @@ -7,18 +7,18 @@ /{ ocp { - u-boot,dm-spl; + bootph-pre-ram; }; }; &uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c0 { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi index 1b2648f64d..cb02b70e54 100644 --- a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi +++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi @@ -21,15 +21,15 @@ }; &spi0 { - u-boot,dm-pre-reloc; + bootph-all; spi-flash@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; }; ð0 { diff --git a/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi index 47d87d4bd8..485f1c5bb0 100644 --- a/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi +++ b/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi @@ -21,15 +21,15 @@ }; &spi0 { - u-boot,dm-pre-reloc; + bootph-all; spi-flash@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_sb { diff --git a/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi b/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi index 4a3fb2ce40..8fd829df70 100644 --- a/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi +++ b/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 &watchdog { - u-boot,dm-pre-reloc; + bootph-all; }; #include "mvebu-u-boot.dtsi" diff --git a/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi b/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi index 3f1e761a95..509d6ca69c 100644 --- a/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi +++ b/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi @@ -12,24 +12,24 @@ }; &i2c0 { - u-boot,dm-pre-reloc; + bootph-all; i2cmux: i2cmux@70 { - u-boot,dm-pre-reloc; + bootph-all; i2c@0 { - u-boot,dm-pre-reloc; + bootph-all; }; i2c@1 { - u-boot,dm-pre-reloc; + bootph-all; }; i2c@5 { - u-boot,dm-pre-reloc; + bootph-all; crypto@64 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/armada-388-clearfog-u-boot.dtsi b/arch/arm/dts/armada-388-clearfog-u-boot.dtsi index 96629294be..fb27a3b96f 100644 --- a/arch/arm/dts/armada-388-clearfog-u-boot.dtsi +++ b/arch/arm/dts/armada-388-clearfog-u-boot.dtsi @@ -1,38 +1,38 @@ // SPDX-License-Identifier: GPL-2.0+ &spi1 { - u-boot,dm-spl; + bootph-pre-ram; spi-flash@0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdhci { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &ahci0 { - u-boot,dm-spl; + bootph-pre-ram; }; &ahci1 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c0 { - u-boot,dm-spl; + bootph-pre-ram; eeprom@52 { - u-boot,dm-spl; + bootph-pre-ram; }; eeprom@53 { - u-boot,dm-spl; + bootph-pre-ram; }; }; diff --git a/arch/arm/dts/armada-388-helios4-u-boot.dtsi b/arch/arm/dts/armada-388-helios4-u-boot.dtsi index bac4b06058..363056a705 100644 --- a/arch/arm/dts/armada-388-helios4-u-boot.dtsi +++ b/arch/arm/dts/armada-388-helios4-u-boot.dtsi @@ -5,41 +5,41 @@ }; &spi1 { - u-boot,dm-spl; + bootph-pre-ram; spi-flash@0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &w25q32 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &ahci0 { - u-boot,dm-spl; + bootph-pre-ram; }; &ahci1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdhci { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c0 { - u-boot,dm-spl; + bootph-pre-ram; eeprom@52 { - u-boot,dm-spl; + bootph-pre-ram; }; eeprom@53 { - u-boot,dm-spl; + bootph-pre-ram; }; }; diff --git a/arch/arm/dts/armada-38x-controlcenterdc-u-boot.dtsi b/arch/arm/dts/armada-38x-controlcenterdc-u-boot.dtsi index 0a94df9230..efeb16c1f1 100644 --- a/arch/arm/dts/armada-38x-controlcenterdc-u-boot.dtsi +++ b/arch/arm/dts/armada-38x-controlcenterdc-u-boot.dtsi @@ -1,25 +1,25 @@ &gpio0 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio1 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &spi1 { - u-boot,dm-pre-reloc; + bootph-all; }; &I2C0 { - u-boot,dm-pre-reloc; + bootph-all; }; &PCA22 { - u-boot,dm-pre-reloc; + bootph-all; }; #include "mvebu-u-boot.dtsi" diff --git a/arch/arm/dts/armada-ap80x-quad.dtsi b/arch/arm/dts/armada-ap80x-quad.dtsi index 1220e986e3..19e27e4af5 100644 --- a/arch/arm/dts/armada-ap80x-quad.dtsi +++ b/arch/arm/dts/armada-ap80x-quad.dtsi @@ -18,7 +18,7 @@ cpu@000 { clocks; - u-boot,dm-pre-reloc; + bootph-all; device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x000>; @@ -26,7 +26,7 @@ }; cpu@001 { clocks; - u-boot,dm-pre-reloc; + bootph-all; device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x001>; @@ -34,7 +34,7 @@ }; cpu@100 { clocks; - u-boot,dm-pre-reloc; + bootph-all; device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x100>; @@ -42,7 +42,7 @@ }; cpu@101 { clocks; - u-boot,dm-pre-reloc; + bootph-all; device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x101>; diff --git a/arch/arm/dts/armada-xp-theadorable-u-boot.dtsi b/arch/arm/dts/armada-xp-theadorable-u-boot.dtsi index c98bfa1e18..48426f6d5c 100644 --- a/arch/arm/dts/armada-xp-theadorable-u-boot.dtsi +++ b/arch/arm/dts/armada-xp-theadorable-u-boot.dtsi @@ -1,5 +1,5 @@ &lcd0 { - u-boot,dm-pre-reloc; + bootph-all; }; #include "mvebu-u-boot.dtsi" diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts index 1fbacf985f..d481eadfeb 100644 --- a/arch/arm/dts/ast2500-evb.dts +++ b/arch/arm/dts/ast2500-evb.dts @@ -19,7 +19,7 @@ }; &uart5 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; @@ -28,17 +28,17 @@ }; &wdt1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &wdt2 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &wdt3 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/ast2500-u-boot.dtsi b/arch/arm/dts/ast2500-u-boot.dtsi index 057390fe70..ee14db3ee8 100644 --- a/arch/arm/dts/ast2500-u-boot.dtsi +++ b/arch/arm/dts/ast2500-u-boot.dtsi @@ -8,19 +8,19 @@ scu: clock-controller@1e6e2000 { compatible = "aspeed,ast2500-scu"; reg = <0x1e6e2000 0x1000>; - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <1>; #reset-cells = <1>; }; rst: reset-controller { - u-boot,dm-pre-reloc; + bootph-all; compatible = "aspeed,ast2500-reset"; #reset-cells = <1>; }; sdrammc: sdrammc@1e6e0000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "aspeed,ast2500-sdrammc"; reg = <0x1e6e0000 0x174 0x1e6e0200 0x1d4 >; @@ -51,7 +51,7 @@ }; &timer { - u-boot,dm-pre-reloc; + bootph-all; }; &mac0 { diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts index a097f320e4..9aac0e26f2 100644 --- a/arch/arm/dts/ast2600-evb.dts +++ b/arch/arm/dts/ast2600-evb.dts @@ -58,7 +58,7 @@ }; &uart5 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; @@ -258,11 +258,11 @@ }; &hace { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &acry { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/ast2600-u-boot.dtsi b/arch/arm/dts/ast2600-u-boot.dtsi index 4648c07437..f06f58204f 100644 --- a/arch/arm/dts/ast2600-u-boot.dtsi +++ b/arch/arm/dts/ast2600-u-boot.dtsi @@ -8,21 +8,21 @@ scu: clock-controller@1e6e2000 { compatible = "aspeed,ast2600-scu"; reg = <0x1e6e2000 0x1000>; - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <1>; #reset-cells = <1>; uart-clk-source = <0x0>; /* uart clock source selection: 0: uxclk 1: huxclk*/ }; rst: reset-controller { - u-boot,dm-pre-reloc; + bootph-all; compatible = "aspeed,ast2600-reset"; aspeed,wdt = <&wdt1>; #reset-cells = <1>; }; sdrammc: sdrammc@1e6e0000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "aspeed,ast2600-sdrammc"; reg = <0x1e6e0000 0x100 0x1e6e0100 0x300 @@ -33,10 +33,10 @@ }; ahb { - u-boot,dm-pre-reloc; + bootph-all; apb { - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi index d176e20f28..0c3c0406b4 100644 --- a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi +++ b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi @@ -10,70 +10,70 @@ / { ahb { - u-boot,dm-pre-reloc; + bootph-all; apb { - u-boot,dm-pre-reloc; + bootph-all; pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; chosen { - u-boot,dm-pre-reloc; + bootph-all; }; }; &clk32 { - u-boot,dm-pre-reloc; + bootph-all; }; &dbgu { - u-boot,dm-pre-reloc; + bootph-all; }; &main_rc { - u-boot,dm-pre-reloc; + bootph-all; }; &main_xtal { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_dbgu { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; }; &pioA { - u-boot,dm-pre-reloc; + bootph-all; }; &pioB { - u-boot,dm-pre-reloc; + bootph-all; }; &pit64b0 { - u-boot,dm-pre-reloc; + bootph-all; }; &pmc { - u-boot,dm-pre-reloc; + bootph-all; }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; }; &slow_rc_osc { - u-boot,dm-pre-reloc; + bootph-all; }; &slow_xtal { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/at91-sama5d27_giantboard.dts b/arch/arm/dts/at91-sama5d27_giantboard.dts index 2625f81c8b..767766d4f8 100644 --- a/arch/arm/dts/at91-sama5d27_giantboard.dts +++ b/arch/arm/dts/at91-sama5d27_giantboard.dts @@ -22,7 +22,7 @@ }; chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &uart1; }; @@ -32,7 +32,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc1_default>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; apb { @@ -41,7 +41,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_default>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; i2c0: i2c@f8028000 { @@ -65,12 +65,12 @@ pit: timer@f8048030 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; sfr: sfr@f8030000 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; pioA: pinctrl@fc038000 { @@ -82,14 +82,14 @@ <PIN_PA20__SDMMC1_DAT2>, <PIN_PA21__SDMMC1_DAT3>; bias-pull-up; - u-boot,dm-pre-reloc; + bootph-all; }; ck_cd { pinmux = <PIN_PA22__SDMMC1_CK>, <PIN_PA30__SDMMC1_CD>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -97,7 +97,7 @@ pinmux = <PIN_PD2__URXD1>, <PIN_PD3__UTXD1>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl_i2c0_default: i2c0_default { diff --git a/arch/arm/dts/at91-sama5d27_som1_ek.dts b/arch/arm/dts/at91-sama5d27_som1_ek.dts index 70d15c8a62..861471dfdd 100644 --- a/arch/arm/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/dts/at91-sama5d27_som1_ek.dts @@ -51,7 +51,7 @@ compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d2", "atmel,sama5"; chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &uart1; }; @@ -85,7 +85,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc0_default>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; sdmmc1: sdio-host@b0000000 { @@ -93,7 +93,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc1_default>; status = "okay"; /* conflict with qspi0 */ - u-boot,dm-pre-reloc; + bootph-all; }; apb { @@ -103,10 +103,10 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; display-timings { - u-boot,dm-pre-reloc; + bootph-all; 480x272 { clock-frequency = <9000000>; hactive = <480>; @@ -117,7 +117,7 @@ vfront-porch = <2>; vback-porch = <2>; vsync-len = <11>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; @@ -126,7 +126,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_default>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; pioA: pinctrl@fc038000 { @@ -178,7 +178,7 @@ <PIN_PA8__SDMMC0_DAT6>, <PIN_PA9__SDMMC0_DAT7>; bias-pull-up; - u-boot,dm-pre-reloc; + bootph-all; }; ck_cd { @@ -186,7 +186,7 @@ <PIN_PA10__SDMMC0_RSTN>, <PIN_PA13__SDMMC0_CD>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -198,14 +198,14 @@ <PIN_PA20__SDMMC1_DAT2>, <PIN_PA21__SDMMC1_DAT3>; bias-pull-up; - u-boot,dm-pre-reloc; + bootph-all; }; ck_cd { pinmux = <PIN_PA22__SDMMC1_CK>, <PIN_PA30__SDMMC1_CD>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -213,7 +213,7 @@ pinmux = <PIN_PD2__URXD1>, <PIN_PD3__UTXD1>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl_usb_default: usb_default { diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi index 41cf9061a1..8254392762 100644 --- a/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi +++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi @@ -9,42 +9,42 @@ / { chosen { - u-boot,dm-pre-reloc; + bootph-all; }; }; &hlcdc { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi1 { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi1_flash { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc0 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &sfr { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_sdmmc0_default { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_uart0_default { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_qspi1_default { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi b/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi index b45de978c2..cd8976f7e1 100644 --- a/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi +++ b/arch/arm/dts/at91-sama5d2_icp-u-boot.dtsi @@ -9,39 +9,39 @@ / { chosen { - u-boot,dm-pre-reloc; + bootph-all; }; }; &pinctrl_mikrobus1_uart { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_qspi1_sck_cs_default { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_qspi1_dat_default { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_sdmmc0_default { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi1 { - u-boot,dm-pre-reloc; + bootph-all; flash@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; &sdmmc0 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { /* mikrobus1 uart */ - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/dts/at91-sama5d2_ptc_ek.dts index 36d52c2c5e..b62b8a72cb 100644 --- a/arch/arm/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/dts/at91-sama5d2_ptc_ek.dts @@ -52,7 +52,7 @@ compatible = "atmel,sama5d2-ptc_ek", "atmel,sama5d2", "atmel,sama5"; chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &uart0; }; @@ -96,7 +96,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc0_default>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; sdmmc1: sdio-host@b0000000 { @@ -104,7 +104,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc1_default>; status = "disabled"; /* conflicts with nand and qspi0*/ - u-boot,dm-pre-reloc; + bootph-all; }; apb { @@ -123,7 +123,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0_default>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; i2c1: i2c@fc028000 { @@ -175,7 +175,7 @@ <PIN_PA8__SDMMC0_DAT6>, <PIN_PA9__SDMMC0_DAT7>; bias-pull-up; - u-boot,dm-pre-reloc; + bootph-all; }; ck_cd { @@ -184,7 +184,7 @@ <PIN_PA11__SDMMC0_VDDSEL>, <PIN_PA13__SDMMC0_CD>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -196,14 +196,14 @@ <PIN_PA20__SDMMC1_DAT2>, <PIN_PA21__SDMMC1_DAT3>; bias-pull-up; - u-boot,dm-pre-reloc; + bootph-all; }; ck_cd { pinmux = <PIN_PA22__SDMMC1_CK>, <PIN_PA30__SDMMC1_CD>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -211,7 +211,7 @@ pinmux = <PIN_PB26__URXD0>, <PIN_PB27__UTXD0>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl_usb_default: usb_default { diff --git a/arch/arm/dts/at91-sama5d2_xplained.dts b/arch/arm/dts/at91-sama5d2_xplained.dts index 78a3a851bb..4d28af6faa 100644 --- a/arch/arm/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/dts/at91-sama5d2_xplained.dts @@ -8,7 +8,7 @@ compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5"; chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &uart1; }; @@ -46,7 +46,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc0_default>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; sdmmc1: sdio-host@b0000000 { @@ -54,7 +54,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc1_default>; status = "okay"; /* conflict with qspi0 */ - u-boot,dm-pre-reloc; + bootph-all; }; apb { @@ -64,10 +64,10 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; display-timings { - u-boot,dm-pre-reloc; + bootph-all; 480x272 { clock-frequency = <9000000>; hactive = <480>; @@ -78,7 +78,7 @@ vfront-porch = <2>; vback-porch = <2>; vsync-len = <11>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; @@ -87,7 +87,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_qspi0_sck_cs_default &pinctrl_qspi0_dat_default>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; flash@0 { compatible = "jedec,spi-nor"; @@ -95,7 +95,7 @@ spi-max-frequency = <83000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <4>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -104,13 +104,13 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0_default>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; spi_flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <50000000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -129,7 +129,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_default>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; i2c1: i2c@fc028000 { @@ -208,7 +208,7 @@ pinmux = <PIN_PA22__QSPI0_SCK>, <PIN_PA23__QSPI0_CS>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl_qspi0_dat_default: qspi0_dat_default { @@ -217,7 +217,7 @@ <PIN_PA26__QSPI0_IO2>, <PIN_PA27__QSPI0_IO3>; bias-pull-up; - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl_sdmmc0_default: sdmmc0_default { @@ -232,7 +232,7 @@ <PIN_PA8__SDMMC0_DAT6>, <PIN_PA9__SDMMC0_DAT7>; bias-pull-up; - u-boot,dm-pre-reloc; + bootph-all; }; ck_cd_default { @@ -241,7 +241,7 @@ <PIN_PA11__SDMMC0_VDDSEL>, <PIN_PA13__SDMMC0_CD>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -253,14 +253,14 @@ <PIN_PA20__SDMMC1_DAT2>, <PIN_PA21__SDMMC1_DAT3>; bias-pull-up; - u-boot,dm-pre-reloc; + bootph-all; }; ck_cd { pinmux = <PIN_PA22__SDMMC1_CK>, <PIN_PA30__SDMMC1_CD>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -269,14 +269,14 @@ <PIN_PA15__SPI0_MOSI>, <PIN_PA16__SPI0_MISO>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl_uart1_default: uart1_default { pinmux = <PIN_PD2__URXD1>, <PIN_PD3__UTXD1>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl_usb_default: usb_default { diff --git a/arch/arm/dts/at91-sama5d3_xplained.dts b/arch/arm/dts/at91-sama5d3_xplained.dts index fc508002a7..d291deb786 100644 --- a/arch/arm/dts/at91-sama5d3_xplained.dts +++ b/arch/arm/dts/at91-sama5d3_xplained.dts @@ -14,7 +14,7 @@ compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5"; chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &dbgu; }; @@ -51,7 +51,7 @@ ahb { apb { mmc0: mmc@f0000000 { - u-boot,dm-pre-reloc; + bootph-all; pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd>; vmmc-supply = <&vcc_mmc0_reg>; vqmmc-supply = <&vcc_3v3_reg>; @@ -64,7 +64,7 @@ }; mmc1: mmc@f8000000 { - u-boot,dm-pre-reloc; + bootph-all; vmmc-supply = <&vcc_3v3_reg>; vqmmc-supply = <&vcc_3v3_reg>; status = "disabled"; @@ -215,13 +215,13 @@ }; dbgu: serial@ffffee00 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; pinctrl@fffff200 { board { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_i2c0_pu: i2c0_pu { atmel,pins = <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, @@ -240,13 +240,13 @@ }; pinctrl_mmc0_cd: mmc0_cd { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; }; pinctrl_mmc1_cd: mmc1_cd { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; }; diff --git a/arch/arm/dts/at91-sama5d4_xplained.dts b/arch/arm/dts/at91-sama5d4_xplained.dts index 74959253dc..95f2091afe 100644 --- a/arch/arm/dts/at91-sama5d4_xplained.dts +++ b/arch/arm/dts/at91-sama5d4_xplained.dts @@ -54,7 +54,7 @@ }; chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &usart3; }; @@ -92,10 +92,10 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; display-timings { - u-boot,dm-pre-reloc; + bootph-all; 480x272 { clock-frequency = <9000000>; hactive = <480>; @@ -106,17 +106,17 @@ vfront-porch = <2>; vback-porch = <2>; vsync-len = <11>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; spi0: spi@f8010000 { - u-boot,dm-pre-reloc; + bootph-all; cs-gpios = <&pioC 3 0>, <0>, <0>, <0>; status = "okay"; spi_flash@0 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "jedec,spi-nor"; spi-max-frequency = <50000000>; reg = <0>; @@ -146,7 +146,7 @@ }; mmc1: mmc@fc000000 { - u-boot,dm-pre-reloc; + bootph-all; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; vmmc-supply = <&vcc_mmc1_reg>; @@ -160,7 +160,7 @@ }; usart3: serial@fc00c000 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; @@ -193,9 +193,9 @@ pinctrl@fc06a000 { board { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_mmc1_cd: mmc1_cd { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOE 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; }; diff --git a/arch/arm/dts/at91-sama5d4ek.dts b/arch/arm/dts/at91-sama5d4ek.dts index c1d657814d..687a1d095e 100644 --- a/arch/arm/dts/at91-sama5d4ek.dts +++ b/arch/arm/dts/at91-sama5d4ek.dts @@ -54,7 +54,7 @@ }; chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &usart3; }; @@ -82,10 +82,10 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; display-timings { - u-boot,dm-pre-reloc; + bootph-all; 800x480 { clock-frequency = <33260000>; hactive = <800>; @@ -96,7 +96,7 @@ vfront-porch = <23>; vback-porch = <22>; vsync-len = <5>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; @@ -132,11 +132,11 @@ }; spi0: spi@f8010000 { - u-boot,dm-pre-reloc; + bootph-all; cs-gpios = <&pioC 3 0>, <0>, <0>, <0>; status = "okay"; spi_flash@0 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "jedec,spi-nor"; spi-max-frequency = <50000000>; reg = <0>; @@ -186,7 +186,7 @@ }; mmc1: mmc@fc000000 { - u-boot,dm-pre-reloc; + bootph-all; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; status = "okay"; @@ -202,7 +202,7 @@ }; usart3: serial@fc00c000 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; @@ -216,7 +216,7 @@ pinctrl@fc06a000 { board { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_macb0_phy_irq: macb0_phy_irq { atmel,pins = <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; @@ -226,7 +226,7 @@ <AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; }; pinctrl_mmc1_cd: mmc1_cd { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOE 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; }; diff --git a/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi b/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi index a54cfaccbf..8b2e990de7 100644 --- a/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi @@ -16,7 +16,7 @@ / { chosen { - u-boot,dm-pre-reloc; + bootph-all; }; utmi { @@ -68,7 +68,7 @@ }; soc { - u-boot,dm-pre-reloc; + bootph-all; usb2: usb@400000 { compatible = "microchip,sama7g5-ohci", "usb-ohci"; @@ -96,23 +96,23 @@ }; &main_rc { - u-boot,dm-pre-reloc; + bootph-all; }; &main_xtal { - u-boot,dm-pre-reloc; + bootph-all; }; &pioA { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_flx3_default { - u-boot,dm-pre-reloc; + bootph-all; }; &pioA { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_usb_default: usb_default { pinmux = <PIN_PC6__GPIO>; @@ -121,23 +121,23 @@ }; &pit64b0 { - u-boot,dm-pre-reloc; + bootph-all; }; &pmc { - u-boot,dm-pre-reloc; + bootph-all; }; &slow_rc_osc { - u-boot,dm-pre-reloc; + bootph-all; }; &slow_xtal { - u-boot,dm-pre-reloc; + bootph-all; }; &uart3 { - u-boot,dm-pre-reloc; + bootph-all; }; &usb2 { diff --git a/arch/arm/dts/at91sam9260-smartweb.dts b/arch/arm/dts/at91sam9260-smartweb.dts index a22de2d927..1f21762a7a 100644 --- a/arch/arm/dts/at91sam9260-smartweb.dts +++ b/arch/arm/dts/at91sam9260-smartweb.dts @@ -18,7 +18,7 @@ compatible = "atmel,at91sam9260", "atmel,at91sam9"; chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &dbgu; }; @@ -49,7 +49,7 @@ }; dbgu: serial@fffff200 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/at91sam9260.dtsi b/arch/arm/dts/at91sam9260.dtsi index 800d96eb2f..4ea4202737 100644 --- a/arch/arm/dts/at91sam9260.dtsi +++ b/arch/arm/dts/at91sam9260.dtsi @@ -77,14 +77,14 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; apb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; aic: interrupt-controller@fffff000 { #interrupt-cells = <3>; @@ -107,7 +107,7 @@ #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; main_osc: main_osc { compatible = "atmel,at91rm9200-clk-main-osc"; @@ -165,7 +165,7 @@ clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; atmel,clk-output-range = <0 105000000>; atmel,clk-divisors = <1 2 4 0>; - u-boot,dm-pre-reloc; + bootph-all; }; usb: usbck { @@ -230,24 +230,24 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; - u-boot,dm-pre-reloc; + bootph-all; pioA_clk: pioA_clk@2 { #clock-cells = <0>; reg = <2>; - u-boot,dm-pre-reloc; + bootph-all; }; pioB_clk: pioB_clk@3 { #clock-cells = <0>; reg = <3>; - u-boot,dm-pre-reloc; + bootph-all; }; pioC_clk: pioC_clk@4 { #clock-cells = <0>; reg = <4>; - u-boot,dm-pre-reloc; + bootph-all; }; adc_clk: adc_clk@5 { @@ -410,7 +410,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioA_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioB: gpio@fffff600 { @@ -422,7 +422,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioB_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioC: gpio@fffff800 { @@ -434,7 +434,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioC_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl: pinctrl@fffff400 { @@ -453,11 +453,11 @@ 0xffffffff 0x7fff3ccf /* pioB */ 0xffffffff 0x007fffff /* pioC */ >; - u-boot,dm-pre-reloc; + bootph-all; /* shared pinctrl settings */ dbgu { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_dbgu: dbgu-0 { atmel,pins = <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ diff --git a/arch/arm/dts/at91sam9260ek.dts b/arch/arm/dts/at91sam9260ek.dts index 47606cbcdd..d1de5e0dbf 100644 --- a/arch/arm/dts/at91sam9260ek.dts +++ b/arch/arm/dts/at91sam9260ek.dts @@ -50,7 +50,7 @@ compatible = "atmel,at91sam9260ek", "atmel,at91sam9260", "atmel,at91sam9"; chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &dbgu; }; @@ -124,7 +124,7 @@ }; dbgu: serial@fffff200 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/at91sam9261.dtsi b/arch/arm/dts/at91sam9261.dtsi index b6357d3cb3..804340e75d 100644 --- a/arch/arm/dts/at91sam9261.dtsi +++ b/arch/arm/dts/at91sam9261.dtsi @@ -68,7 +68,7 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; usb0: ohci@00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; @@ -111,7 +111,7 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; tcb0: timer@fffa0000 { compatible = "atmel,at91rm9200-tcb"; @@ -295,7 +295,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioA_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioB: gpio@fffff600 { @@ -307,7 +307,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioB_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioC: gpio@fffff800 { @@ -319,7 +319,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioC_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl@fffff400 { @@ -336,11 +336,11 @@ <0xffffffff 0xfffffff7>, /* pioA */ <0xffffffff 0xfffffff4>, /* pioB */ <0xffffffff 0xffffff07>; /* pioC */ - u-boot,dm-pre-reloc; + bootph-all; /* shared pinctrl settings */ dbgu { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_dbgu: dbgu-0 { atmel,pins = <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, @@ -583,7 +583,7 @@ #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; main_osc: main_osc { compatible = "atmel,at91rm9200-clk-main-osc"; @@ -628,7 +628,7 @@ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; atmel,clk-output-range = <0 94000000>; atmel,clk-divisors = <1 2 4 0>; - u-boot,dm-pre-reloc; + bootph-all; }; usb: usbck { @@ -729,24 +729,24 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; - u-boot,dm-pre-reloc; + bootph-all; pioA_clk: pioA_clk@2 { #clock-cells = <0>; reg = <2>; - u-boot,dm-pre-reloc; + bootph-all; }; pioB_clk: pioB_clk@3 { #clock-cells = <0>; reg = <3>; - u-boot,dm-pre-reloc; + bootph-all; }; pioC_clk: pioC_clk@4 { #clock-cells = <0>; reg = <4>; - u-boot,dm-pre-reloc; + bootph-all; }; usart0_clk: usart0_clk@6 { diff --git a/arch/arm/dts/at91sam9263.dtsi b/arch/arm/dts/at91sam9263.dtsi index 61b056266b..98cdd8ebcc 100644 --- a/arch/arm/dts/at91sam9263.dtsi +++ b/arch/arm/dts/at91sam9263.dtsi @@ -75,14 +75,14 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; apb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; aic: interrupt-controller@fffff000 { #interrupt-cells = <3>; @@ -100,7 +100,7 @@ #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; main_osc: main_osc { compatible = "atmel,at91rm9200-clk-main-osc"; @@ -146,7 +146,7 @@ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; atmel,clk-output-range = <0 120000000>; atmel,clk-divisors = <1 2 4 0>; - u-boot,dm-pre-reloc; + bootph-all; }; usb: usbck { @@ -235,24 +235,24 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; - u-boot,dm-pre-reloc; + bootph-all; pioA_clk: pioA_clk@2 { #clock-cells = <0>; reg = <2>; - u-boot,dm-pre-reloc; + bootph-all; }; pioB_clk: pioB_clk@3 { #clock-cells = <0>; reg = <3>; - u-boot,dm-pre-reloc; + bootph-all; }; pioCDE_clk: pioCDE_clk@4 { #clock-cells = <0>; reg = <4>; - u-boot,dm-pre-reloc; + bootph-all; }; usart0_clk: usart0_clk@7 { @@ -730,7 +730,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioA_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioB: gpio@fffff400 { @@ -742,7 +742,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioB_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioC: gpio@fffff600 { @@ -754,7 +754,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioCDE_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioD: gpio@fffff800 { @@ -766,7 +766,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioCDE_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioE: gpio@fffffa00 { @@ -778,7 +778,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioCDE_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; dbgu: serial@ffffee00 { diff --git a/arch/arm/dts/at91sam9263ek.dts b/arch/arm/dts/at91sam9263ek.dts index 35799b8a5e..fce8d77ddc 100644 --- a/arch/arm/dts/at91sam9263ek.dts +++ b/arch/arm/dts/at91sam9263ek.dts @@ -15,7 +15,7 @@ chosen { bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs"; stdout-path = "serial0:115200n8"; - u-boot,dm-pre-reloc; + bootph-all; }; memory { @@ -35,7 +35,7 @@ ahb { apb { dbgu: serial@ffffee00 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/at91sam9g15ek.dts b/arch/arm/dts/at91sam9g15ek.dts index 9fae92554f..33f93fb016 100644 --- a/arch/arm/dts/at91sam9g15ek.dts +++ b/arch/arm/dts/at91sam9g15ek.dts @@ -18,7 +18,7 @@ ahb { apb { hlcdc: hlcdc@f8038000 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; }; diff --git a/arch/arm/dts/at91sam9g20-taurus.dts b/arch/arm/dts/at91sam9g20-taurus.dts index ca982737a7..c30ad886b1 100644 --- a/arch/arm/dts/at91sam9g20-taurus.dts +++ b/arch/arm/dts/at91sam9g20-taurus.dts @@ -18,7 +18,7 @@ compatible = "atmel,at91sam9g20", "atmel,at91sam9"; chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &dbgu; }; @@ -58,7 +58,7 @@ }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; board { pinctrl_pck0_as_mck: pck0_as_mck { atmel,pins = @@ -114,7 +114,7 @@ }; &watchdog { - u-boot,dm-pre-reloc; + bootph-all; timeout-sec = <15>; status = "okay"; }; diff --git a/arch/arm/dts/at91sam9g20ek_common.dtsi b/arch/arm/dts/at91sam9g20ek_common.dtsi index 7195454769..249c88ddd0 100644 --- a/arch/arm/dts/at91sam9g20ek_common.dtsi +++ b/arch/arm/dts/at91sam9g20ek_common.dtsi @@ -9,7 +9,7 @@ / { chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &dbgu; }; @@ -47,7 +47,7 @@ }; dbgu: serial@fffff200 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/at91sam9g25-gardena-smart-gateway-u-boot.dtsi b/arch/arm/dts/at91sam9g25-gardena-smart-gateway-u-boot.dtsi index 732dee6c0e..ebb78c5891 100644 --- a/arch/arm/dts/at91sam9g25-gardena-smart-gateway-u-boot.dtsi +++ b/arch/arm/dts/at91sam9g25-gardena-smart-gateway-u-boot.dtsi @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ &dbgu { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/at91sam9g35ek.dts b/arch/arm/dts/at91sam9g35ek.dts index 0cc084eccd..a62ae91e8f 100644 --- a/arch/arm/dts/at91sam9g35ek.dts +++ b/arch/arm/dts/at91sam9g35ek.dts @@ -23,7 +23,7 @@ }; hlcdc: hlcdc@f8038000 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; }; diff --git a/arch/arm/dts/at91sam9g45-corvus.dts b/arch/arm/dts/at91sam9g45-corvus.dts index 172d185189..67be80bb2b 100644 --- a/arch/arm/dts/at91sam9g45-corvus.dts +++ b/arch/arm/dts/at91sam9g45-corvus.dts @@ -17,7 +17,7 @@ compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9"; chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &dbgu; }; @@ -38,7 +38,7 @@ ahb { apb { dbgu: serial@ffffee00 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/at91sam9g45-gurnard.dts b/arch/arm/dts/at91sam9g45-gurnard.dts index 2bc55f01a9..cf0c19c02c 100644 --- a/arch/arm/dts/at91sam9g45-gurnard.dts +++ b/arch/arm/dts/at91sam9g45-gurnard.dts @@ -32,10 +32,10 @@ }; ahb { - u-boot,dm-pre-reloc; + bootph-all; fb@0x00500000 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; display-timings { rev1 { diff --git a/arch/arm/dts/at91sam9g45.dtsi b/arch/arm/dts/at91sam9g45.dtsi index c9b2e4698b..d0bcd79735 100644 --- a/arch/arm/dts/at91sam9g45.dtsi +++ b/arch/arm/dts/at91sam9g45.dtsi @@ -81,14 +81,14 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; apb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; aic: interrupt-controller@fffff000 { #interrupt-cells = <3>; @@ -120,7 +120,7 @@ #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; main_osc: main_osc { compatible = "atmel,at91rm9200-clk-main-osc"; @@ -173,7 +173,7 @@ clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; atmel,clk-output-range = <0 133333333>; atmel,clk-divisors = <1 2 4 3>; - u-boot,dm-pre-reloc; + bootph-all; }; usb: usbck { @@ -441,7 +441,7 @@ 0xfffff800 0x200 0xfffffa00 0x200 >; - u-boot,dm-pre-reloc; + bootph-all; atmel,mux-mask = < /* A B */ @@ -484,7 +484,7 @@ }; dbgu { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_dbgu: dbgu-0 { atmel,pins = <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP diff --git a/arch/arm/dts/at91sam9m10g45ek.dts b/arch/arm/dts/at91sam9m10g45ek.dts index 52a76fefde..bf38e1afe4 100644 --- a/arch/arm/dts/at91sam9m10g45ek.dts +++ b/arch/arm/dts/at91sam9m10g45ek.dts @@ -17,7 +17,7 @@ chosen { bootargs = "mem=64M root=/dev/mtdblock1 rw rootfstype=jffs2"; stdout-path = "serial0:115200n8"; - u-boot,dm-pre-reloc; + bootph-all; }; memory { @@ -38,7 +38,7 @@ apb { dbgu: serial@ffffee00 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; usart1: serial@fff90000 { diff --git a/arch/arm/dts/at91sam9n12.dtsi b/arch/arm/dts/at91sam9n12.dtsi index 024be13dab..cb3a0370b8 100644 --- a/arch/arm/dts/at91sam9n12.dtsi +++ b/arch/arm/dts/at91sam9n12.dtsi @@ -72,14 +72,14 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; apb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; aic: interrupt-controller@fffff000 { #interrupt-cells = <3>; @@ -104,7 +104,7 @@ #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; main_rc_osc: main_rc_osc { compatible = "atmel,at91sam9x5-clk-main-rc-osc"; @@ -171,7 +171,7 @@ atmel,clk-output-range = <0 133333333>; atmel,clk-divisors = <1 2 4 3>; atmel,master-clk-have-div3-pres; - u-boot,dm-pre-reloc; + bootph-all; }; usb: usbck { @@ -247,18 +247,18 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; - u-boot,dm-pre-reloc; + bootph-all; pioAB_clk: pioAB_clk@2 { #clock-cells = <0>; reg = <2>; - u-boot,dm-pre-reloc; + bootph-all; }; pioCD_clk: pioCD_clk@3 { #clock-cells = <0>; reg = <3>; - u-boot,dm-pre-reloc; + bootph-all; }; fuse_clk: fuse_clk@4 { @@ -505,11 +505,11 @@ 0xfdffffff 0x07c00000 0xb83fffff /* pioC */ 0x003fffff 0x003f8000 0x00000000 /* pioD */ >; - u-boot,dm-pre-reloc; + bootph-all; /* shared pinctrl settings */ dbgu { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_dbgu: dbgu-0 { atmel,pins = <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP @@ -806,7 +806,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioAB_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioB: gpio@fffff600 { @@ -818,7 +818,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioAB_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioC: gpio@fffff800 { @@ -830,7 +830,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioCD_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioD: gpio@fffffa00 { @@ -842,7 +842,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioCD_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; dbgu: serial@fffff200 { diff --git a/arch/arm/dts/at91sam9n12ek.dts b/arch/arm/dts/at91sam9n12ek.dts index 64a7abf639..67578b5198 100644 --- a/arch/arm/dts/at91sam9n12ek.dts +++ b/arch/arm/dts/at91sam9n12ek.dts @@ -16,7 +16,7 @@ chosen { bootargs = "root=/dev/mtdblock1 rw rootfstype=jffs2"; stdout-path = "serial0:115200n8"; - u-boot,dm-pre-reloc; + bootph-all; }; memory { @@ -36,7 +36,7 @@ ahb { apb { dbgu: serial@fffff200 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/at91sam9rl.dtsi b/arch/arm/dts/at91sam9rl.dtsi index 6d6aee5524..b855c8fe0f 100644 --- a/arch/arm/dts/at91sam9rl.dtsi +++ b/arch/arm/dts/at91sam9rl.dtsi @@ -78,7 +78,7 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; fb0: fb@00500000 { compatible = "atmel,at91sam9rl-lcdc"; @@ -113,7 +113,7 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; tcb0: timer@fffa0000 { compatible = "atmel,at91rm9200-tcb"; @@ -398,7 +398,7 @@ <0xffffffff 0x0000c780>, /* pioB */ <0xffffffff 0xe3ffff0e>, /* pioC */ <0x003fffff 0x0001ff3c>; /* pioD */ - u-boot,dm-pre-reloc; + bootph-all; /* shared pinctrl settings */ adc0 { @@ -440,7 +440,7 @@ }; dbgu { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_dbgu: dbgu-0 { atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, @@ -779,7 +779,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioA_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioB: gpio@fffff600 { @@ -791,7 +791,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioB_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioC: gpio@fffff800 { @@ -803,7 +803,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioC_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioD: gpio@fffffa00 { @@ -815,7 +815,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioD_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pmc: pmc@fffffc00 { @@ -826,7 +826,7 @@ #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; main: mainck { compatible = "atmel,at91rm9200-clk-main"; @@ -862,7 +862,7 @@ clocks = <&clk32k>, <&main>, <&plla>, <&utmi>; atmel,clk-output-range = <0 94000000>; atmel,clk-divisors = <1 2 4 0>; - u-boot,dm-pre-reloc; + bootph-all; }; prog: progck { @@ -909,30 +909,30 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; - u-boot,dm-pre-reloc; + bootph-all; pioA_clk: pioA_clk@2 { #clock-cells = <0>; reg = <2>; - u-boot,dm-pre-reloc; + bootph-all; }; pioB_clk: pioB_clk@3 { #clock-cells = <0>; reg = <3>; - u-boot,dm-pre-reloc; + bootph-all; }; pioC_clk: pioC_clk@4 { #clock-cells = <0>; reg = <4>; - u-boot,dm-pre-reloc; + bootph-all; }; pioD_clk: pioD_clk@5 { #clock-cells = <0>; reg = <5>; - u-boot,dm-pre-reloc; + bootph-all; }; usart0_clk: usart0_clk@6 { diff --git a/arch/arm/dts/at91sam9rlek.dts b/arch/arm/dts/at91sam9rlek.dts index ae42697445..c94cc68026 100644 --- a/arch/arm/dts/at91sam9rlek.dts +++ b/arch/arm/dts/at91sam9rlek.dts @@ -15,7 +15,7 @@ chosen { bootargs = "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw"; stdout-path = "serial0:115200n8"; - u-boot,dm-pre-reloc; + bootph-all; }; memory { @@ -162,7 +162,7 @@ }; dbgu: serial@fffff200 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/at91sam9x35ek.dts b/arch/arm/dts/at91sam9x35ek.dts index 3ca70c0b74..498c4da1f1 100644 --- a/arch/arm/dts/at91sam9x35ek.dts +++ b/arch/arm/dts/at91sam9x35ek.dts @@ -22,7 +22,7 @@ status = "okay"; }; hlcdc: hlcdc@f8038000 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; }; diff --git a/arch/arm/dts/at91sam9x5.dtsi b/arch/arm/dts/at91sam9x5.dtsi index bd4abe00d6..5fca9b13c2 100644 --- a/arch/arm/dts/at91sam9x5.dtsi +++ b/arch/arm/dts/at91sam9x5.dtsi @@ -81,14 +81,14 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; apb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; aic: interrupt-controller@fffff000 { #interrupt-cells = <3>; @@ -113,7 +113,7 @@ #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; main_rc_osc: main_rc_osc { compatible = "atmel,at91sam9x5-clk-main-rc-osc"; @@ -176,7 +176,7 @@ atmel,clk-output-range = <0 133333333>; atmel,clk-divisors = <1 2 4 3>; atmel,master-clk-have-div3-pres; - u-boot,dm-pre-reloc; + bootph-all; }; @@ -259,7 +259,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; - u-boot,dm-pre-reloc; + bootph-all; pioAB_clk: pioAB_clk@2 { @@ -466,12 +466,12 @@ 0xfffff800 0x200 /* pioC */ 0xfffffa00 0x200 /* pioD */ >; - u-boot,dm-pre-reloc; + bootph-all; /* shared pinctrl settings */ dbgu { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_dbgu: dbgu-0 { atmel,pins = <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP diff --git a/arch/arm/dts/at91sam9x5dm.dtsi b/arch/arm/dts/at91sam9x5dm.dtsi index a620366de8..84ec9bc3e5 100644 --- a/arch/arm/dts/at91sam9x5dm.dtsi +++ b/arch/arm/dts/at91sam9x5dm.dtsi @@ -31,7 +31,7 @@ pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>; display-timings { - u-boot,dm-pre-reloc; + bootph-all; 800x480 { clock-frequency = <24000000>; hactive = <800>; @@ -42,7 +42,7 @@ vfront-porch = <22>; vback-porch = <21>; vsync-len = <2>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/at91sam9x5ek.dtsi b/arch/arm/dts/at91sam9x5ek.dtsi index 1f7f37b687..9d4e853305 100644 --- a/arch/arm/dts/at91sam9x5ek.dtsi +++ b/arch/arm/dts/at91sam9x5ek.dtsi @@ -15,7 +15,7 @@ chosen { bootargs = "root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"; stdout-path = "serial0:115200n8"; - u-boot,dm-pre-reloc; + bootph-all; }; ahb { @@ -47,7 +47,7 @@ }; dbgu: serial@fffff200 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/bcm283x-u-boot.dtsi b/arch/arm/dts/bcm283x-u-boot.dtsi index 22c67c4218..8c17c6f6a5 100644 --- a/arch/arm/dts/bcm283x-u-boot.dtsi +++ b/arch/arm/dts/bcm283x-u-boot.dtsi @@ -27,22 +27,22 @@ &uart0 { skip-init; - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { skip-init; - u-boot,dm-pre-reloc; + bootph-all; }; &gpio { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0_gpio14 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart1_gpio14 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/bcm63158.dtsi b/arch/arm/dts/bcm63158.dtsi index 8b179ba0fc..4bed1f914a 100644 --- a/arch/arm/dts/bcm63158.dtsi +++ b/arch/arm/dts/bcm63158.dtsi @@ -74,7 +74,7 @@ }; clocks { - u-boot,dm-pre-reloc; + bootph-all; periph_clk: periph-clk { compatible = "fixed-clock"; #clock-cells = <0>; @@ -134,7 +134,7 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0xff800000 0x800000>; - u-boot,dm-pre-reloc; + bootph-all; uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; diff --git a/arch/arm/dts/bcm6855.dtsi b/arch/arm/dts/bcm6855.dtsi index 05e0a4e0da..10c003a57c 100644 --- a/arch/arm/dts/bcm6855.dtsi +++ b/arch/arm/dts/bcm6855.dtsi @@ -65,7 +65,7 @@ }; clocks: clocks { - u-boot,dm-pre-reloc; + bootph-all; periph_clk: periph-clk { compatible = "fixed-clock"; @@ -126,7 +126,7 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0 0xff800000 0x800000>; - u-boot,dm-pre-reloc; + bootph-all; uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; diff --git a/arch/arm/dts/bcm6856.dtsi b/arch/arm/dts/bcm6856.dtsi index 99185ab0bc..38c88f8399 100644 --- a/arch/arm/dts/bcm6856.dtsi +++ b/arch/arm/dts/bcm6856.dtsi @@ -55,7 +55,7 @@ }; clocks: clocks { - u-boot,dm-pre-reloc; + bootph-all; periph_clk:periph-clk { compatible = "fixed-clock"; @@ -109,7 +109,7 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0xff800000 0x800000>; - u-boot,dm-pre-reloc; + bootph-all; uart0: serial@640 { compatible = "brcm,bcm6345-uart"; diff --git a/arch/arm/dts/bcm6858.dtsi b/arch/arm/dts/bcm6858.dtsi index 19c4dd6fa7..dc95047a26 100644 --- a/arch/arm/dts/bcm6858.dtsi +++ b/arch/arm/dts/bcm6858.dtsi @@ -74,7 +74,7 @@ }; clocks { - u-boot,dm-pre-reloc; + bootph-all; periph_clk: periph_clk { compatible = "fixed-clock"; @@ -128,7 +128,7 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0xff800000 0x800000>; - u-boot,dm-pre-reloc; + bootph-all; uart0: serial@640 { compatible = "brcm,bcm6345-uart"; diff --git a/arch/arm/dts/bcm96753ref.dts b/arch/arm/dts/bcm96753ref.dts index f74137f18f..ebc8c8e4ce 100644 --- a/arch/arm/dts/bcm96753ref.dts +++ b/arch/arm/dts/bcm96753ref.dts @@ -28,7 +28,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/bcm968360bg.dts b/arch/arm/dts/bcm968360bg.dts index 6f1090aa8e..1335f484ee 100644 --- a/arch/arm/dts/bcm968360bg.dts +++ b/arch/arm/dts/bcm968360bg.dts @@ -26,7 +26,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/bcm968580xref.dts b/arch/arm/dts/bcm968580xref.dts index 6d787bd011..9aa45877b5 100644 --- a/arch/arm/dts/bcm968580xref.dts +++ b/arch/arm/dts/bcm968580xref.dts @@ -26,7 +26,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/bitmain-antminer-s9.dts b/arch/arm/dts/bitmain-antminer-s9.dts index 408862bef0..6c47396ce7 100644 --- a/arch/arm/dts/bitmain-antminer-s9.dts +++ b/arch/arm/dts/bitmain-antminer-s9.dts @@ -70,13 +70,13 @@ }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; disable-wp; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/ca-presidio-engboard.dts b/arch/arm/dts/ca-presidio-engboard.dts index 8c1e3797d7..cbc9213a86 100644 --- a/arch/arm/dts/ca-presidio-engboard.dts +++ b/arch/arm/dts/ca-presidio-engboard.dts @@ -40,7 +40,7 @@ }; uart0: serial@0xf4329148 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "cortina,ca-uart"; reg = <0x0 0xf4329148 0x30>; status = "okay"; diff --git a/arch/arm/dts/da850-evm-u-boot.dtsi b/arch/arm/dts/da850-evm-u-boot.dtsi index d588628641..309130479a 100644 --- a/arch/arm/dts/da850-evm-u-boot.dtsi +++ b/arch/arm/dts/da850-evm-u-boot.dtsi @@ -8,7 +8,7 @@ / { soc@1c00000 { - u-boot,dm-spl; + bootph-pre-ram; }; nand { @@ -16,7 +16,7 @@ }; panel { - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -29,17 +29,17 @@ }; &mmc0 { - u-boot,dm-spl; + bootph-pre-ram; }; &serial2 { - u-boot,dm-spl; + bootph-pre-ram; }; &spi1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/da850-lcdk-u-boot.dtsi b/arch/arm/dts/da850-lcdk-u-boot.dtsi index d50775c173..bbaebcb67a 100644 --- a/arch/arm/dts/da850-lcdk-u-boot.dtsi +++ b/arch/arm/dts/da850-lcdk-u-boot.dtsi @@ -13,7 +13,7 @@ }; soc@1c00000 { - u-boot,dm-spl; + bootph-pre-ram; }; nand { @@ -22,13 +22,13 @@ }; &mmc0 { - u-boot,dm-spl; + bootph-pre-ram; }; &serial2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/dm8168-evm-u-boot.dtsi b/arch/arm/dts/dm8168-evm-u-boot.dtsi index de0bb9bc81..f939df27e4 100644 --- a/arch/arm/dts/dm8168-evm-u-boot.dtsi +++ b/arch/arm/dts/dm8168-evm-u-boot.dtsi @@ -7,6 +7,6 @@ / { ocp { - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/dra7-evm-u-boot.dtsi b/arch/arm/dts/dra7-evm-u-boot.dtsi index 5622512b24..f1ff5f6733 100644 --- a/arch/arm/dts/dra7-evm-u-boot.dtsi +++ b/arch/arm/dts/dra7-evm-u-boot.dtsi @@ -15,38 +15,38 @@ }; &mmc2_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_pins_hs { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_pins_ddr_rev20 { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_pins_hs200 { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_iodelay_hs200_rev20_conf { - u-boot,dm-spl; + bootph-pre-ram; }; &omap_dwc3_1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb1 { - u-boot,dm-spl; + bootph-pre-ram; dr_mode = "peripheral"; }; &usb2_phy1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb3_phy1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/dra7-ipu-common-early-boot.dtsi b/arch/arm/dts/dra7-ipu-common-early-boot.dtsi index ec6040ff93..90fc4cb36d 100644 --- a/arch/arm/dts/dra7-ipu-common-early-boot.dtsi +++ b/arch/arm/dts/dra7-ipu-common-early-boot.dtsi @@ -9,7 +9,7 @@ }; fs_loader0: fs_loader@0 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "u-boot,fs-loader"; phandlepart = <&mmc1 1>; }; @@ -18,14 +18,14 @@ #address-cells = <2>; #size-cells = <2>; ranges; - u-boot,dm-spl; + bootph-pre-ram; ipu2_memory_region: ipu2-memory@95800000 { compatible = "shared-dma-pool"; reg = <0x0 0x95800000 0x0 0x3800000>; reusable; status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; }; ipu1_memory_region: ipu1-memory@9d000000 { @@ -33,81 +33,81 @@ reg = <0x0 0x9d000000 0x0 0x2000000>; reusable; status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; }; ipu1_pgtbl: ipu1-pgtbl@95700000 { reg = <0x0 0x95700000 0x0 0x40000>; no-map; - u-boot,dm-spl; + bootph-pre-ram; }; ipu2_pgtbl: ipu2-pgtbl@95740000 { reg = <0x0 0x95740000 0x0 0x40000>; no-map; - u-boot,dm-spl; + bootph-pre-ram; }; }; }; &timer3 { - u-boot,dm-spl; + bootph-pre-ram; }; &timer4 { - u-boot,dm-spl; + bootph-pre-ram; }; &timer7 { - u-boot,dm-spl; + bootph-pre-ram; }; &timer8 { - u-boot,dm-spl; + bootph-pre-ram; }; &timer9 { - u-boot,dm-spl; + bootph-pre-ram; }; &timer11 { - u-boot,dm-spl; + bootph-pre-ram; }; &mmu_ipu1 { - u-boot,dm-spl; + bootph-pre-ram; }; &mmu_ipu2 { - u-boot,dm-spl; + bootph-pre-ram; }; &ipu1 { status = "okay"; memory-region = <&ipu1_memory_region>; pg-tbl = <&ipu1_pgtbl>; - u-boot,dm-spl; + bootph-pre-ram; }; &ipu2 { status = "okay"; memory-region = <&ipu2_memory_region>; pg-tbl = <&ipu2_pgtbl>; - u-boot,dm-spl; + bootph-pre-ram; }; &l4_wkup { - u-boot,dm-spl; + bootph-pre-ram; }; &prm { - u-boot,dm-spl; + bootph-pre-ram; }; &ipu1_rst { - u-boot,dm-spl; + bootph-pre-ram; }; &ipu2_rst { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/dra71-evm-u-boot.dtsi b/arch/arm/dts/dra71-evm-u-boot.dtsi index 40443da5c8..f13eadf6b6 100644 --- a/arch/arm/dts/dra71-evm-u-boot.dtsi +++ b/arch/arm/dts/dra71-evm-u-boot.dtsi @@ -23,42 +23,42 @@ }; &mmc2_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_pins_hs { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_pins_ddr_rev20 { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_iodelay_ddr_conf { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_pins_hs200 { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_iodelay_hs200_rev20_conf { - u-boot,dm-spl; + bootph-pre-ram; }; &omap_dwc3_1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb1 { - u-boot,dm-spl; + bootph-pre-ram; dr_mode = "peripheral"; }; &usb2_phy1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb3_phy1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/dra72-evm-revc-u-boot.dtsi b/arch/arm/dts/dra72-evm-revc-u-boot.dtsi index 40443da5c8..f13eadf6b6 100644 --- a/arch/arm/dts/dra72-evm-revc-u-boot.dtsi +++ b/arch/arm/dts/dra72-evm-revc-u-boot.dtsi @@ -23,42 +23,42 @@ }; &mmc2_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_pins_hs { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_pins_ddr_rev20 { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_iodelay_ddr_conf { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_pins_hs200 { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_iodelay_hs200_rev20_conf { - u-boot,dm-spl; + bootph-pre-ram; }; &omap_dwc3_1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb1 { - u-boot,dm-spl; + bootph-pre-ram; dr_mode = "peripheral"; }; &usb2_phy1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb3_phy1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/dra72-evm-u-boot.dtsi b/arch/arm/dts/dra72-evm-u-boot.dtsi index 6c868f75d1..91a3b6b742 100644 --- a/arch/arm/dts/dra72-evm-u-boot.dtsi +++ b/arch/arm/dts/dra72-evm-u-boot.dtsi @@ -6,18 +6,18 @@ #include "omap5-u-boot.dtsi" &omap_dwc3_1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb1 { - u-boot,dm-spl; + bootph-pre-ram; dr_mode = "peripheral"; }; &usb2_phy1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb3_phy1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/dra76-evm-u-boot.dtsi b/arch/arm/dts/dra76-evm-u-boot.dtsi index 5fae6ba919..db5a466d84 100644 --- a/arch/arm/dts/dra76-evm-u-boot.dtsi +++ b/arch/arm/dts/dra76-evm-u-boot.dtsi @@ -15,30 +15,30 @@ }; &mmc2_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_pins_hs200 { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2_iodelay_hs200_conf { - u-boot,dm-spl; + bootph-pre-ram; }; &omap_dwc3_1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb1 { - u-boot,dm-spl; + bootph-pre-ram; dr_mode = "peripheral"; }; &usb2_phy1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb3_phy1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi b/arch/arm/dts/dragonboard410c-uboot.dtsi index e4fecaa19e..3b0bd0ed0a 100644 --- a/arch/arm/dts/dragonboard410c-uboot.dtsi +++ b/arch/arm/dts/dragonboard410c-uboot.dtsi @@ -8,26 +8,26 @@ / { smem { - u-boot,dm-pre-reloc; + bootph-all; }; soc { - u-boot,dm-pre-reloc; + bootph-all; pinctrl@1000000 { - u-boot,dm-pre-reloc; + bootph-all; uart { - u-boot,dm-pre-reloc; + bootph-all; }; }; qcom,gcc@1800000 { - u-boot,dm-pre-reloc; + bootph-all; }; serial@78b0000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/dragonboard820c-uboot.dtsi b/arch/arm/dts/dragonboard820c-uboot.dtsi index 2270ac73bf..457728a43e 100644 --- a/arch/arm/dts/dragonboard820c-uboot.dtsi +++ b/arch/arm/dts/dragonboard820c-uboot.dtsi @@ -7,26 +7,26 @@ / { smem { - u-boot,dm-pre-reloc; + bootph-all; }; soc { - u-boot,dm-pre-reloc; + bootph-all; pinctrl@1010000 { - u-boot,dm-pre-reloc; + bootph-all; uart { - u-boot,dm-pre-reloc; + bootph-all; }; }; clock-controller@300000 { - u-boot,dm-pre-reloc; + bootph-all; }; serial@75b0000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/dragonboard845c-uboot.dtsi b/arch/arm/dts/dragonboard845c-uboot.dtsi index 8b5a7ee573..7106db8a73 100644 --- a/arch/arm/dts/dragonboard845c-uboot.dtsi +++ b/arch/arm/dts/dragonboard845c-uboot.dtsi @@ -9,18 +9,18 @@ / { soc { - u-boot,dm-pre-reloc; + bootph-all; serial@a84000 { - u-boot,dm-pre-reloc; + bootph-all; }; clock-controller@100000 { - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl_north@3900000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/exynos5.dtsi b/arch/arm/dts/exynos5.dtsi index cdc965d90d..14251764e6 100644 --- a/arch/arm/dts/exynos5.dtsi +++ b/arch/arm/dts/exynos5.dtsi @@ -137,7 +137,7 @@ }; fimd@14400000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "samsung,exynos-fimd"; reg = <0x14400000 0x10000>; #address-cells = <1>; @@ -218,7 +218,7 @@ compatible = "samsung,exynos4210-uart"; reg = <0x12C30000 0x100>; interrupts = <0 54 0>; - u-boot,dm-pre-reloc; + bootph-all; id = <3>; }; }; diff --git a/arch/arm/dts/exynos5422-odroidxu3.dts b/arch/arm/dts/exynos5422-odroidxu3.dts index 256df6d6c2..9d055d066f 100644 --- a/arch/arm/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/dts/exynos5422-odroidxu3.dts @@ -31,7 +31,7 @@ }; adc@12D10000 { - u-boot,dm-pre-reloc; + bootph-all; vdd-supply = <&ldo4_reg>; status = "okay"; }; diff --git a/arch/arm/dts/exynos7420.dtsi b/arch/arm/dts/exynos7420.dtsi index b8bf373e4b..373f48cf2e 100644 --- a/arch/arm/dts/exynos7420.dtsi +++ b/arch/arm/dts/exynos7420.dtsi @@ -15,14 +15,14 @@ fin_pll: xxti { compatible = "fixed-clock"; clock-output-names = "fin_pll"; - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; }; clock_topc: clock-controller@10570000 { compatible = "samsung,exynos7-clock-topc"; reg = <0x10570000 0x10000>; - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <1>; clocks = <&fin_pll>; clock-names = "fin_pll"; @@ -31,7 +31,7 @@ clock_top0: clock-controller@105d0000 { compatible = "samsung,exynos7-clock-top0"; reg = <0x105d0000 0xb000>; - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <1>; clocks = <&fin_pll>, <&clock_topc DOUT_SCLK_BUS0_PLL>, <&clock_topc DOUT_SCLK_BUS1_PLL>, @@ -45,7 +45,7 @@ clock_peric1: clock-controller@14c80000 { compatible = "samsung,exynos7-clock-peric1"; reg = <0x14c80000 0xd00>; - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <1>; clocks = <&fin_pll>, <&clock_top0 DOUT_ACLK_PERIC1>, <&clock_top0 CLK_SCLK_UART1>, @@ -58,21 +58,21 @@ pinctrl@13470000 { compatible = "samsung,exynos7420-pinctrl"; reg = <0x13470000 0x1000>; - u-boot,dm-pre-reloc; + bootph-all; serial2_bus: serial2-bus { samsung,pins = "gpd1-4", "gpd1-5"; samsung,pin-function = <2>; samsung,pin-pud = <3>; samsung,pin-drv = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; }; serial@14C30000 { compatible = "samsung,exynos4210-uart"; reg = <0x14C30000 0x100>; - u-boot,dm-pre-reloc; + bootph-all; clocks = <&clock_peric1 PCLK_UART2>, <&clock_peric1 SCLK_UART2>; clock-names = "uart", "clk_uart_baud0"; diff --git a/arch/arm/dts/exynos78x0.dtsi b/arch/arm/dts/exynos78x0.dtsi index fb9c9cbdf9..11d8396f9c 100644 --- a/arch/arm/dts/exynos78x0.dtsi +++ b/arch/arm/dts/exynos78x0.dtsi @@ -15,7 +15,7 @@ fin_pll: xxti { compatible = "fixed-clock"; clock-output-names = "fin_pll"; - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; }; @@ -24,14 +24,14 @@ compatible = "fixed-clock"; clock-output-names = "fin_uart"; clock-frequency = <132710400>; - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; }; uart2: serial@13820000 { compatible = "samsung,exynos4210-uart"; reg = <0x13820000 0x100>; - u-boot,dm-pre-reloc; + bootph-all; clocks = <&fin_uart>, <&fin_uart>; // driver uses 1st clock clock-names = "uart", "clk_uart_baud0"; pinctrl-names = "default"; diff --git a/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi index 956d724979..f2d6b183ed 100644 --- a/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi @@ -4,133 +4,133 @@ */ &mu { - u-boot,dm-pre-proper; + bootph-some-ram; }; &clk { - u-boot,dm-pre-proper; + bootph-some-ram; }; &iomuxc { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio0 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio1 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio2 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio3 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio4 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio5 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio6 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio7 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_dma { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_dma_lpuart1 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_conn { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_conn_sdch0 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_conn_sdch1 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_conn_sdch2 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio0 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio1 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio2 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio3 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio4 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio5 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio6 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio7 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &lpuart0 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &lpuart1 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &lpuart2 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &lpuart3 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &usdhc1 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &usdhc2 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &usdhc3 { - u-boot,dm-pre-proper; + bootph-some-ram; }; diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi index eefdccf992..6e5379e53c 100644 --- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi @@ -7,156 +7,156 @@ &{/imx8qm-pm} { - u-boot,dm-spl; + bootph-pre-ram; }; &mu { - u-boot,dm-spl; + bootph-pre-ram; }; &clk { - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio6 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio7 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn_sdch0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn_sdch1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn_sdch2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_dma { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_dma_lpuart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_caam { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_caam_jr1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_caam_jr2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_caam_jr3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio6 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio7 { - u-boot,dm-spl; + bootph-pre-ram; }; &lpuart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; mmc-hs400-1_8v; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; sd-uhs-sdr104; sd-uhs-ddr50; }; &crypto { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr2 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr3 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi index 3ca53bb945..79f08ec138 100644 --- a/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi @@ -5,113 +5,113 @@ &{/imx8qx-pm} { - u-boot,dm-spl; + bootph-pre-ram; }; &mu { - u-boot,dm-spl; + bootph-pre-ram; }; &clk { - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio6 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio7 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn_sdch0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn_sdch1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn_sdch2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio6 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio7 { - u-boot,dm-spl; + bootph-pre-ram; }; &lpuart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi index 91e2944781..de014c8651 100644 --- a/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi @@ -7,125 +7,125 @@ &{/imx8qx-pm} { - u-boot,dm-pre-proper; + bootph-some-ram; }; &mu { - u-boot,dm-pre-proper; + bootph-some-ram; }; &clk { - u-boot,dm-pre-proper; + bootph-some-ram; }; &iomuxc { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio0 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio1 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio2 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio3 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio4 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio5 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio6 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_lsio_gpio7 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_dma { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_dma_lpuart0 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_dma_lpuart3 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_conn { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_conn_sdch0 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_conn_sdch1 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_conn_sdch2 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio0 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio1 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio2 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio3 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio4 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio5 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio6 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &gpio7 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &lpuart3 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &usdhc1 { - u-boot,dm-pre-proper; + bootph-some-ram; }; &usdhc2 { - u-boot,dm-pre-proper; + bootph-some-ram; }; diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi index 17f44e1ce7..591eb66604 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi @@ -7,156 +7,156 @@ &{/imx8qx-pm} { - u-boot,dm-spl; + bootph-pre-ram; }; &mu { - u-boot,dm-spl; + bootph-pre-ram; }; &clk { - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio6 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio7 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn_sdch0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn_sdch1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn_sdch2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_dma { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_dma_lpuart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_caam { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_caam_jr1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_caam_jr2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_caam_jr3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio6 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio7 { - u-boot,dm-spl; + bootph-pre-ram; }; &lpuart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; mmc-hs400-1_8v; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; sd-uhs-sdr104; sd-uhs-ddr50; }; &crypto { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr2 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr3 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/fsl-imx8qxp-mek.dts b/arch/arm/dts/fsl-imx8qxp-mek.dts index 4f35fbe31d..6a987f0dbb 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek.dts +++ b/arch/arm/dts/fsl-imx8qxp-mek.dts @@ -135,7 +135,7 @@ }; &A35_0 { - u-boot,dm-pre-reloc; + bootph-all; }; &lpuart0 { diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi index 08e7231793..83750ab001 100644 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi +++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi @@ -153,30 +153,30 @@ #endif &fspi { - u-boot,dm-pre-reloc; + bootph-all; flash@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; &dspi2 { - u-boot,dm-pre-reloc; + bootph-all; }; &esdhc { - u-boot,dm-pre-reloc; + bootph-all; }; &esdhc1 { - u-boot,dm-pre-reloc; + bootph-all; }; &lpuart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &duart0 { - u-boot,dm-pre-reloc; + bootph-all; }; /* @@ -197,9 +197,9 @@ }; &soc { - u-boot,dm-pre-reloc; + bootph-all; }; &sysclk { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/fsl-ls1088a-qds.dtsi b/arch/arm/dts/fsl-ls1088a-qds.dtsi index 21c50078c3..85dc7457bf 100644 --- a/arch/arm/dts/fsl-ls1088a-qds.dtsi +++ b/arch/arm/dts/fsl-ls1088a-qds.dtsi @@ -24,7 +24,7 @@ &i2c0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; fpga@66 { #address-cells = <1>; diff --git a/arch/arm/dts/fsl-ls1088a-rdb.dts b/arch/arm/dts/fsl-ls1088a-rdb.dts index 5cdd598152..ad059437b5 100644 --- a/arch/arm/dts/fsl-ls1088a-rdb.dts +++ b/arch/arm/dts/fsl-ls1088a-rdb.dts @@ -121,7 +121,7 @@ &i2c0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; i2c-mux@77 { compatible = "nxp,pca9547"; diff --git a/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts b/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts index 9e68c147e6..a609290000 100644 --- a/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts +++ b/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts @@ -146,7 +146,7 @@ &i2c0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; pca9547@75 { compatible = "nxp,pca9547"; diff --git a/arch/arm/dts/fsl-lx2160a-qds.dtsi b/arch/arm/dts/fsl-lx2160a-qds.dtsi index 69e11cca2d..6635c52585 100644 --- a/arch/arm/dts/fsl-lx2160a-qds.dtsi +++ b/arch/arm/dts/fsl-lx2160a-qds.dtsi @@ -143,7 +143,7 @@ &i2c0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; fpga@66 { #address-cells = <1>; diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts index 8ca4afa7ea..399409776e 100644 --- a/arch/arm/dts/fsl-lx2160a-rdb.dts +++ b/arch/arm/dts/fsl-lx2160a-rdb.dts @@ -110,7 +110,7 @@ &i2c0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; &i2c4 { diff --git a/arch/arm/dts/hi3660-hikey960-u-boot.dtsi b/arch/arm/dts/hi3660-hikey960-u-boot.dtsi index 648c77f8c5..b7ea672739 100644 --- a/arch/arm/dts/hi3660-hikey960-u-boot.dtsi +++ b/arch/arm/dts/hi3660-hikey960-u-boot.dtsi @@ -6,5 +6,5 @@ */ &dwmmc1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/hi6220-hikey-u-boot.dtsi b/arch/arm/dts/hi6220-hikey-u-boot.dtsi index 3113983240..fcfcb37a10 100644 --- a/arch/arm/dts/hi6220-hikey-u-boot.dtsi +++ b/arch/arm/dts/hi6220-hikey-u-boot.dtsi @@ -6,9 +6,9 @@ */ &mmc0 { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/hpe-gxp-u-boot.dtsi b/arch/arm/dts/hpe-gxp-u-boot.dtsi index 7a2b488521..63a1a11fed 100644 --- a/arch/arm/dts/hpe-gxp-u-boot.dtsi +++ b/arch/arm/dts/hpe-gxp-u-boot.dtsi @@ -8,10 +8,10 @@ / { axi { - u-boot,dm-pre-reloc; + bootph-all; ahb@c0000000 { - u-boot,dm-pre-reloc; + bootph-all; spi0: spi@200 { compatible = "hpe,gxp-spi"; diff --git a/arch/arm/dts/imx28-xea-u-boot.dtsi b/arch/arm/dts/imx28-xea-u-boot.dtsi index 8b5d7e10b3..f6488154d8 100644 --- a/arch/arm/dts/imx28-xea-u-boot.dtsi +++ b/arch/arm/dts/imx28-xea-u-boot.dtsi @@ -13,36 +13,36 @@ #include "imx28-u-boot.dtsi" / { apb@80000000 { - u-boot,dm-spl; + bootph-pre-ram; apbh@80000000 { - u-boot,dm-spl; + bootph-pre-ram; }; apbx@80040000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; }; &clks { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl { - u-boot,dm-spl; + bootph-pre-ram; }; &ssp0 { - u-boot,dm-spl; + bootph-pre-ram; }; &ssp3 { num-cs = <2>; spi-max-frequency = <40000000>; - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx53-m53menlo-u-boot.dtsi b/arch/arm/dts/imx53-m53menlo-u-boot.dtsi index 869adb9dad..62453db62e 100644 --- a/arch/arm/dts/imx53-m53menlo-u-boot.dtsi +++ b/arch/arm/dts/imx53-m53menlo-u-boot.dtsi @@ -5,10 +5,10 @@ / { soc { - u-boot,dm-pre-reloc; + bootph-all; bus@50000000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -19,29 +19,29 @@ }; &gpio1 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio2 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio3 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio4 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio5 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio6 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio7 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx53-ppd-uboot.dtsi b/arch/arm/dts/imx53-ppd-uboot.dtsi index b293e27a03..f06cd8a3db 100644 --- a/arch/arm/dts/imx53-ppd-uboot.dtsi +++ b/arch/arm/dts/imx53-ppd-uboot.dtsi @@ -38,21 +38,21 @@ }; &gpio1 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio2 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio3 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio4 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio5 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx6dl-brppt2.dts b/arch/arm/dts/imx6dl-brppt2.dts index f515e4cc6a..575bfac7bb 100644 --- a/arch/arm/dts/imx6dl-brppt2.dts +++ b/arch/arm/dts/imx6dl-brppt2.dts @@ -109,7 +109,7 @@ }; vbus1_regulator: regulator@1 { - u-boot,dm-preloc; + bootph-all; compatible = "regulator-fixed"; regulator-name = "vbus1_regulator"; regulator-min-microvolt = <5000000>; @@ -155,8 +155,8 @@ }; &uart1 { - u-boot,dm-spl; - u-boot,dm-preloc; + bootph-pre-ram; + bootph-all; status = "okay"; }; @@ -239,22 +239,22 @@ }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; }; @@ -263,13 +263,13 @@ }; &ecspi1 { - u-boot,dm-spl; + bootph-pre-ram; cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>, <&gpio3 19 GPIO_ACTIVE_LOW>; status = "okay"; spi-max-frequency = <25000000>; m25p32@1 { - u-boot,dm-spl; + bootph-pre-ram; #address-cells = <1>; #size-cells = <1>; compatible = "st,m25p", "jedec,spi-nor"; diff --git a/arch/arm/dts/imx6dl-colibri-eval-v3-u-boot.dtsi b/arch/arm/dts/imx6dl-colibri-eval-v3-u-boot.dtsi index c4e8d0fb45..31f3a48dd9 100644 --- a/arch/arm/dts/imx6dl-colibri-eval-v3-u-boot.dtsi +++ b/arch/arm/dts/imx6dl-colibri-eval-v3-u-boot.dtsi @@ -16,5 +16,5 @@ &wdog1 { status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi b/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi index 06dd72527d..7fbeb25dcf 100644 --- a/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi +++ b/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi @@ -6,5 +6,5 @@ #include "imx6qdl-icore-u-boot.dtsi" &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi index 3af57ff8eb..c37aa128fa 100644 --- a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi +++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi @@ -6,9 +6,9 @@ #include "imx6qdl-u-boot.dtsi" &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6q-apalis-eval-u-boot.dtsi b/arch/arm/dts/imx6q-apalis-eval-u-boot.dtsi index df809565c6..3d19796cb6 100644 --- a/arch/arm/dts/imx6q-apalis-eval-u-boot.dtsi +++ b/arch/arm/dts/imx6q-apalis-eval-u-boot.dtsi @@ -21,5 +21,5 @@ &wdog1 { status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6q-bosch-acc-u-boot.dtsi b/arch/arm/dts/imx6q-bosch-acc-u-boot.dtsi index 37c182d318..c6cb9a5ac7 100644 --- a/arch/arm/dts/imx6q-bosch-acc-u-boot.dtsi +++ b/arch/arm/dts/imx6q-bosch-acc-u-boot.dtsi @@ -10,18 +10,18 @@ }; soc { - u-boot,dm-spl; + bootph-pre-ram; bus@2000000 { - u-boot,dm-spl; + bootph-pre-ram; spba-bus@2000000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; bus@2100000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -32,49 +32,49 @@ }; &uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio6 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio7 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6q-display5-u-boot.dtsi b/arch/arm/dts/imx6q-display5-u-boot.dtsi index ced4dacc73..dbe0ef7a0e 100644 --- a/arch/arm/dts/imx6q-display5-u-boot.dtsi +++ b/arch/arm/dts/imx6q-display5-u-boot.dtsi @@ -21,10 +21,10 @@ }; soc { - u-boot,dm-pre-reloc; + bootph-all; bus@2100000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -45,5 +45,5 @@ }; &uart5 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi b/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi index 06dd72527d..7fbeb25dcf 100644 --- a/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi +++ b/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi @@ -6,5 +6,5 @@ #include "imx6qdl-icore-u-boot.dtsi" &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6q-kp-u-boot.dtsi b/arch/arm/dts/imx6q-kp-u-boot.dtsi index e6b71b22ae..83d406a062 100644 --- a/arch/arm/dts/imx6q-kp-u-boot.dtsi +++ b/arch/arm/dts/imx6q-kp-u-boot.dtsi @@ -10,9 +10,9 @@ / { clocks { - u-boot,dm-spl; + bootph-pre-ram; osc { - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -23,37 +23,37 @@ }; &clks { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc4 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc4 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6q-logicpd-u-boot.dtsi b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi index ee44ed91fe..2b28d36ef1 100644 --- a/arch/arm/dts/imx6q-logicpd-u-boot.dtsi +++ b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi @@ -6,25 +6,25 @@ #include "imx6qdl-u-boot.dtsi" &uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6q-phytec-mira-rdk-nand-u-boot.dtsi b/arch/arm/dts/imx6q-phytec-mira-rdk-nand-u-boot.dtsi index 5a64f86b11..08b4ee0ab8 100644 --- a/arch/arm/dts/imx6q-phytec-mira-rdk-nand-u-boot.dtsi +++ b/arch/arm/dts/imx6q-phytec-mira-rdk-nand-u-boot.dtsi @@ -6,39 +6,39 @@ #include "imx6qdl-u-boot.dtsi" &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio6 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &ecspi1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_ecspi1 { - u-boot,dm-spl; + bootph-pre-ram; }; &m25p80 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpmi { diff --git a/arch/arm/dts/imx6q-tbs2910-u-boot.dtsi b/arch/arm/dts/imx6q-tbs2910-u-boot.dtsi index d48719e7d5..1d9eaffecd 100644 --- a/arch/arm/dts/imx6q-tbs2910-u-boot.dtsi +++ b/arch/arm/dts/imx6q-tbs2910-u-boot.dtsi @@ -1,17 +1,17 @@ // SPDX-License-Identifier: GPL-2.0+ &{/soc/bus@2000000} { /* AIPS1 */ - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &{/soc} { - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi b/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi index 3063f01d70..3146dbb256 100644 --- a/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi +++ b/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi @@ -5,7 +5,7 @@ / { chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &uart2; }; @@ -16,19 +16,19 @@ }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_gpio { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &aips2 { - u-boot,dm-pre-reloc; + bootph-all; }; &backlight { @@ -41,7 +41,7 @@ * because "pinctrl-assert-gpios" from &ecspi1 isn't handled by u-boot */ &gpio2 { - u-boot,dm-pre-reloc; + bootph-all; wp_spi_nor { gpio-hog; @@ -59,21 +59,21 @@ }; &gpio3 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio5 { - u-boot,dm-pre-reloc; + bootph-all; }; &ecspi4 { - u-boot,dm-pre-reloc; + bootph-all; }; &flash { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_ecspi4 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx6qdl-aristainetos2c-u-boot.dtsi b/arch/arm/dts/imx6qdl-aristainetos2c-u-boot.dtsi index 88826a2634..33c3467b6a 100644 --- a/arch/arm/dts/imx6qdl-aristainetos2c-u-boot.dtsi +++ b/arch/arm/dts/imx6qdl-aristainetos2c-u-boot.dtsi @@ -5,7 +5,7 @@ / { chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &uart2; }; @@ -16,23 +16,23 @@ }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_gpio { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &iomuxc { - u-boot,dm-pre-reloc; + bootph-all; }; &aips2 { - u-boot,dm-pre-reloc; + bootph-all; }; &backlight { @@ -45,7 +45,7 @@ * because "pinctrl-assert-gpios" from &ecspi1 isn't handled by u-boot */ &gpio2 { - u-boot,dm-pre-reloc; + bootph-all; wp_spi_nor { gpio-hog; @@ -61,17 +61,17 @@ }; &gpio4 { - u-boot,dm-pre-reloc; + bootph-all; }; &ecspi1 { - u-boot,dm-pre-reloc; + bootph-all; }; &flash { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_ecspi1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx6qdl-aristainetos2c_cslb-u-boot.dtsi b/arch/arm/dts/imx6qdl-aristainetos2c_cslb-u-boot.dtsi index 8c2ed70075..04ed0c1e15 100644 --- a/arch/arm/dts/imx6qdl-aristainetos2c_cslb-u-boot.dtsi +++ b/arch/arm/dts/imx6qdl-aristainetos2c_cslb-u-boot.dtsi @@ -5,7 +5,7 @@ / { chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &uart1; }; @@ -16,23 +16,23 @@ }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_gpio { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &iomuxc { - u-boot,dm-pre-reloc; + bootph-all; }; &aips1 { - u-boot,dm-pre-reloc; + bootph-all; }; &backlight { @@ -45,7 +45,7 @@ * because "pinctrl-assert-gpios" from &ecspi1 isn't handled by u-boot */ &gpio2 { - u-boot,dm-pre-reloc; + bootph-all; wp_spi_nor { gpio-hog; @@ -61,17 +61,17 @@ }; &gpio4 { - u-boot,dm-pre-reloc; + bootph-all; }; &ecspi1 { - u-boot,dm-pre-reloc; + bootph-all; }; &flash { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_ecspi1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi index e1cb9b3e89..23a05773b5 100644 --- a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi +++ b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi @@ -16,35 +16,35 @@ }; &soc { - u-boot,dm-pre-reloc; + bootph-all; }; &aips1 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_microsom_uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio2 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio3 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio4 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio6 { - u-boot,dm-pre-reloc; + bootph-all; }; &usdhc1 { @@ -52,9 +52,9 @@ }; &usdhc2 { - u-boot,dm-pre-reloc; + bootph-all; }; &usdhc3 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi b/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi index 158cadcedd..4476d3cb6f 100644 --- a/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi +++ b/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi @@ -6,17 +6,17 @@ #include "imx6qdl-u-boot.dtsi" &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc4 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc4 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6qdl-icore-u-boot.dtsi b/arch/arm/dts/imx6qdl-icore-u-boot.dtsi index 12e46e38f6..e02cd58300 100644 --- a/arch/arm/dts/imx6qdl-icore-u-boot.dtsi +++ b/arch/arm/dts/imx6qdl-icore-u-boot.dtsi @@ -6,29 +6,29 @@ #include "imx6qdl-u-boot.dtsi" &soc { - u-boot,dm-pre-reloc; + bootph-all; }; &aips1 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi b/arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi index ea90f40a42..cdc721402e 100644 --- a/arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi +++ b/arch/arm/dts/imx6qdl-sabreauto-u-boot.dtsi @@ -13,9 +13,9 @@ &usdhc3 { no-1-8-v; - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi b/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi index cbb856fba3..5c4101b76d 100644 --- a/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi +++ b/arch/arm/dts/imx6qdl-sabresd-u-boot.dtsi @@ -12,9 +12,9 @@ }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6qdl-u-boot.dtsi b/arch/arm/dts/imx6qdl-u-boot.dtsi index f74af6c423..cab9b6cfc5 100644 --- a/arch/arm/dts/imx6qdl-u-boot.dtsi +++ b/arch/arm/dts/imx6qdl-u-boot.dtsi @@ -10,30 +10,30 @@ }; soc { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; bus@2000000 { - u-boot,dm-spl; + bootph-pre-ram; spba-bus@2000000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; bus@2100000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; &ipu1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx6sll-evk-u-boot.dtsi b/arch/arm/dts/imx6sll-evk-u-boot.dtsi index 14d0b58949..0e60906509 100644 --- a/arch/arm/dts/imx6sll-evk-u-boot.dtsi +++ b/arch/arm/dts/imx6sll-evk-u-boot.dtsi @@ -4,5 +4,5 @@ */ &pinctrl_uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi b/arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi index 7812aa34ee..b619d983aa 100644 --- a/arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi +++ b/arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi @@ -16,5 +16,5 @@ }; &pinctrl_uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi b/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi index 301838d2d0..eaa2a45fed 100644 --- a/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi +++ b/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi @@ -4,25 +4,25 @@ */ &{/aliases} { - u-boot,dm-pre-reloc; + bootph-all; display0 = &lcdif; }; &soc { - u-boot,dm-pre-reloc; + bootph-all; }; &aips2 { - u-boot,dm-pre-reloc; + bootph-all; }; &iomuxc { - u-boot,dm-pre-reloc; + bootph-all; }; &lcdif { display = <&display0>; - u-boot,dm-pre-reloc; + bootph-all; display0: display@0 { bits-per-pixel = <24>; diff --git a/arch/arm/dts/imx6ul-geam-u-boot.dtsi b/arch/arm/dts/imx6ul-geam-u-boot.dtsi index 3141a07f04..014b6bdd13 100644 --- a/arch/arm/dts/imx6ul-geam-u-boot.dtsi +++ b/arch/arm/dts/imx6ul-geam-u-boot.dtsi @@ -6,19 +6,19 @@ #include "imx6ul-u-boot.dtsi" &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc { pinctrl_usdhc1: usdhc1grp { - u-boot,dm-spl; + bootph-pre-ram; }; pinctrl_usdhc1_100mhz: usdhc1grp100mhz { - u-boot,dm-spl; + bootph-pre-ram; }; pinctrl_usdhc1_200mhz: usdhc1grp200mhz { - u-boot,dm-spl; + bootph-pre-ram; }; }; diff --git a/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi b/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi index 6256b793d1..a177acad9a 100644 --- a/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi +++ b/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi @@ -6,5 +6,5 @@ #include "imx6ul-isiot-u-boot.dtsi" &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6ul-isiot-u-boot.dtsi b/arch/arm/dts/imx6ul-isiot-u-boot.dtsi index 7213e71989..8f58886478 100644 --- a/arch/arm/dts/imx6ul-isiot-u-boot.dtsi +++ b/arch/arm/dts/imx6ul-isiot-u-boot.dtsi @@ -6,29 +6,29 @@ #include "imx6ul-u-boot.dtsi" &soc { - u-boot,dm-pre-reloc; + bootph-all; }; &aips1 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi b/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi index 4918de388e..ebfb95dcdf 100644 --- a/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi +++ b/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi @@ -7,22 +7,22 @@ / { soc { - u-boot,dm-spl; + bootph-pre-ram; }; }; &aips2 { - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi b/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi index 3f351ef0c4..aa88964f21 100644 --- a/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi +++ b/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi @@ -14,21 +14,21 @@ }; &aips1 { - u-boot,dm-spl; + bootph-pre-ram; spba-bus@02000000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &lcdif { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pinctrl_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6ul-u-boot.dtsi b/arch/arm/dts/imx6ul-u-boot.dtsi index eb190cf8c8..cad2261922 100644 --- a/arch/arm/dts/imx6ul-u-boot.dtsi +++ b/arch/arm/dts/imx6ul-u-boot.dtsi @@ -5,26 +5,26 @@ / { soc { - u-boot,dm-spl; + bootph-pre-ram; }; }; &aips1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; &aips2 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi b/arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi index d283e815e6..a6c2cc8c1a 100644 --- a/arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi +++ b/arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi @@ -4,5 +4,5 @@ */ &pinctrl_uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx6ull-colibri-eval-v3-u-boot.dtsi b/arch/arm/dts/imx6ull-colibri-eval-v3-u-boot.dtsi index 0a732269ba..6823b42d45 100644 --- a/arch/arm/dts/imx6ull-colibri-eval-v3-u-boot.dtsi +++ b/arch/arm/dts/imx6ull-colibri-eval-v3-u-boot.dtsi @@ -5,18 +5,18 @@ / { aliases { - u-boot,dm-pre-reloc; + bootph-all; usb0 = &usbotg1; /* required for ums */ display0 = &lcdif; }; }; &pinctrl_uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_uart1_ctrl1 { - u-boot,dm-pre-reloc; + bootph-all; }; &lcdif { @@ -25,7 +25,7 @@ &pinctrl_lcdif_ctrl>; status = "okay"; display = <&display0>; - u-boot,dm-pre-reloc; + bootph-all; display0: display0 { bits-per-pixel = <18>; @@ -35,7 +35,7 @@ display-timings { native-mode = <&timing_vga>; timing_vga: 640x480 { - u-boot,dm-pre-reloc; + bootph-all; clock-frequency = <25175000>; hactive = <640>; vactive = <480>; diff --git a/arch/arm/dts/imx6ull-dart-6ul.dtsi b/arch/arm/dts/imx6ull-dart-6ul.dtsi index fab926f5b7..d2a74ddaf0 100644 --- a/arch/arm/dts/imx6ull-dart-6ul.dtsi +++ b/arch/arm/dts/imx6ull-dart-6ul.dtsi @@ -47,7 +47,7 @@ }; &gpio1 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpmi { @@ -94,10 +94,10 @@ scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; eeprom_som: eeprom@50 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "atmel,24c04"; reg = <0x50>; status = "okay"; @@ -197,7 +197,7 @@ }; pinctrl_i2c2: i2cgrp { - u-boot,dm-pre-reloc; + bootph-all; fsl,pins = < MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 @@ -205,7 +205,7 @@ }; pinctrl_i2c2_gpio: i2c2grp_gpio { - u-boot,dm-pre-reloc; + bootph-all; fsl,pins = < MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0 MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0 diff --git a/arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi b/arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi index cd15d9ba86..05004a74e0 100644 --- a/arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi +++ b/arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi @@ -5,20 +5,20 @@ */ &pinctrl_uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpmi { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &usdhc1 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &usdhc2 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; diff --git a/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi b/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi index 054e1aa94b..ab7dc3939c 100644 --- a/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi +++ b/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi @@ -5,20 +5,20 @@ */ &pinctrl_uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpmi { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &usdhc1 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &usdhc2 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; diff --git a/arch/arm/dts/imx6ull-u-boot.dtsi b/arch/arm/dts/imx6ull-u-boot.dtsi index 74ca95fa2c..0d7679634d 100644 --- a/arch/arm/dts/imx6ull-u-boot.dtsi +++ b/arch/arm/dts/imx6ull-u-boot.dtsi @@ -5,30 +5,30 @@ / { soc { - u-boot,dm-spl; + bootph-pre-ram; }; }; &aips1 { - u-boot,dm-spl; + bootph-pre-ram; }; &aips2 { - u-boot,dm-spl; + bootph-pre-ram; }; &aips3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx6ulz-14x14-evk-u-boot.dtsi b/arch/arm/dts/imx6ulz-14x14-evk-u-boot.dtsi index d283e815e6..a6c2cc8c1a 100644 --- a/arch/arm/dts/imx6ulz-14x14-evk-u-boot.dtsi +++ b/arch/arm/dts/imx6ulz-14x14-evk-u-boot.dtsi @@ -4,5 +4,5 @@ */ &pinctrl_uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi b/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi index 75dbf6ed78..7730bb60dd 100644 --- a/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi +++ b/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi @@ -6,30 +6,30 @@ */ &{/soc} { - u-boot,dm-pre-reloc; + bootph-all; }; &aips2 { - u-boot,dm-pre-reloc; + bootph-all; }; &iomuxc { - u-boot,dm-pre-reloc; + bootph-all; }; &iomuxc_snvs { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpmi { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; diff --git a/arch/arm/dts/imx7-cm-u-boot.dtsi b/arch/arm/dts/imx7-cm-u-boot.dtsi index c6970c51ba..676e119899 100644 --- a/arch/arm/dts/imx7-cm-u-boot.dtsi +++ b/arch/arm/dts/imx7-cm-u-boot.dtsi @@ -5,13 +5,13 @@ }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx7d-colibri-eval-v3-u-boot.dtsi b/arch/arm/dts/imx7d-colibri-eval-v3-u-boot.dtsi index 1bf3f4a4aa..52aa875870 100644 --- a/arch/arm/dts/imx7d-colibri-eval-v3-u-boot.dtsi +++ b/arch/arm/dts/imx7d-colibri-eval-v3-u-boot.dtsi @@ -15,7 +15,7 @@ pinctrl-0 = <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>; display = <&display0>; - u-boot,dm-pre-reloc; + bootph-all; display0: display0 { bits-per-pixel = <18>; diff --git a/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi b/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi index 7307fbaf68..67b41ae112 100644 --- a/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi +++ b/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi @@ -15,7 +15,7 @@ pinctrl-0 = <&pinctrl_lcdif>; status = "okay"; display = <&display0>; - u-boot,dm-pre-reloc; + bootph-all; display0: display { bits-per-pixel = <16>; diff --git a/arch/arm/dts/imx7s-warp-u-boot.dtsi b/arch/arm/dts/imx7s-warp-u-boot.dtsi index bc4b5745fc..49b992dccc 100644 --- a/arch/arm/dts/imx7s-warp-u-boot.dtsi +++ b/arch/arm/dts/imx7s-warp-u-boot.dtsi @@ -10,17 +10,17 @@ }; &aips3 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &soc { - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx7ulp-com-u-boot.dtsi b/arch/arm/dts/imx7ulp-com-u-boot.dtsi index b766c5ef3f..f6d34e1b63 100644 --- a/arch/arm/dts/imx7ulp-com-u-boot.dtsi +++ b/arch/arm/dts/imx7ulp-com-u-boot.dtsi @@ -4,34 +4,34 @@ */ &iomuxc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &ahbbridge0 { - u-boot,dm-spl; + bootph-pre-ram; }; &ahbbridge1 { - u-boot,dm-spl; + bootph-pre-ram; }; &lpuart4 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbotg1 { extcon = <&usbphy1>; - u-boot,dm-spl; + bootph-pre-ram; }; &usbphy1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc0 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio_ptc { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx7ulp-uboot.dtsi b/arch/arm/dts/imx7ulp-uboot.dtsi index 712cec4921..60a3cecf52 100644 --- a/arch/arm/dts/imx7ulp-uboot.dtsi +++ b/arch/arm/dts/imx7ulp-uboot.dtsi @@ -7,37 +7,37 @@ */ &soc { - u-boot,dm-pre-reloc; + bootph-all; }; &ahbbridge0 { - u-boot,dm-pre-reloc; + bootph-all; }; &ahbbridge1 { - u-boot,dm-pre-reloc; + bootph-all; }; &iomuxc { - u-boot,dm-pre-reloc; + bootph-all; }; &iomuxc1 { - u-boot,dm-pre-reloc; + bootph-all; }; &lpuart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &lpuart5 { - u-boot,dm-pre-reloc; + bootph-all; }; &lpuart6 { - u-boot,dm-pre-reloc; + bootph-all; }; &lpuart7 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi index 00ac413f36..fd0061f00f 100644 --- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi @@ -9,12 +9,12 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &aips4 { - u-boot,dm-spl; + bootph-pre-ram; }; ®_usdhc2_vmmc { @@ -26,23 +26,23 @@ }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &pca6416_0 { @@ -54,31 +54,31 @@ }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; ®_usbotg1 { @@ -86,41 +86,41 @@ }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbmisc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbotg1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbphynop1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi b/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi index 5cbc70faaa..484e31824b 100644 --- a/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi @@ -15,17 +15,17 @@ wdt-reboot { compatible = "wdt-reboot"; - u-boot,dm-spl; + bootph-pre-ram; wdt = <&wdog1>; }; }; &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &binman_fip { @@ -50,73 +50,73 @@ }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart3 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi index a7044b6369..1878c4e13f 100644 --- a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi @@ -15,17 +15,17 @@ wdt-reboot { compatible = "wdt-reboot"; - u-boot,dm-spl; + bootph-pre-ram; wdt = <&wdog1>; }; }; &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &fec1 { @@ -33,77 +33,77 @@ }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; &uart3 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi b/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi index 184c30ab4a..144c42b210 100644 --- a/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi @@ -19,80 +19,80 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &buck4_reg { - u-boot,dm-spl; + bootph-pre-ram; }; &buck5_reg { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_hog_sbc { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pmic { - u-boot,dm-spl; + bootph-pre-ram; regulators { - u-boot,dm-spl; + bootph-pre-ram; }; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart3 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbotg1 { @@ -100,17 +100,17 @@ }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; sd-uhs-sdr104; sd-uhs-ddr50; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index d82428f8fe..13688ec0d0 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -9,7 +9,7 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; firmware { @@ -21,7 +21,7 @@ }; &aips4 { - u-boot,dm-spl; + bootph-pre-ram; }; ®_usdhc2_vmmc { @@ -29,116 +29,116 @@ }; &pinctrl_reg_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &crypto { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr0 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbmisc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbphynop1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbotg1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; sd-uhs-sdr104; sd-uhs-ddr50; fsl,signal-voltage-switch-extra-delay-ms = <8>; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; &fec1 { @@ -146,5 +146,5 @@ }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi b/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi index 8b67bcff7d..a009880bdf 100644 --- a/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi @@ -7,25 +7,25 @@ #include "imx8mm-icore-mx8mm-u-boot.dtsi" &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc1_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi b/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi index 8b67bcff7d..a009880bdf 100644 --- a/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi @@ -7,25 +7,25 @@ #include "imx8mm-icore-mx8mm-u-boot.dtsi" &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc1_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-icore-mx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-icore-mx8mm-u-boot.dtsi index e7d179d632..bc4e434cc7 100644 --- a/arch/arm/dts/imx8mm-icore-mx8mm-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-icore-mx8mm-u-boot.dtsi @@ -7,21 +7,21 @@ #include "imx8mm-u-boot.dtsi" &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3_100mhz { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3_200mhz { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi b/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi index 5b8b472159..65dfd33725 100644 --- a/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi @@ -14,7 +14,7 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; firmware { @@ -26,24 +26,24 @@ }; &crypto { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr0 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr2 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &i2c2 { @@ -62,87 +62,87 @@ }; &pinctrl_ecspi1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart3 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &pinctrl_usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc1_100mhz { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc1_200mhz { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pca9450 { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &ecspi1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart3 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi b/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi index 7f5f8c384e..a16ce54926 100644 --- a/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi @@ -18,7 +18,7 @@ }; &aips4 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c4 { @@ -26,17 +26,17 @@ }; ®_usb_otg1_vbus { - u-boot,dm-spl; + bootph-pre-ram; }; &usbmisc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbphynop1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbotg1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-phg-u-boot.dtsi b/arch/arm/dts/imx8mm-phg-u-boot.dtsi index 3bf45ef4a6..3ced97cfaa 100644 --- a/arch/arm/dts/imx8mm-phg-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-phg-u-boot.dtsi @@ -9,7 +9,7 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; firmware { @@ -21,7 +21,7 @@ }; &aips4 { - u-boot,dm-spl; + bootph-pre-ram; }; ®_usdhc2_vmmc { @@ -29,67 +29,67 @@ }; &pinctrl_reg_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbmisc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbphynop1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbotg1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; sd-uhs-sdr104; sd-uhs-ddr50; assigned-clocks = <&clk IMX8MM_CLK_USDHC2>; @@ -98,7 +98,7 @@ }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; /* @@ -113,25 +113,25 @@ }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@25} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi index 25dc8e12dd..7fd5a05fad 100644 --- a/arch/arm/dts/imx8mm-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-u-boot.dtsi @@ -10,21 +10,21 @@ }; &soc { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; }; &aips1 { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; }; &aips2 { - u-boot,dm-spl; + bootph-pre-ram; }; &aips3 { - u-boot,dm-spl; + bootph-pre-ram; }; &binman { @@ -189,28 +189,28 @@ }; &clk { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-parents; /delete-property/ assigned-clock-rates; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; &osc_24m { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; }; &spba1 { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; }; &spba2 { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi index e877580c9a..6ab21fd938 100644 --- a/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi @@ -12,13 +12,13 @@ }; &pinctrl_fec1 { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@69} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@69/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi index dc99e7b9ac..e68030e7b2 100644 --- a/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi @@ -181,17 +181,17 @@ }; &pinctrl_fec1 { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi index d58a7d14b6..91b33a9e24 100644 --- a/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi @@ -176,17 +176,17 @@ }; &pinctrl_fec1 { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi index ff9b12a834..9590d0924b 100644 --- a/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi @@ -109,17 +109,17 @@ }; &pinctrl_fec1 { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-venice-gw7904-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7904-u-boot.dtsi index aa1153fbf8..4171c6be00 100644 --- a/arch/arm/dts/imx8mm-venice-gw7904-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw7904-u-boot.dtsi @@ -30,17 +30,17 @@ }; &pinctrl_fec1 { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-venice-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-u-boot.dtsi index 6f786b9467..8337c4aea8 100644 --- a/arch/arm/dts/imx8mm-venice-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-u-boot.dtsi @@ -9,74 +9,74 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &gsc { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi index 809c39c2b9..494229e4e6 100644 --- a/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi @@ -15,7 +15,7 @@ wdt-reboot { compatible = "wdt-reboot"; - u-boot,dm-spl; + bootph-pre-ram; wdt = <&wdog1>; }; }; @@ -27,11 +27,11 @@ }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@25} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &binman_uboot { @@ -39,27 +39,27 @@ }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; eeprom_module: eeprom@50 { compatible = "i2c-eeprom"; @@ -89,45 +89,45 @@ }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; &uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi index 3180d57239..4be0098b2c 100644 --- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi @@ -6,23 +6,23 @@ #include "imx8mn-u-boot.dtsi" &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pca6416_0 { @@ -34,27 +34,27 @@ }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; ®_usdhc2_vmmc { @@ -62,27 +62,27 @@ }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; sd-uhs-sdr104; sd-uhs-ddr50; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; sd-uhs-sdr104; sd-uhs-ddr50; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi index 3967e0bd15..19b0d89775 100644 --- a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi +++ b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi @@ -7,49 +7,49 @@ #include "imx8mn-u-boot.dtsi" &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart4 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; &uart4 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot.dtsi b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot.dtsi index bd4da7d34c..fb86657f0f 100644 --- a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot.dtsi @@ -7,9 +7,9 @@ #include "imx8mn-bsh-smm-s2-u-boot-common.dtsi" &pinctrl_gpmi_nand { - u-boot,dm-spl; + bootph-pre-ram; }; &gpmi { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2pro-u-boot.dtsi b/arch/arm/dts/imx8mn-bsh-smm-s2pro-u-boot.dtsi index b8396a46b8..f6f8313c56 100644 --- a/arch/arm/dts/imx8mn-bsh-smm-s2pro-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-bsh-smm-s2pro-u-boot.dtsi @@ -7,9 +7,9 @@ #include "imx8mn-bsh-smm-s2-u-boot-common.dtsi" &pinctrl_usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 54f3ebe88b..315714f398 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -6,7 +6,7 @@ #include "imx8mn-u-boot.dtsi" &pinctrl_reg_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; ®_usdhc2_vmmc { @@ -14,77 +14,77 @@ }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &crypto { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr0 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; sd-uhs-sdr104; sd-uhs-ddr50; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; }; diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-evk-u-boot.dtsi index 6c6c949f43..056ab31045 100644 --- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi @@ -6,21 +6,21 @@ #include "imx8mn-ddr4-evk-u-boot.dtsi" &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@25} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi index 98659bb528..cef20dab46 100644 --- a/arch/arm/dts/imx8mn-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-u-boot.dtsi @@ -18,55 +18,55 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &{/soc@0} { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; }; &aips1 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &aips2 { - u-boot,dm-spl; + bootph-pre-ram; }; &aips3 { - u-boot,dm-spl; + bootph-pre-ram; }; &aips4 { - u-boot,dm-spl; + bootph-pre-ram; }; &clk { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-parents; /delete-property/ assigned-clock-rates; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; &osc_24m { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &spba1 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; &binman { diff --git a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi index a20683155c..af80aaea0b 100644 --- a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi @@ -6,65 +6,65 @@ #include "imx8mn-u-boot.dtsi" &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_reg_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart4 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; &uart4 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi index 10656ce903..53a5ac0717 100644 --- a/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi @@ -134,17 +134,17 @@ }; &pinctrl_fec1 { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-u-boot.dtsi index 4af6b8b4ed..4109d26874 100644 --- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi @@ -6,65 +6,65 @@ #include "imx8mn-u-boot.dtsi" &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &gsc { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi index ae838caebc..b69e714794 100644 --- a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi @@ -21,16 +21,16 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &buck4 { - u-boot,dm-spl; + bootph-pre-ram; }; &buck5 { - u-boot,dm-spl; + bootph-pre-ram; }; &eqos { @@ -40,87 +40,87 @@ }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c3_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_100mhz { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_200mhz { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3_100mhz { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3_100mhz { - u-boot,dm-spl; + bootph-pre-ram; }; &pmic { - u-boot,dm-spl; + bootph-pre-ram; regulators { - u-boot,dm-spl; + bootph-pre-ram; }; }; ®_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; /* SDIO WiFi */ @@ -129,13 +129,13 @@ }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index f43eb6238d..0d489a781d 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -9,7 +9,7 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; firmware { optee { @@ -24,111 +24,111 @@ }; ®_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &crypto { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr0 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr2 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c3 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c4 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c5 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c6 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; sd-uhs-sdr104; sd-uhs-ddr50; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; &eqos { diff --git a/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi b/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi index 342c523b0c..9918f81534 100644 --- a/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-icore-mx8mp-edimm2.2-u-boot.dtsi @@ -10,7 +10,7 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; firmware { @@ -26,108 +26,108 @@ }; ®_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &crypto { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr0 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr2 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c3 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c4 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c5 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c6 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; sd-uhs-sdr104; sd-uhs-ddr50; no-1-8-v; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; &eqos { diff --git a/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi b/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi index cf591adf5a..c398a743f7 100644 --- a/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi @@ -12,54 +12,54 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; ®_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c3 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c4 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c5 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c6 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c6 { - u-boot,dm-spl; + bootph-pre-ram; }; &pmic { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi index dbc48dfb48..1c7b250549 100644 --- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi @@ -10,74 +10,74 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; ®_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_pins { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi index 32d9fbc886..f3fb44046d 100644 --- a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi @@ -10,7 +10,7 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; firmware { @@ -22,110 +22,110 @@ }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; ®_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart3 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c3 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pca9450@25} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pca9450@25/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; assigned-clocks = <&clk IMX8MP_CLK_USDHC1>; assigned-clock-rates = <400000000>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; sd-uhs-sdr104; sd-uhs-ddr50; assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; @@ -134,7 +134,7 @@ }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi index 07538da621..18d1728e1d 100644 --- a/arch/arm/dts/imx8mp-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-u-boot.dtsi @@ -11,43 +11,43 @@ }; &soc { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; }; &clk { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-parents; /delete-property/ assigned-clock-rates; }; &osc_32k { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &osc_24m { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &aips1 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &aips2 { - u-boot,dm-spl; + bootph-pre-ram; }; &aips3 { - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; &binman { diff --git a/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi index d872112452..3e1d36a4b0 100644 --- a/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi @@ -15,7 +15,7 @@ wdt-reboot { compatible = "wdt-reboot"; - u-boot,dm-spl; + bootph-pre-ram; wdt = <&wdog1>; }; }; @@ -39,7 +39,7 @@ }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; dio0_hog { gpio-hog; @@ -57,7 +57,7 @@ }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; pcie1_wdis_hog { gpio-hog; @@ -82,7 +82,7 @@ }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; m2_dis2_hog { gpio-hog; @@ -107,7 +107,7 @@ }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; m2_dis1_hog { gpio-hog; @@ -125,7 +125,7 @@ }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; rs485_half { gpio-hog; @@ -143,23 +143,23 @@ }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; &switch { @@ -227,7 +227,7 @@ assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; sd-uhs-ddr50; sd-uhs-sdr104; - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { @@ -236,9 +236,9 @@ assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mp-venice-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-u-boot.dtsi index f9068ebfbe..99d76393d3 100644 --- a/arch/arm/dts/imx8mp-venice-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-venice-u-boot.dtsi @@ -9,74 +9,74 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &gsc { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi index 8a4cdc717d..271d511518 100644 --- a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi @@ -15,7 +15,7 @@ wdt-reboot { compatible = "wdt-reboot"; - u-boot,dm-spl; + bootph-pre-ram; wdt = <&wdog1>; }; }; @@ -27,8 +27,8 @@ }; &clk { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-parents; /delete-property/ assigned-clock-rates; @@ -36,7 +36,7 @@ }; &crypto { - u-boot,dm-spl; + bootph-pre-ram; }; &eqos { @@ -46,11 +46,11 @@ }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; regulator-ethphy { gpio-hog; @@ -63,19 +63,19 @@ }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; eeprom_module: eeprom@50 { compatible = "i2c-eeprom"; @@ -85,11 +85,11 @@ }; &i2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c3 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c4 { @@ -109,56 +109,56 @@ }; &pca9450 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_pwr_en { - u-boot,dm-spl; + bootph-pre-ram; u-boot,off-on-delay-us = <20000>; }; &pinctrl_uart3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_cd { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; ®_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr0 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr2 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart3 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { @@ -171,7 +171,7 @@ assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; sd-uhs-ddr50; sd-uhs-sdr104; - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { @@ -180,9 +180,9 @@ assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mq-cm-u-boot.dtsi b/arch/arm/dts/imx8mq-cm-u-boot.dtsi index 354f911a8a..e23998f5ab 100644 --- a/arch/arm/dts/imx8mq-cm-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-cm-u-boot.dtsi @@ -10,11 +10,11 @@ }; &pinctrl_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &binman { diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi b/arch/arm/dts/imx8mq-evk-u-boot.dtsi index 67da69a2eb..d987f68b6b 100644 --- a/arch/arm/dts/imx8mq-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi @@ -3,7 +3,7 @@ #include "imx8mq-u-boot.dtsi" &pinctrl_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { @@ -16,5 +16,5 @@ }; &uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi b/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi index 9d0a54a32f..e3341a46d6 100644 --- a/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi @@ -3,11 +3,11 @@ #include "imx8mq-u-boot.dtsi" &pinctrl_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart1 { /* console */ - u-boot,dm-spl; + bootph-pre-ram; }; &binman { diff --git a/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi index 8d6f305829..05f809c035 100644 --- a/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi @@ -7,9 +7,9 @@ }; &uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mq-pico-pi-u-boot.dtsi b/arch/arm/dts/imx8mq-pico-pi-u-boot.dtsi index 7efd82214d..eee332073c 100644 --- a/arch/arm/dts/imx8mq-pico-pi-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-pico-pi-u-boot.dtsi @@ -3,9 +3,9 @@ #include "imx8mq-u-boot.dtsi" &pinctrl_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi index 2bc9f413da..b3fef862b4 100644 --- a/arch/arm/dts/imx8mq-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-u-boot.dtsi @@ -11,27 +11,27 @@ }; &soc { - u-boot,dm-spl; + bootph-pre-ram; }; &aips1 { - u-boot,dm-spl; + bootph-pre-ram; }; &aips2 { - u-boot,dm-spl; + bootph-pre-ram; }; &aips3 { - u-boot,dm-spl; + bootph-pre-ram; }; &aips4 { - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; &binman { diff --git a/arch/arm/dts/imx8qxp-capricorn-u-boot.dtsi b/arch/arm/dts/imx8qxp-capricorn-u-boot.dtsi index f3e6421b2b..cba56188f8 100644 --- a/arch/arm/dts/imx8qxp-capricorn-u-boot.dtsi +++ b/arch/arm/dts/imx8qxp-capricorn-u-boot.dtsi @@ -7,129 +7,129 @@ &{/imx8qx-pm} { - u-boot,dm-spl; + bootph-pre-ram; }; &mu { - u-boot,dm-spl; + bootph-pre-ram; }; &clk { - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio6 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_lsio_gpio7 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_dma { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_dma_lpuart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_dma_lpuart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn_sdch0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn_sdch1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pd_conn_sdch2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio6 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio7 { - u-boot,dm-spl; + bootph-pre-ram; }; &lpuart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &lpuart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8ulp-evk-u-boot.dtsi b/arch/arm/dts/imx8ulp-evk-u-boot.dtsi index 7acdb4a98a..608bde3a2a 100644 --- a/arch/arm/dts/imx8ulp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8ulp-evk-u-boot.dtsi @@ -8,39 +8,39 @@ compatible = "fsl,imx8ulp-mu"; reg = <0 0x27020000 0 0x10000>; status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; }; }; &soc { - u-boot,dm-spl; + bootph-pre-ram; }; &per_bridge3 { - u-boot,dm-spl; + bootph-pre-ram; }; &per_bridge4 { - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc1 { - u-boot,dm-spl; + bootph-pre-ram; fsl,mux_mask = <0xf00>; }; &pinctrl_lpuart5 { - u-boot,dm-spl; + bootph-pre-ram; }; &lpuart5 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc0 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi index 6f02b38989..89e64344c6 100644 --- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi +++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi @@ -7,7 +7,7 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog3>; - u-boot,dm-spl; + bootph-pre-ram; }; aliases { @@ -38,91 +38,91 @@ }; &{/soc@0} { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; }; &aips1 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &aips2 { - u-boot,dm-spl; + bootph-pre-ram; }; &aips3 { - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; }; ®_usdhc2_vmmc { u-boot,off-on-delay-us = <20000>; - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_reg_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &lpuart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; fsl,signal-voltage-switch-extra-delay-ms = <8>; }; &lpi2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@44000000/i2c@44350000/pmic@25} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@44000000/i2c@44350000/pmic@25/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_lpi2c2 { - u-boot,dm-spl; + bootph-pre-ram; }; &fec { @@ -152,6 +152,6 @@ }; &s4muap { - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; }; diff --git a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi index 7cab486f5f..46928c07e9 100644 --- a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi +++ b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi @@ -6,82 +6,82 @@ / { chosen { - u-boot,dm-spl; + bootph-pre-ram; }; clocks { - u-boot,dm-spl; + bootph-pre-ram; }; soc { - u-boot,dm-spl; + bootph-pre-ram; }; }; &osc { - u-boot,dm-spl; + bootph-pre-ram; }; &anatop { - u-boot,dm-spl; + bootph-pre-ram; }; &clks { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpt1 { - u-boot,dm-spl; + bootph-pre-ram; }; &lpuart1 { /* console */ - u-boot,dm-spl; + bootph-pre-ram; }; &semc { - u-boot,dm-spl; + bootph-pre-ram; bank1: bank@0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; imxrt1020-evk { - u-boot,dm-spl; + bootph-pre-ram; pinctrl_semc: semcgrp { - u-boot,dm-spl; + bootph-pre-ram; }; pinctrl_usdhc0: usdhc0grp { - u-boot,dm-spl; + bootph-pre-ram; }; }; }; &pinctrl_lpuart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi index e217dfd9eb..a9095e736b 100644 --- a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi +++ b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi @@ -14,16 +14,16 @@ }; chosen { - u-boot,dm-spl; + bootph-pre-ram; tick-timer = &gpt; }; clocks { - u-boot,dm-spl; + bootph-pre-ram; }; soc { - u-boot,dm-spl; + bootph-pre-ram; usbphy1: usbphy@400d9000 { compatible = "fsl,imxrt-usbphy"; @@ -75,7 +75,7 @@ }; &semc { - u-boot,dm-spl; + bootph-pre-ram; /* * Memory configuration from sdram datasheet IS42S16160J-6BLI */ @@ -109,62 +109,62 @@ bank1: bank@0 { fsl,base-address = <0x80000000>; fsl,memory-size = <MEM_SIZE_32M>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &osc { - u-boot,dm-spl; + bootph-pre-ram; }; &anatop { - u-boot,dm-spl; + bootph-pre-ram; }; &clks { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; - u-boot,dm-spl; + bootph-pre-ram; }; &gpt { clocks = <&osc>; compatible = "fsl,imxrt-gpt"; status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; }; &lpuart1 { /* console */ compatible = "fsl,imxrt-lpuart"; clock-names = "per"; - u-boot,dm-spl; + bootph-pre-ram; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; compatible = "fsl,imxrt-iomuxc"; pinctrl-0 = <&pinctrl_lpuart1>; @@ -251,7 +251,7 @@ MXRT1050_IOMUXC_GPIO_EMC_39_SEMC_DQS (IMX_PAD_SION | 0xf1) /* SEMC_DQS */ >; - u-boot,dm-spl; + bootph-pre-ram; }; pinctrl_lcdif: lcdifgrp { @@ -281,17 +281,17 @@ }; pinctrl_lpuart1: lpuart1grp { - u-boot,dm-spl; + bootph-pre-ram; }; pinctrl_usdhc0: usdhc0grp { - u-boot,dm-spl; + bootph-pre-ram; }; }; &usdhc1 { compatible = "fsl,imxrt-usdhc"; - u-boot,dm-spl; + bootph-pre-ram; }; &lcdif { diff --git a/arch/arm/dts/imxrt1170-evk-u-boot.dtsi b/arch/arm/dts/imxrt1170-evk-u-boot.dtsi index 88ff986ba0..f923a14301 100644 --- a/arch/arm/dts/imxrt1170-evk-u-boot.dtsi +++ b/arch/arm/dts/imxrt1170-evk-u-boot.dtsi @@ -7,88 +7,88 @@ / { chosen { - u-boot,dm-spl; + bootph-pre-ram; }; clocks { - u-boot,dm-spl; + bootph-pre-ram; }; soc { - u-boot,dm-spl; + bootph-pre-ram; }; }; &osc { - u-boot,dm-spl; + bootph-pre-ram; }; &rcosc16M { - u-boot,dm-spl; + bootph-pre-ram; }; &osc32k { - u-boot,dm-spl; + bootph-pre-ram; }; &clks { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpt1 { - u-boot,dm-spl; + bootph-pre-ram; }; &lpuart1 { /* console */ - u-boot,dm-spl; + bootph-pre-ram; }; &semc { - u-boot,dm-spl; + bootph-pre-ram; bank1: bank@0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &iomuxc { - u-boot,dm-spl; + bootph-pre-ram; imxrt1170-evk { - u-boot,dm-spl; + bootph-pre-ram; pinctrl_lpuart1: lpuart1grp { - u-boot,dm-spl; + bootph-pre-ram; }; pinctrl_usdhc0: usdhc0grp { - u-boot,dm-spl; + bootph-pre-ram; }; pinctrl_semc: semcgrp { - u-boot,dm-spl; + bootph-pre-ram; }; }; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts index d39b334ed0..dad46704a2 100644 --- a/arch/arm/dts/k3-am625-r5-sk.dts +++ b/arch/arm/dts/k3-am625-r5-sk.dts @@ -28,7 +28,7 @@ /* 2G RAM */ reg = <0x00000000 0x80000000 0x00000000 0x80000000>; - u-boot,dm-spl; + bootph-pre-ram; }; reserved-memory { @@ -56,7 +56,7 @@ ti,sci = <&dmsc>; ti,sci-proc-id = <32>; ti,sci-host-id = <10>; - u-boot,dm-spl; + bootph-pre-ram; }; dm_tifs: dm-tifs { @@ -66,7 +66,7 @@ mbox-names = "rx", "tx"; mboxes= <&secure_proxy_main 22>, <&secure_proxy_main 23>; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -84,13 +84,13 @@ compatible = "ti,j721e-esm"; reg = <0x0 0x4100000 0x0 0x1000>; ti,esm-pins = <0>, <1>, <2>, <85>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_main { sa3_secproxy: secproxy@44880000 { - u-boot,dm-spl; + bootph-pre-ram; compatible = "ti,am654-secure-proxy"; #mbox-cells = <1>; reg-names = "rt", "scfg", "target_data"; @@ -103,19 +103,19 @@ compatible = "ti,am654-system-controller"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>; mbox-names = "tx", "rx", "boot_notify"; - u-boot,dm-spl; + bootph-pre-ram; }; main_esm: esm@420000 { compatible = "ti,j721e-esm"; reg = <0x0 0x420000 0x0 0x1000>; ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &mcu_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; wkup_uart0_pins_default: wkup-uart0-pins-default { pinctrl-single,pins = < AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */ @@ -123,12 +123,12 @@ AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */ AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */ >; - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; main_uart1_pins_default: main-uart1-pins-default { pinctrl-single,pins = < AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */ @@ -136,7 +136,7 @@ AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */ AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */ >; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -145,7 +145,7 @@ pinctrl-names = "default"; pinctrl-0 = <&wkup_uart0_pins_default>; status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; }; /* Main UART1 is used for TIFS firmware logs */ @@ -153,7 +153,7 @@ pinctrl-names = "default"; pinctrl-0 = <&main_uart1_pins_default>; status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; }; &ospi0 { diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi index f275e3b46c..249155733a 100644 --- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi @@ -15,113 +15,113 @@ }; memory@80000000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_main{ - u-boot,dm-spl; + bootph-pre-ram; timer1: timer@2400000 { compatible = "ti,omap5430-timer"; reg = <0x00 0x2400000 0x00 0x80>; ti,timer-alwon; clock-frequency = <25000000>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &dmss { - u-boot,dm-spl; + bootph-pre-ram; }; &secure_proxy_main { - u-boot,dm-spl; + bootph-pre-ram; }; &dmsc { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_pds { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_clks { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_reset { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_conf { - u-boot,dm-spl; + bootph-pre-ram; }; &chipid { - u-boot,dm-spl; + bootph-pre-ram; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_uart0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &main_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &cbass_mcu { - u-boot,dm-spl; + bootph-pre-ram; }; &cbass_wakeup { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdhci1 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_mmc1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &fss { - u-boot,dm-spl; + bootph-pre-ram; }; &ospi0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &ospi0 { - u-boot,dm-spl; + bootph-pre-ram; flash@0 { - u-boot,dm-spl; + bootph-pre-ram; partitions { - u-boot,dm-spl; + bootph-pre-ram; partition@3fc0000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; }; @@ -132,17 +132,17 @@ <0x0 0x43000200 0x0 0x8>; reg-names = "cpsw_nuss", "mac_efuse"; /delete-property/ ranges; - u-boot,dm-spl; + bootph-pre-ram; cpsw-phy-sel@04044 { compatible = "ti,am64-phy-gmii-sel"; reg = <0x0 0x00104044 0x0 0x8>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &cpsw_port1 { - u-boot,dm-spl; + bootph-pre-ram; }; &cpsw_port2 { diff --git a/arch/arm/dts/k3-am62a-ddr.dtsi b/arch/arm/dts/k3-am62a-ddr.dtsi index 15a0799550..8629ea45b8 100644 --- a/arch/arm/dts/k3-am62a-ddr.dtsi +++ b/arch/arm/dts/k3-am62a-ddr.dtsi @@ -17,7 +17,7 @@ <&k3_pds 55 TI_SCI_PD_SHARED>; clocks = <&k3_clks 170 1>, <&k3_clks 16 4>; - u-boot,dm-spl; + bootph-pre-ram; ti,ctl-data = < DDRSS_CTL_0_DATA diff --git a/arch/arm/dts/k3-am62a7-r5-sk.dts b/arch/arm/dts/k3-am62a7-r5-sk.dts index 58b7c8ad05..7a15b44c5f 100644 --- a/arch/arm/dts/k3-am62a7-r5-sk.dts +++ b/arch/arm/dts/k3-am62a7-r5-sk.dts @@ -26,7 +26,7 @@ memory@80000000 { device_type = "memory"; reg = <0x00000000 0x80000000 0x00000000 0x80000000>; /* 2G RAM */ - u-boot,dm-spl; + bootph-pre-ram; }; reserved-memory { @@ -54,7 +54,7 @@ ti,sci = <&dmsc>; ti,sci-proc-id = <32>; ti,sci-host-id = <10>; - u-boot,dm-spl; + bootph-pre-ram; }; dm_tifs: dm-tifs { @@ -64,7 +64,7 @@ mbox-names = "rx", "tx"; mboxes= <&secure_proxy_main 22>, <&secure_proxy_main 23>; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -85,7 +85,7 @@ <0x0 0x44860000 0x0 0x20000>, <0x0 0x43600000 0x0 0x10000>; reg-names = "rt", "scfg", "target_data"; - u-boot,dm-spl; + bootph-pre-ram; }; sysctrler: sysctrler { @@ -94,13 +94,13 @@ <&secure_proxy_main 0>, <&sa3_secproxy 0>; mbox-names = "tx", "rx", "boot_notify"; - u-boot,dm-spl; + bootph-pre-ram; }; }; &mcu_pmx0 { status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; wkup_uart0_pins_default: wkup-uart0-pins-default { pinctrl-single,pins = < @@ -109,12 +109,12 @@ AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */ AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */ >; - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; main_uart1_pins_default: main-uart1-pins-default { pinctrl-single,pins = < AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */ @@ -122,7 +122,7 @@ AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */ AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */ >; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -131,7 +131,7 @@ pinctrl-names = "default"; pinctrl-0 = <&wkup_uart0_pins_default>; status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; }; /* Main UART1 is used for TIFS firmware logs */ @@ -139,5 +139,5 @@ pinctrl-names = "default"; pinctrl-0 = <&main_uart1_pins_default>; status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi index 7fc749ed70..cf938c43b8 100644 --- a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi @@ -11,130 +11,130 @@ }; memory@80000000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_main{ - u-boot,dm-spl; + bootph-pre-ram; timer1: timer@2400000 { compatible = "ti,omap5430-timer"; reg = <0x00 0x2400000 0x00 0x80>; ti,timer-alwon; clock-frequency = <25000000>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &dmss { - u-boot,dm-spl; + bootph-pre-ram; }; &secure_proxy_main { - u-boot,dm-spl; + bootph-pre-ram; }; &dmsc { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_pds { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_clks { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_reset { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_conf { - u-boot,dm-spl; + bootph-pre-ram; }; &chipid { - u-boot,dm-spl; + bootph-pre-ram; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_uart0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &main_uart1 { - u-boot,dm-spl; + bootph-pre-ram; }; &cbass_mcu { - u-boot,dm-spl; + bootph-pre-ram; }; &cbass_wakeup { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_i2c0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &main_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_i2c1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &exp1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdhci1 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_mmc1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_reset { - u-boot,dm-spl; + bootph-pre-ram; }; &dmsc { - u-boot,dm-spl; + bootph-pre-ram; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; - u-boot,dm-spl; + bootph-pre-ram; }; }; &vdd_mmc1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/k3-am64-ddr.dtsi b/arch/arm/dts/k3-am64-ddr.dtsi index d651093521..bd95a7866d 100644 --- a/arch/arm/dts/k3-am64-ddr.dtsi +++ b/arch/arm/dts/k3-am64-ddr.dtsi @@ -17,7 +17,7 @@ ti,ddr-freq2 = <DDRSS_PLL_FREQUENCY_2>; ti,ddr-fhs-cnt = <DDRSS_PLL_FHS_CNT>; - u-boot,dm-spl; + bootph-pre-ram; ti,ctl-data = < DDRSS_CTL_0_DATA diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi index 9b6c7e85cb..64857b0909 100644 --- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi @@ -10,32 +10,32 @@ }; memory@80000000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_main{ - u-boot,dm-spl; + bootph-pre-ram; timer1: timer@2400000 { compatible = "ti,omap5430-timer"; reg = <0x0 0x2400000 0x0 0x80>; ti,timer-alwon; clock-frequency = <200000000>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_conf { - u-boot,dm-spl; + bootph-pre-ram; chipid@14 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; main_i2c0_pins_default: main-i2c0-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ @@ -45,67 +45,67 @@ &main_i2c0 { status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; }; &main_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb0 { dr_mode="peripheral"; - u-boot,dm-spl; + bootph-pre-ram; }; &usbss0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_mmc1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &main_usb0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &dmss { - u-boot,dm-spl; + bootph-pre-ram; }; &secure_proxy_main { - u-boot,dm-spl; + bootph-pre-ram; }; &dmsc { - u-boot,dm-spl; + bootph-pre-ram; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; - u-boot,dm-spl; + bootph-pre-ram; }; }; &k3_pds { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_clks { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_reset { - u-boot,dm-spl; + bootph-pre-ram; }; &sdhci0 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdhci1 { - u-boot,dm-spl; + bootph-pre-ram; }; &cpsw3g { diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts index 7493362ac6..ca5ce4a35a 100644 --- a/arch/arm/dts/k3-am642-r5-evm.dts +++ b/arch/arm/dts/k3-am642-r5-evm.dts @@ -25,7 +25,7 @@ /* 2G RAM */ reg = <0x00000000 0x80000000 0x00000000 0x80000000>; - u-boot,dm-spl; + bootph-pre-ram; }; a53_0: a53@0 { @@ -41,7 +41,7 @@ ti,sci = <&dmsc>; ti,sci-proc-id = <32>; ti,sci-host-id = <10>; - u-boot,dm-spl; + bootph-pre-ram; }; reserved-memory { @@ -60,7 +60,7 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <200000000>; - u-boot,dm-spl; + bootph-pre-ram; }; vtt_supply: vtt-supply { @@ -70,7 +70,7 @@ regulator-max-microvolt = <3300000>; gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>; states = <0 0x0 3300000 0x1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -79,7 +79,7 @@ compatible = "ti,am654-system-controller"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>; mbox-names = "tx", "rx"; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -88,24 +88,24 @@ compatible = "ti,j721e-esm"; reg = <0x0 0x420000 0x0 0x1000>; ti,esm-pins = <160>, <161>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_mcu { - u-boot,dm-spl; + bootph-pre-ram; mcu_esm: esm@4100000 { compatible = "ti,j721e-esm"; reg = <0x0 0x4100000 0x0 0x1000>; ti,esm-pins = <0>, <1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; main_uart0_pins_default: main-uart0-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */ AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */ @@ -115,7 +115,7 @@ }; main_uart1_pins_default: main-uart1-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */ AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */ @@ -125,7 +125,7 @@ }; main_mmc0_pins_default: main-mmc0-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < AM64X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ AM64X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ @@ -142,7 +142,7 @@ }; main_mmc1_pins_default: main-mmc1-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */ @@ -156,7 +156,7 @@ }; ddr_vtt_pins_default: ddr-vtt-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */ >; @@ -229,7 +229,7 @@ }; &main_uart1 { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-names = "default"; pinctrl-0 = <&main_uart1_pins_default>; }; @@ -259,7 +259,7 @@ }; &main_gpio0 { - u-boot,dm-spl; + bootph-pre-ram; /delete-property/ power-domains; }; diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts index 97f44e220a..9ff4dd3dd3 100644 --- a/arch/arm/dts/k3-am642-r5-sk.dts +++ b/arch/arm/dts/k3-am642-r5-sk.dts @@ -27,7 +27,7 @@ device_type = "memory"; /* 2G RAM */ reg = <0x00000000 0x80000000 0x00000000 0x80000000>; - u-boot,dm-spl; + bootph-pre-ram; }; a53_0: a53@0 { @@ -43,7 +43,7 @@ ti,sci = <&dmsc>; ti,sci-proc-id = <32>; ti,sci-host-id = <10>; - u-boot,dm-spl; + bootph-pre-ram; }; reserved-memory { @@ -62,7 +62,7 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <200000000>; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -71,7 +71,7 @@ compatible = "ti,am654-system-controller"; mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>; mbox-names = "tx", "rx"; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -80,24 +80,24 @@ compatible = "ti,j721e-esm"; reg = <0x0 0x420000 0x0 0x1000>; ti,esm-pins = <160>, <161>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_mcu { - u-boot,dm-spl; + bootph-pre-ram; mcu_esm: esm@4100000 { compatible = "ti,j721e-esm"; reg = <0x0 0x4100000 0x0 0x1000>; ti,esm-pins = <0>, <1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; main_uart0_pins_default: main-uart0-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */ AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */ @@ -107,7 +107,7 @@ }; main_uart1_pins_default: main-uart1-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */ AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */ @@ -117,7 +117,7 @@ }; main_mmc1_pins_default: main-mmc1-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */ @@ -131,7 +131,7 @@ }; main_usb0_pins_default: main-usb0-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ >; @@ -198,7 +198,7 @@ }; &main_uart1 { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-names = "default"; pinctrl-0 = <&main_uart1_pins_default>; }; diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi index dda2c5d18a..69dbe943bd 100644 --- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi @@ -14,32 +14,32 @@ }; memory@80000000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_main{ - u-boot,dm-spl; + bootph-pre-ram; timer1: timer@2400000 { compatible = "ti,omap5430-timer"; reg = <0x0 0x2400000 0x0 0x80>; ti,timer-alwon; clock-frequency = <200000000>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_conf { - u-boot,dm-spl; + bootph-pre-ram; chipid@14 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; main_i2c0_pins_default: main-i2c0-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ @@ -48,7 +48,7 @@ }; &main_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; @@ -116,48 +116,48 @@ }; &main_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &dmss { - u-boot,dm-spl; + bootph-pre-ram; }; &secure_proxy_main { - u-boot,dm-spl; + bootph-pre-ram; }; &dmsc { - u-boot,dm-spl; + bootph-pre-ram; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; - u-boot,dm-spl; + bootph-pre-ram; }; }; &k3_pds { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_clks { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_reset { - u-boot,dm-spl; + bootph-pre-ram; }; &sdhci0 { status = "disabled"; - u-boot,dm-spl; + bootph-pre-ram; }; &sdhci1 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_mmc1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &cpsw3g { @@ -165,49 +165,49 @@ <0x0 0x43000200 0x0 0x8>; reg-names = "cpsw_nuss", "mac_efuse"; /delete-property/ ranges; - u-boot,dm-spl; + bootph-pre-ram; cpsw-phy-sel@04044 { compatible = "ti,am64-phy-gmii-sel"; reg = <0x0 0x43004044 0x0 0x8>; - u-boot,dm-spl; + bootph-pre-ram; }; ethernet-ports { - u-boot,dm-spl; + bootph-pre-ram; }; }; &cpsw_port2 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_bcdma { - u-boot,dm-spl; + bootph-pre-ram; }; &main_pktdma { - u-boot,dm-spl; + bootph-pre-ram; }; &rgmii1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &rgmii2_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &mdio1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &cpsw3g_phy1 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_usb0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &serdes_ln_ctrl { @@ -215,26 +215,26 @@ }; &usbss0 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb0 { dr_mode = "host"; - u-boot,dm-spl; + bootph-pre-ram; }; &serdes_wiz0 { - u-boot,dm-spl; + bootph-pre-ram; }; &serdes0_usb_link { - u-boot,dm-spl; + bootph-pre-ram; }; &serdes0 { - u-boot,dm-spl; + bootph-pre-ram; }; &serdes_refclk { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi b/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi index d80c5501d2..082a3c89d0 100644 --- a/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi +++ b/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi @@ -15,18 +15,18 @@ }; leds { - u-boot,dm-spl; + bootph-pre-ram; status-led-red { - u-boot,dm-spl; + bootph-pre-ram; }; status-led-green { - u-boot,dm-spl; + bootph-pre-ram; }; }; }; &cbass_mcu { - u-boot,dm-spl; + bootph-pre-ram; mcu_navss: bus@28380000 { ringacc@2b800000 { @@ -53,70 +53,70 @@ }; &cbass_wakeup { - u-boot,dm-spl; + bootph-pre-ram; }; &cbass_main { - u-boot,dm-spl; + bootph-pre-ram; main_navss: bus@30800000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &wkup_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; mcu-fss0-ospi0-pins-default { - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; main-uart1-pins-default { - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_uart1 { - u-boot,dm-spl; + bootph-pre-ram; current-speed = <115200>; }; &wkup_gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &ospi0 { - u-boot,dm-spl; + bootph-pre-ram; flash@0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &secure_proxy_main { - u-boot,dm-spl; + bootph-pre-ram; }; &dmsc { - u-boot,dm-spl; + bootph-pre-ram; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; - u-boot,dm-spl; + bootph-pre-ram; }; }; &k3_pds { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_clks { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_reset { - u-boot,dm-spl; + bootph-pre-ram; }; &fss { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/k3-am654-ddr.dtsi b/arch/arm/dts/k3-am654-ddr.dtsi index b22879695e..48698cdddc 100644 --- a/arch/arm/dts/k3-am654-ddr.dtsi +++ b/arch/arm/dts/k3-am654-ddr.dtsi @@ -15,7 +15,7 @@ <&k3_pds 244 TI_SCI_PD_SHARED>; assigned-clocks = <&k3_clks 20 1>; assigned-clock-rates = <DDR_PLL_FREQUENCY>; - u-boot,dm-spl; + bootph-pre-ram; ti,ss-reg = < DDRSS_V2H_CTL_REG diff --git a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi index 1d0659ea8f..4516ab1437 100644 --- a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi @@ -22,17 +22,17 @@ }; &cbass_main{ - u-boot,dm-spl; + bootph-pre-ram; main_navss: bus@30800000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_mcu { - u-boot,dm-spl; + bootph-pre-ram; mcu_navss: bus@28380000 { - u-boot,dm-spl; + bootph-pre-ram; ringacc@2b800000 { reg = <0x0 0x2b800000 0x0 0x400000>, @@ -41,7 +41,7 @@ <0x0 0x2a500000 0x0 0x40000>, <0x0 0x28440000 0x0 0x40000>; reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; - u-boot,dm-spl; + bootph-pre-ram; ti,dma-ring-reset-quirk; }; @@ -54,93 +54,93 @@ <0x0 0x28400000 0x0 0x2000>; reg-names = "gcfg", "rchan", "rchanrt", "tchan", "tchanrt", "rflow"; - u-boot,dm-spl; + bootph-pre-ram; }; }; }; &cbass_wakeup { - u-boot,dm-spl; + bootph-pre-ram; chipid@43000014 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &secure_proxy_main { - u-boot,dm-spl; + bootph-pre-ram; }; &dmsc { - u-boot,dm-spl; + bootph-pre-ram; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; - u-boot,dm-spl; + bootph-pre-ram; }; }; &k3_pds { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_clks { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_reset { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; wkup_i2c0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; usb0_pins_default: usb0_pins_default { pinctrl-single,pins = < AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ >; - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_uart0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &main_pmx1 { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_pmx0 { mcu-fss0-ospi0-pins-default { - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_mmc0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &main_mmc1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &sdhci0 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdhci1 { - u-boot,dm-spl; + bootph-pre-ram; }; &davinci_mdio { @@ -166,7 +166,7 @@ }; &wkup_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb1 { @@ -174,34 +174,34 @@ }; &fss { - u-boot,dm-spl; + bootph-pre-ram; }; &ospi0 { - u-boot,dm-spl; + bootph-pre-ram; flash@0{ - u-boot,dm-spl; + bootph-pre-ram; }; }; &dwc3_0 { status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; }; &usb0_phy { status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; }; &usb0 { pinctrl-names = "default"; pinctrl-0 = <&usb0_pins_default>; dr_mode = "peripheral"; - u-boot,dm-spl; + bootph-pre-ram; }; &scm_conf { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index 455698a936..7671875a55 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -41,7 +41,7 @@ ti,sci = <&dmsc>; ti,sci-proc-id = <32>; ti,sci-host-id = <10>; - u-boot,dm-spl; + bootph-pre-ram; }; vtt_supply: vtt_supply { @@ -51,7 +51,7 @@ regulator-max-microvolt = <3300000>; gpios = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>; states = <0 0x0 3300000 0x1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -61,7 +61,7 @@ reg = <0x0 0x40400000 0x0 0x80>; ti,timer-alwon; clock-frequency = <25000000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -73,12 +73,12 @@ <0x0 0x2a480000 0x0 0x80000>; reg-names = "rt", "scfg", "target_data"; #mbox-cells = <1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &wkup_gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &cbass_wakeup { @@ -86,14 +86,14 @@ compatible = "ti,am654-system-controller"; mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>; mbox-names = "tx", "rx"; - u-boot,dm-spl; + bootph-pre-ram; }; clk_200mhz: dummy_clock { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <200000000>; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -105,14 +105,14 @@ }; &wkup_uart0 { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-names = "default"; pinctrl-0 = <&wkup_uart0_pins_default>; status = "okay"; }; &mcu_uart0 { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-names = "default"; pinctrl-0 = <&mcu_uart0_pins_default>; clock-frequency = <48000000>; @@ -131,11 +131,11 @@ compatible = "ti,am654-vtm", "ti,am654-avs"; vdd-supply-3 = <&vdd_mpu>; vdd-supply-4 = <&vdd_mpu>; - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; wkup_uart0_pins_default: wkup_uart0_pins_default { pinctrl-single,pins = < AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0) /* (AB1) WKUP_UART0_RXD */ @@ -143,14 +143,14 @@ AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */ AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */ >; - u-boot,dm-spl; + bootph-pre-ram; }; wkup_vtt_pins_default: wkup_vtt_pins_default { pinctrl-single,pins = < AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /* WKUP_GPIO0_28 */ >; - u-boot,dm-spl; + bootph-pre-ram; }; mcu_uart0_pins_default: mcu_uart0_pins_default { @@ -160,7 +160,7 @@ AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */ AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */ >; - u-boot,dm-spl; + bootph-pre-ram; }; wkup_i2c0_pins_default: wkup-i2c0-pins-default { @@ -188,7 +188,7 @@ }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; main_uart0_pins_default: main-uart0-pins-default { pinctrl-single,pins = < AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ @@ -196,7 +196,7 @@ AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ >; - u-boot,dm-spl; + bootph-pre-ram; }; main_mmc0_pins_default: main_mmc0_pins_default { @@ -213,7 +213,7 @@ AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */ AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ >; - u-boot,dm-spl; + bootph-pre-ram; }; main_mmc1_pins_default: main_mmc1_pins_default { @@ -227,7 +227,7 @@ AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */ AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */ >; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -257,7 +257,7 @@ pinctrl-names = "default"; pinctrl-0 = <&wkup_i2c0_pins_default>; clock-frequency = <400000>; - u-boot,dm-spl; + bootph-pre-ram; vdd_mpu: tps62363@60 { compatible = "ti,tps62363"; @@ -269,7 +269,7 @@ regulator-boot-on; ti,vsel0-state-high; ti,vsel1-state-high; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -297,18 +297,18 @@ }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; usb0_pins_default: usb0_pins_default { pinctrl-single,pins = < AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ >; - u-boot,dm-spl; + bootph-pre-ram; }; }; &dwc3_0 { status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; /delete-property/ clocks; /delete-property/ power-domains; /delete-property/ assigned-clocks; @@ -317,7 +317,7 @@ &usb0_phy { status = "okay"; - u-boot,dm-spl; + bootph-pre-ram; /delete-property/ clocks; }; @@ -325,9 +325,9 @@ pinctrl-names = "default"; pinctrl-0 = <&usb0_pins_default>; dr_mode = "peripheral"; - u-boot,dm-spl; + bootph-pre-ram; }; &scm_conf { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi index 12faaae59b..ee31b1ebe7 100644 --- a/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi @@ -23,35 +23,35 @@ }; &wkup_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; }; &cbass_main { - u-boot,dm-spl; + bootph-pre-ram; }; &main_navss { - u-boot,dm-spl; + bootph-pre-ram; }; &cbass_mcu_wakeup { - u-boot,dm-spl; + bootph-pre-ram; timer1: timer@40400000 { compatible = "ti,omap5430-timer"; reg = <0x0 0x40400000 0x0 0x80>; ti,timer-alwon; clock-frequency = <250000000>; - u-boot,dm-spl; + bootph-pre-ram; }; chipid@43000014 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &mcu_navss { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_ringacc { @@ -61,7 +61,7 @@ <0x0 0x2a500000 0x0 0x40000>, <0x0 0x28440000 0x0 0x40000>; reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_udmap { @@ -73,59 +73,59 @@ <0x0 0x28400000 0x0 0x2000>; reg-names = "gcfg", "rchan", "rchanrt", "tchan", "tchanrt", "rflow"; - u-boot,dm-spl; + bootph-pre-ram; }; &secure_proxy_main { - u-boot,dm-spl; + bootph-pre-ram; }; &sms { - u-boot,dm-spl; + bootph-pre-ram; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_uart8_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &main_mmc1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_pds { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_clks { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_reset { - u-boot,dm-spl; + bootph-pre-ram; }; &main_uart8 { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_cpsw { @@ -146,5 +146,5 @@ }; &main_sdhci1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/k3-am68-sk-r5-base-board.dts b/arch/arm/dts/k3-am68-sk-r5-base-board.dts index 46ee6c4422..a64baba149 100644 --- a/arch/arm/dts/k3-am68-sk-r5-base-board.dts +++ b/arch/arm/dts/k3-am68-sk-r5-base-board.dts @@ -23,7 +23,7 @@ fs_loader0: fs_loader@0 { compatible = "u-boot,fs-loader"; - u-boot,dm-pre-reloc; + bootph-all; }; a72_0: a72@0 { @@ -39,27 +39,27 @@ ti,sci = <&sms>; ti,sci-proc-id = <32>; ti,sci-host-id = <10>; - u-boot,dm-spl; + bootph-pre-ram; }; clk_200mhz: dummy_clock_200mhz { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <200000000>; - u-boot,dm-spl; + bootph-pre-ram; }; clk_19_2mhz: dummy_clock_19_2mhz { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <19200000>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_mcu_wakeup { sa3_secproxy: secproxy@44880000 { - u-boot,dm-spl; + bootph-pre-ram; compatible = "ti,am654-secure-proxy"; reg = <0x0 0x44880000 0x0 0x20000>, <0x0 0x44860000 0x0 0x20000>, @@ -75,14 +75,14 @@ <0x0 0x2a480000 0x0 0x80000>; reg-names = "rt", "scfg", "target_data"; #mbox-cells = <1>; - u-boot,dm-spl; + bootph-pre-ram; }; sysctrler: sysctrler { compatible = "ti,am654-system-controller"; mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>, <&sa3_secproxy 5>; mbox-names = "tx", "rx", "boot_notify"; - u-boot,dm-spl; + bootph-pre-ram; }; dm_tifs: dm-tifs { @@ -92,7 +92,7 @@ mbox-names = "rx", "tx"; mboxes= <&mcu_secproxy 21>, <&mcu_secproxy 23>; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -126,7 +126,7 @@ &wkup_pmx0 { mcu_uart0_pins_default: mcu-uart0-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721S2_WKUP_IOPAD(0x0f4, PIN_INPUT, 0) /*(C24) WKUP_GPIO0_13.MCU_UART0_RXD*/ J721S2_WKUP_IOPAD(0x0f0, PIN_OUTPUT, 0) /*(C25) WKUP_GPIO0_12.MCU_UART0_TXD*/ @@ -134,7 +134,7 @@ }; wkup_uart0_pins_default: wkup-uart0-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /*(E25) WKUP_GPIO0_6.WKUP_UART0_CTSn*/ J721S2_WKUP_IOPAD(0x0dc, PIN_OUTPUT, 0) /*(F28) WKUP_GPIO0_7.WKUP_UART0_RTSn*/ @@ -150,7 +150,7 @@ mbox-names = "tx", "rx", "notify"; ti,host-id = <4>; ti,secure-host; - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_uart0 { diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi index ce52ffcf96..f57c2306ba 100644 --- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi @@ -19,30 +19,30 @@ }; &cbass_main { - u-boot,dm-spl; + bootph-pre-ram; }; &main_navss { - u-boot,dm-spl; + bootph-pre-ram; }; &cbass_mcu_wakeup { - u-boot,dm-spl; + bootph-pre-ram; timer1: timer@40400000 { compatible = "ti,omap5430-timer"; reg = <0x0 0x40400000 0x0 0x80>; ti,timer-alwon; clock-frequency = <250000000>; - u-boot,dm-spl; + bootph-pre-ram; }; chipid@43000014 { - u-boot,dm-spl; + bootph-pre-ram; }; mcu_navss: bus@28380000 { - u-boot,dm-spl; + bootph-pre-ram; #address-cells = <2>; #size-cells = <2>; @@ -53,7 +53,7 @@ <0x0 0x2a500000 0x0 0x40000>, <0x0 0x28440000 0x0 0x40000>; reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; - u-boot,dm-spl; + bootph-pre-ram; }; dma-controller@285c0000 { @@ -65,73 +65,73 @@ <0x0 0x28400000 0x0 0x2000>; reg-names = "gcfg", "rchan", "rchanrt", "tchan", "tchanrt", "rflow"; - u-boot,dm-spl; + bootph-pre-ram; }; }; }; &secure_proxy_main { - u-boot,dm-spl; + bootph-pre-ram; }; &dmsc { - u-boot,dm-spl; + bootph-pre-ram; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; - u-boot,dm-spl; + bootph-pre-ram; }; }; &k3_pds { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_clks { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_reset { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_sdhci0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_sdhci1 { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_i2c0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &exp2 { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_cpsw { @@ -148,37 +148,37 @@ }; &main_usbss0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &usbss0 { - u-boot,dm-spl; + bootph-pre-ram; ti,usb2-only; }; &usb0 { dr_mode = "peripheral"; - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_fss0_hpb0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &fss { - u-boot,dm-spl; + bootph-pre-ram; }; &hbmc { - u-boot,dm-spl; + bootph-pre-ram; flash@0,0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &hbmc_mux { - u-boot,dm-spl; + bootph-pre-ram; }; &serdes_ln_ctrl { @@ -190,7 +190,7 @@ }; &serdes0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_r5fss0 { diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts index b1f9e714d9..55ad6153dd 100644 --- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts @@ -22,7 +22,7 @@ }; fs_loader0: fs_loader@0 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "u-boot,fs-loader"; }; @@ -38,21 +38,21 @@ ti,sci = <&dmsc>; ti,sci-proc-id = <32>; ti,sci-host-id = <10>; - u-boot,dm-spl; + bootph-pre-ram; }; clk_200mhz: dummy_clock_200mhz { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <200000000>; - u-boot,dm-spl; + bootph-pre-ram; }; clk_19_2mhz: dummy_clock_19_2mhz { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <19200000>; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -64,7 +64,7 @@ &cbass_mcu_wakeup { mcu_secproxy: secproxy@2a380000 { - u-boot,dm-spl; + bootph-pre-ram; compatible = "ti,am654-secure-proxy"; reg = <0x0 0x2a380000 0x0 0x80000>, <0x0 0x2a400000 0x0 0x80000>, @@ -74,7 +74,7 @@ }; sysctrler: sysctrler { - u-boot,dm-spl; + bootph-pre-ram; compatible = "ti,am654-system-controller"; mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>; mbox-names = "tx", "rx"; @@ -87,7 +87,7 @@ mbox-names = "rx", "tx"; mboxes= <&mcu_secproxy 21>, <&mcu_secproxy 23>; - u-boot,dm-spl; + bootph-pre-ram; }; wkup_vtm0: vtm@42040000 { @@ -106,9 +106,9 @@ }; &wkup_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; wkup_uart0_pins_default: wkup_uart0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */ J721E_WKUP_IOPAD(0xb4, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */ @@ -116,7 +116,7 @@ }; mcu_uart0_pins_default: mcu_uart0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721E_WKUP_IOPAD(0xf4, PIN_INPUT, 0) /* (D20) WKUP_GPIO0_13.MCU_UART0_RXD */ J721E_WKUP_IOPAD(0xf0, PIN_OUTPUT, 0) /* (D19) WKUP_GPIO0_12.MCU_UART0_TXD */ @@ -159,10 +159,10 @@ }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; main_uart0_pins_default: main_uart0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */ J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */ @@ -172,7 +172,7 @@ }; main_i2c0_pins_default: main-i2c0-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ @@ -200,7 +200,7 @@ }; &wkup_uart0 { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-names = "default"; pinctrl-0 = <&wkup_uart0_pins_default>; status = "okay"; @@ -247,17 +247,17 @@ }; &wkup_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; lp876441: lp876441@4c { compatible = "ti,lp876441"; reg = <0x4c>; - u-boot,dm-spl; + bootph-pre-ram; pinctrl-names = "default"; pinctrl-0 = <&wkup_i2c0_pins_default>; clock-frequency = <400000>; regulators: regulators { - u-boot,dm-spl; + bootph-pre-ram; buck1_reg: buck1 { /*VDD_CPU_AVS_REG*/ regulator-name = "buck1"; @@ -265,7 +265,7 @@ regulator-max-microvolt = <1250000>; regulator-always-on; regulator-boot-on; - u-boot,dm-spl; + bootph-pre-ram; }; }; }; @@ -274,7 +274,7 @@ &wkup_vtm0 { vdd-supply-2 = <&buck1_reg>; - u-boot,dm-spl; + bootph-pre-ram; }; &main_i2c0 { diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index b2b81f804d..867ec2bb1a 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -32,26 +32,26 @@ }; &cbass_main{ - u-boot,dm-spl; + bootph-pre-ram; main_navss: bus@30000000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_mcu_wakeup { - u-boot,dm-spl; + bootph-pre-ram; timer1: timer@40400000 { compatible = "ti,omap5430-timer"; reg = <0x0 0x40400000 0x0 0x80>; ti,timer-alwon; clock-frequency = <250000000>; - u-boot,dm-spl; + bootph-pre-ram; }; mcu_navss: bus@28380000 { - u-boot,dm-spl; + bootph-pre-ram; ringacc@2b800000 { reg = <0x0 0x2b800000 0x0 0x400000>, @@ -60,7 +60,7 @@ <0x0 0x2a500000 0x0 0x40000>, <0x0 0x28440000 0x0 0x40000>; reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; - u-boot,dm-spl; + bootph-pre-ram; }; dma-controller@285c0000 { @@ -72,61 +72,61 @@ <0x0 0x28400000 0x0 0x2000>; reg-names = "gcfg", "rchan", "rchanrt", "tchan", "tchanrt", "rflow"; - u-boot,dm-spl; + bootph-pre-ram; }; }; chipid@43000014 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &secure_proxy_main { - u-boot,dm-spl; + bootph-pre-ram; }; &dmsc { - u-boot,dm-spl; + bootph-pre-ram; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; - u-boot,dm-spl; + bootph-pre-ram; }; }; &k3_pds { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_clks { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_reset { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_sdhci0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_sdhci1 { - u-boot,dm-spl; + bootph-pre-ram; }; &wiz3_pll1_refclk { @@ -135,16 +135,16 @@ }; &main_usbss0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &usbss0 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb0 { dr_mode = "peripheral"; - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_cpsw { @@ -161,79 +161,79 @@ }; &main_mmc1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_i2c0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_i2c0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &exp2 { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_fss0_ospi0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &fss { - u-boot,dm-spl; + bootph-pre-ram; }; &hbmc { - u-boot,dm-spl; + bootph-pre-ram; flash@0,0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &hbmc_mux { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &ospi0 { - u-boot,dm-spl; + bootph-pre-ram; flash@0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &ospi1 { - u-boot,dm-spl; + bootph-pre-ram; flash@0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &mcu_fss0_hpb0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_gpio_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_fss0_ospi1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &main_r5fss0 { diff --git a/arch/arm/dts/k3-j721e-ddr.dtsi b/arch/arm/dts/k3-j721e-ddr.dtsi index 21d63802a5..3a9ea42fe5 100644 --- a/arch/arm/dts/k3-j721e-ddr.dtsi +++ b/arch/arm/dts/k3-j721e-ddr.dtsi @@ -16,7 +16,7 @@ ti,ddr-freq2 = <DDRSS_PLL_FREQUENCY_2>; ti,ddr-fhs-cnt = <DDRSS_PLL_FHS_CNT>; - u-boot,dm-spl; + bootph-pre-ram; ti,ctl-data = < DDRSS_CTL_00_DATA diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi index 48c6ddf672..f9746d33ec 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi @@ -16,7 +16,7 @@ }; fs_loader0: fs_loader@0 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "u-boot,fs-loader"; }; }; @@ -24,6 +24,6 @@ &tps659413a { esm: esm { compatible = "ti,tps659413-esm"; - u-boot,dm-spl; + bootph-pre-ram; }; }; diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index ab9d6e65d8..e9e50538cb 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -33,27 +33,27 @@ ti,sci = <&dmsc>; ti,sci-proc-id = <32>; ti,sci-host-id = <10>; - u-boot,dm-spl; + bootph-pre-ram; }; clk_200mhz: dummy_clock_200mhz { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <200000000>; - u-boot,dm-spl; + bootph-pre-ram; }; clk_19_2mhz: dummy_clock_19_2mhz { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <19200000>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_mcu_wakeup { mcu_secproxy: secproxy@28380000 { - u-boot,dm-spl; + bootph-pre-ram; compatible = "ti,am654-secure-proxy"; reg = <0x0 0x2a380000 0x0 0x80000>, <0x0 0x2a400000 0x0 0x80000>, @@ -63,7 +63,7 @@ }; sysctrler: sysctrler { - u-boot,dm-spl; + bootph-pre-ram; compatible = "ti,am654-system-controller"; mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>; mbox-names = "tx", "rx"; @@ -83,7 +83,7 @@ mbox-names = "rx", "tx"; mboxes= <&mcu_secproxy 21>, <&mcu_secproxy 23>; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -92,7 +92,7 @@ compatible = "ti,j721e-esm"; reg = <0x0 0x700000 0x0 0x1000>; ti,esm-pins = <344>, <345>; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -105,7 +105,7 @@ &wkup_pmx0 { wkup_uart0_pins_default: wkup_uart0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */ J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */ @@ -113,7 +113,7 @@ }; mcu_uart0_pins_default: mcu_uart0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721E_WKUP_IOPAD(0xe8, PIN_INPUT, 0) /* (H29) WKUP_GPIO0_14.MCU_UART0_CTSn */ J721E_WKUP_IOPAD(0xec, PIN_OUTPUT, 0) /* (J27) WKUP_GPIO0_15.MCU_UART0_RTSn */ @@ -171,7 +171,7 @@ }; mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */ J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */ @@ -187,7 +187,7 @@ &main_pmx0 { main_uart0_pins_default: main_uart0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721E_IOPAD(0x1d4, PIN_INPUT, 1) /* (Y3) SPI1_CS0.UART0_CTSn */ J721E_IOPAD(0x1c0, PIN_OUTPUT, 1) /* (AA2) SPI0_CS0.UART0_RTSn */ @@ -226,7 +226,7 @@ }; &wkup_uart0 { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-names = "default"; pinctrl-0 = <&wkup_uart0_pins_default>; status = "okay"; @@ -277,17 +277,17 @@ }; &wkup_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; tps659413a: tps659413a@48 { reg = <0x48>; compatible = "ti,tps659413"; - u-boot,dm-spl; + bootph-pre-ram; pinctrl-names = "default"; pinctrl-0 = <&wkup_i2c0_pins_default>; clock-frequency = <400000>; regulators: regulators { - u-boot,dm-spl; + bootph-pre-ram; buck12_reg: buck12 { /*VDD_CPU*/ regulator-name = "buck12"; @@ -295,7 +295,7 @@ regulator-max-microvolt = <900000>; regulator-always-on; regulator-boot-on; - u-boot,dm-spl; + bootph-pre-ram; }; }; }; @@ -303,7 +303,7 @@ &wkup_vtm0 { vdd-supply-2 = <&buck12_reg>; - u-boot,dm-spl; + bootph-pre-ram; }; &usbss0 { @@ -378,7 +378,7 @@ &ospi1 { pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; - u-boot,dm-spl; + bootph-pre-ram; reg = <0x0 0x47050000 0x0 0x100>, <0x0 0x58000000 0x0 0x8000000>; @@ -396,7 +396,7 @@ cdns,read-delay = <2>; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; diff --git a/arch/arm/dts/k3-j721e-r5-sk-u-boot.dtsi b/arch/arm/dts/k3-j721e-r5-sk-u-boot.dtsi index 71d16f193f..733d69cd00 100644 --- a/arch/arm/dts/k3-j721e-r5-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-r5-sk-u-boot.dtsi @@ -18,7 +18,7 @@ }; fs_loader0: fs_loader@0 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "u-boot,fs-loader"; }; }; @@ -26,6 +26,6 @@ &tps659412 { esm: esm { compatible = "ti,tps659413-esm"; - u-boot,dm-spl; + bootph-pre-ram; }; }; diff --git a/arch/arm/dts/k3-j721e-r5-sk.dts b/arch/arm/dts/k3-j721e-r5-sk.dts index d894dcb991..8d6eaa4fbb 100644 --- a/arch/arm/dts/k3-j721e-r5-sk.dts +++ b/arch/arm/dts/k3-j721e-r5-sk.dts @@ -167,27 +167,27 @@ ti,sci = <&dmsc>; ti,sci-proc-id = <32>; ti,sci-host-id = <10>; - u-boot,dm-spl; + bootph-pre-ram; }; clk_200mhz: dummy_clock_200mhz { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <200000000>; - u-boot,dm-spl; + bootph-pre-ram; }; clk_19_2mhz: dummy_clock_19_2mhz { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <19200000>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_mcu_wakeup { mcu_secproxy: secproxy@28380000 { - u-boot,dm-spl; + bootph-pre-ram; compatible = "ti,am654-secure-proxy"; reg = <0x0 0x2a380000 0x0 0x80000>, <0x0 0x2a400000 0x0 0x80000>, @@ -197,7 +197,7 @@ }; sysctrler: sysctrler { - u-boot,dm-spl; + bootph-pre-ram; compatible = "ti,am654-system-controller"; mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>; mbox-names = "tx", "rx"; @@ -217,7 +217,7 @@ mbox-names = "rx", "tx"; mboxes= <&mcu_secproxy 21>, <&mcu_secproxy 23>; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -226,7 +226,7 @@ compatible = "ti,j721e-esm"; reg = <0x0 0x700000 0x0 0x1000>; ti,esm-pins = <344>, <345>; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -239,7 +239,7 @@ &wkup_pmx0 { wkup_uart0_pins_default: wkup_uart0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */ J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */ @@ -247,7 +247,7 @@ }; mcu_uart0_pins_default: mcu_uart0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721E_WKUP_IOPAD(0xf0, PIN_INPUT, 2) /* (D26) MCU_I3C0_SCL.MCU_UART0_CTSn */ J721E_WKUP_IOPAD(0xf4, PIN_OUTPUT, 2)/* (D25) MCU_I3C0_SDA.MCU_UART0_RTSn */ @@ -289,7 +289,7 @@ &main_pmx0 { main_uart0_pins_default: main_uart0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721E_IOPAD(0x1f0, PIN_INPUT, 0) /* (AC2) UART0_CTSn */ J721E_IOPAD(0x1f4, PIN_OUTPUT, 0) /* (AB1) UART0_RTSn */ @@ -361,7 +361,7 @@ }; &wkup_uart0 { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-names = "default"; pinctrl-0 = <&wkup_uart0_pins_default>; status = "okay"; @@ -400,17 +400,17 @@ }; &wkup_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; tps659412: tps659412@48 { reg = <0x48>; compatible = "ti,tps659412"; - u-boot,dm-spl; + bootph-pre-ram; pinctrl-names = "default"; pinctrl-0 = <&wkup_i2c0_pins_default>; clock-frequency = <400000>; regulators: regulators { - u-boot,dm-spl; + bootph-pre-ram; /* 3 Phase Buck */ buck123_reg: buck123 { /* VDD_CPU */ @@ -419,7 +419,7 @@ regulator-max-microvolt = <1250000>; regulator-always-on; regulator-boot-on; - u-boot,dm-spl; + bootph-pre-ram; }; }; }; @@ -427,7 +427,7 @@ &wkup_vtm0 { vdd-supply-2 = <&buck123_reg>; - u-boot,dm-spl; + bootph-pre-ram; }; &usbss0 { diff --git a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi index 2d65e2db42..0949caa129 100644 --- a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi @@ -31,26 +31,26 @@ }; &cbass_main{ - u-boot,dm-spl; + bootph-pre-ram; main_navss { - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_mcu_wakeup { - u-boot,dm-spl; + bootph-pre-ram; timer1: timer@40400000 { compatible = "ti,omap5430-timer"; reg = <0x0 0x40400000 0x0 0x80>; ti,timer-alwon; clock-frequency = <25000000>; - u-boot,dm-spl; + bootph-pre-ram; }; mcu-navss { - u-boot,dm-spl; + bootph-pre-ram; ringacc@2b800000 { reg = <0x0 0x2b800000 0x0 0x400000>, @@ -59,7 +59,7 @@ <0x0 0x2a500000 0x0 0x40000>, <0x0 0x28440000 0x0 0x40000>; reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; - u-boot,dm-spl; + bootph-pre-ram; }; dma-controller@285c0000 { @@ -71,53 +71,53 @@ <0x0 0x28400000 0x0 0x2000>; reg-names = "gcfg", "rchan", "rchanrt", "tchan", "tchanrt", "rflow"; - u-boot,dm-spl; + bootph-pre-ram; }; }; chipid@43000014 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &secure_proxy_main { - u-boot,dm-spl; + bootph-pre-ram; }; &dmsc { - u-boot,dm-spl; + bootph-pre-ram; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; - u-boot,dm-spl; + bootph-pre-ram; }; }; &k3_pds { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_clks { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_reset { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_sdhci0 { @@ -125,7 +125,7 @@ }; &main_sdhci1 { - u-boot,dm-spl; + bootph-pre-ram; }; &wiz3_pll1_refclk { @@ -134,16 +134,16 @@ }; &main_usbss0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &usbss0 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb0 { dr_mode = "host"; - u-boot,dm-spl; + bootph-pre-ram; }; &wiz2_pll1_refclk { @@ -152,16 +152,16 @@ }; &main_usbss1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &usbss1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb1 { dr_mode = "host"; - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_cpsw { @@ -178,19 +178,19 @@ }; &main_mmc1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_i2c0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_i2c1 { @@ -226,27 +226,27 @@ }; &mcu_i2c0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_fss0_ospi0_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &fss { - u-boot,dm-spl; + bootph-pre-ram; }; &ospi0 { - u-boot,dm-spl; + bootph-pre-ram; flash@0 { - u-boot,dm-spl; + bootph-pre-ram; partition@3fc0000 { label = "ospi.phypattern"; reg = <0x3fc0000 0x40000>; - u-boot,dm-spl; + bootph-pre-ram; }; }; }; diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi index a17e61eccf..4fd6d36417 100644 --- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi @@ -22,35 +22,35 @@ }; &wkup_i2c0 { - u-boot,dm-spl; + bootph-pre-ram; }; &cbass_main { - u-boot,dm-spl; + bootph-pre-ram; }; &main_navss { - u-boot,dm-spl; + bootph-pre-ram; }; &cbass_mcu_wakeup { - u-boot,dm-spl; + bootph-pre-ram; timer1: timer@40400000 { compatible = "ti,omap5430-timer"; reg = <0x0 0x40400000 0x0 0x80>; ti,timer-alwon; clock-frequency = <250000000>; - u-boot,dm-spl; + bootph-pre-ram; }; chipid@43000014 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &mcu_navss { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_ringacc { @@ -60,7 +60,7 @@ <0x0 0x2a500000 0x0 0x40000>, <0x0 0x28440000 0x0 0x40000>; reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_udmap { @@ -72,59 +72,59 @@ <0x0 0x28400000 0x0 0x2000>; reg-names = "gcfg", "rchan", "rchanrt", "tchan", "tchanrt", "rflow"; - u-boot,dm-spl; + bootph-pre-ram; }; &secure_proxy_main { - u-boot,dm-spl; + bootph-pre-ram; }; &sms { - u-boot,dm-spl; + bootph-pre-ram; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; - u-boot,dm-spl; + bootph-pre-ram; }; }; &main_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_uart8_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &main_mmc1_pins_default { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_pmx0 { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_pds { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_clks { - u-boot,dm-spl; + bootph-pre-ram; }; &k3_reset { - u-boot,dm-spl; + bootph-pre-ram; }; &main_uart8 { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &mcu_cpsw { @@ -141,9 +141,9 @@ }; &main_sdhci0 { - u-boot,dm-spl; + bootph-pre-ram; }; &main_sdhci1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/k3-j721s2-ddr.dtsi b/arch/arm/dts/k3-j721s2-ddr.dtsi index 6a244fb7ac..345e2b84f9 100644 --- a/arch/arm/dts/k3-j721s2-ddr.dtsi +++ b/arch/arm/dts/k3-j721s2-ddr.dtsi @@ -19,7 +19,7 @@ #address-cells = <2>; #size-cells = <2>; - u-boot,dm-spl; + bootph-pre-ram; memorycontroller0: memorycontroller@2990000 { compatible = "ti,j721s2-ddrss"; @@ -35,7 +35,7 @@ ti,ddr-fhs-cnt = <DDRSS_PLL_FHS_CNT>; instance = <0>; - u-boot,dm-spl; + bootph-pre-ram; ti,ctl-data = < DDRSS0_CTL_00_DATA @@ -2243,7 +2243,7 @@ ti,ddr-fhs-cnt = <DDRSS_PLL_FHS_CNT>; instance = <1>; - u-boot,dm-spl; + bootph-pre-ram; ti,ctl-data = < DDRSS1_CTL_00_DATA diff --git a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts index 9e3bdec2d5..bc617022c1 100644 --- a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts @@ -23,7 +23,7 @@ fs_loader0: fs_loader@0 { compatible = "u-boot,fs-loader"; - u-boot,dm-pre-reloc; + bootph-all; }; a72_0: a72@0 { @@ -39,27 +39,27 @@ ti,sci = <&sms>; ti,sci-proc-id = <32>; ti,sci-host-id = <10>; - u-boot,dm-spl; + bootph-pre-ram; }; clk_200mhz: dummy_clock_200mhz { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <200000000>; - u-boot,dm-spl; + bootph-pre-ram; }; clk_19_2mhz: dummy_clock_19_2mhz { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <19200000>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &cbass_mcu_wakeup { sa3_secproxy: secproxy@44880000 { - u-boot,dm-spl; + bootph-pre-ram; compatible = "ti,am654-secure-proxy"; reg = <0x0 0x44880000 0x0 0x20000>, <0x0 0x44860000 0x0 0x20000>, @@ -75,14 +75,14 @@ <0x0 0x2a480000 0x0 0x80000>; reg-names = "rt", "scfg", "target_data"; #mbox-cells = <1>; - u-boot,dm-spl; + bootph-pre-ram; }; sysctrler: sysctrler { compatible = "ti,am654-system-controller"; mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>, <&sa3_secproxy 5>; mbox-names = "tx", "rx", "boot_notify"; - u-boot,dm-spl; + bootph-pre-ram; }; dm_tifs: dm-tifs { @@ -92,7 +92,7 @@ mbox-names = "rx", "tx"; mboxes= <&mcu_secproxy 21>, <&mcu_secproxy 23>; - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -122,7 +122,7 @@ &wkup_pmx0 { mcu_uart0_pins_default: mcu-uart0-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721S2_WKUP_IOPAD(0x0f8, PIN_INPUT, 0) /* (B24) WKUP_GPIO0_14.MCU_UART0_CTSn */ J721S2_WKUP_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (D25) WKUP_GPIO0_15.MCU_UART0_RTSn */ @@ -132,7 +132,7 @@ }; wkup_uart0_pins_default: wkup-uart0-pins-default { - u-boot,dm-spl; + bootph-pre-ram; pinctrl-single,pins = < J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /* (E25) WKUP_GPIO0_6.WKUP_UART0_CTSn */ J721S2_WKUP_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (F28) WKUP_GPIO0_7.WKUP_UART0_RTSn */ @@ -147,7 +147,7 @@ mbox-names = "tx", "rx", "notify"; ti,host-id = <4>; ti,secure-host; - u-boot,dm-spl; + bootph-pre-ram; }; &wkup_uart0 { diff --git a/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi index c94165ffe7..970d452f08 100644 --- a/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi @@ -5,7 +5,7 @@ /{ soc { - u-boot,dm-pre-reloc; + bootph-all; }; aliases { usb0 = &usb; @@ -14,7 +14,7 @@ }; &i2c1 { - u-boot,dm-pre-reloc; + bootph-all; }; &usb_phy { diff --git a/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi index e8e70096ea..05653afc7e 100644 --- a/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi @@ -5,7 +5,7 @@ /{ soc { - u-boot,dm-pre-reloc; + bootph-all; }; aliases { usb0 = &usb0; @@ -14,11 +14,11 @@ }; &i2c0 { - u-boot,dm-pre-reloc; + bootph-all; }; &i2c1 { - u-boot,dm-pre-reloc; + bootph-all; }; &usb0_phy { diff --git a/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi b/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi index 80f1f60045..8e4b36c2de 100644 --- a/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi @@ -5,14 +5,14 @@ /{ soc { - u-boot,dm-pre-reloc; + bootph-all; }; }; &i2c0 { - u-boot,dm-pre-reloc; + bootph-all; }; &i2c1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi b/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi index 80f1f60045..8e4b36c2de 100644 --- a/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi @@ -5,14 +5,14 @@ /{ soc { - u-boot,dm-pre-reloc; + bootph-all; }; }; &i2c0 { - u-boot,dm-pre-reloc; + bootph-all; }; &i2c1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi index 1c2f349f5c..22df84ba93 100644 --- a/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi @@ -5,12 +5,12 @@ /{ soc { - u-boot,dm-pre-reloc; + bootph-all; }; }; &i2c1 { - u-boot,dm-pre-reloc; + bootph-all; }; &usb_phy { diff --git a/arch/arm/dts/kirkwood-pogoplug-series-4-u-boot.dtsi b/arch/arm/dts/kirkwood-pogoplug-series-4-u-boot.dtsi index f9e127234c..26a6e6b38c 100644 --- a/arch/arm/dts/kirkwood-pogoplug-series-4-u-boot.dtsi +++ b/arch/arm/dts/kirkwood-pogoplug-series-4-u-boot.dtsi @@ -3,5 +3,5 @@ * Copyright (C) 2023 Tony Dinh <mibodhi@gmail.com> */ &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi index 7832c9ab53..6f11852a33 100644 --- a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi +++ b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi @@ -28,37 +28,37 @@ }; &gpio1 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio2 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio3 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio4 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio5 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio6 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &i2c1 { clock-frequency = <400000>; - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &i2c2 { clock-frequency = <400000>; - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; /delete-node/ &bandgap; diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi index 7832c9ab53..6f11852a33 100644 --- a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi +++ b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi @@ -28,37 +28,37 @@ }; &gpio1 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio2 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio3 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio4 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio5 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio6 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &i2c1 { clock-frequency = <400000>; - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &i2c2 { clock-frequency = <400000>; - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; /delete-node/ &bandgap; diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi index 89b20be38c..4744872f7c 100644 --- a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi +++ b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi @@ -28,37 +28,37 @@ }; &gpio1 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio2 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio3 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio4 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio5 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio6 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &i2c1 { clock-frequency = <400000>; - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &i2c2 { clock-frequency = <400000>; - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; /delete-node/ &bandgap; diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi index e56666e4bc..2c34344504 100644 --- a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi +++ b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi @@ -27,7 +27,7 @@ &i2c1 { clock-frequency = <400000>; - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &i2c2 { @@ -35,27 +35,27 @@ }; &gpio1 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio2 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio3 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio4 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio5 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; &gpio6 { - /delete-property/ u-boot,dm-spl; + /delete-property/ bootph-pre-ram; }; /delete-node/ &bandgap; diff --git a/arch/arm/dts/ls1021a-twr-u-boot.dtsi b/arch/arm/dts/ls1021a-twr-u-boot.dtsi index 3711e42419..71a538cff1 100644 --- a/arch/arm/dts/ls1021a-twr-u-boot.dtsi +++ b/arch/arm/dts/ls1021a-twr-u-boot.dtsi @@ -4,26 +4,26 @@ */ &{/soc} { - u-boot,dm-spl; - u-boot,dm-pre-reloc; + bootph-pre-ram; + bootph-all; }; &crypto { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr0 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr2 { - u-boot,dm-spl; + bootph-pre-ram; }; &sec_jr3 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/meson-g12-common-u-boot.dtsi b/arch/arm/dts/meson-g12-common-u-boot.dtsi index b1f60b15c9..efa6a0570b 100644 --- a/arch/arm/dts/meson-g12-common-u-boot.dtsi +++ b/arch/arm/dts/meson-g12-common-u-boot.dtsi @@ -13,7 +13,7 @@ }; soc { - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -26,7 +26,7 @@ <0x0 0xff63c000 0x0 0x1000>, <0x0 0xff638000 0x0 0x400>; reg-names = "vpu", "hhi", "dmc"; - u-boot,dm-pre-reloc; + bootph-all; }; &hdmi_tx { diff --git a/arch/arm/dts/meson-gx-u-boot.dtsi b/arch/arm/dts/meson-gx-u-boot.dtsi index fb6952f1d8..9f123ab042 100644 --- a/arch/arm/dts/meson-gx-u-boot.dtsi +++ b/arch/arm/dts/meson-gx-u-boot.dtsi @@ -13,7 +13,7 @@ }; soc { - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -22,7 +22,7 @@ <0x0 0xc883c000 0x0 0x1000>, <0x0 0xc8838000 0x0 0x1000>; reg-names = "vpu", "hhi", "dmc"; - u-boot,dm-pre-reloc; + bootph-all; }; &hdmi_tx { diff --git a/arch/arm/dts/mt7622-bananapi-bpi-r64.dts b/arch/arm/dts/mt7622-bananapi-bpi-r64.dts index 2ac933a6ac..7c55744ac7 100644 --- a/arch/arm/dts/mt7622-bananapi-bpi-r64.dts +++ b/arch/arm/dts/mt7622-bananapi-bpi-r64.dts @@ -177,7 +177,7 @@ spi-flash@0{ compatible = "jedec,spi-nor"; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/mt7622-rfb.dts b/arch/arm/dts/mt7622-rfb.dts index b44f19f05a..886a133e05 100644 --- a/arch/arm/dts/mt7622-rfb.dts +++ b/arch/arm/dts/mt7622-rfb.dts @@ -178,7 +178,7 @@ spi-flash@0{ compatible = "jedec,spi-nor"; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -192,7 +192,7 @@ reg = <0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/mt7622-u-boot.dtsi b/arch/arm/dts/mt7622-u-boot.dtsi index b14b1d4344..b37049a1f2 100644 --- a/arch/arm/dts/mt7622-u-boot.dtsi +++ b/arch/arm/dts/mt7622-u-boot.dtsi @@ -5,25 +5,25 @@ */ &topckgen { - u-boot,dm-pre-reloc; + bootph-all; }; &pericfg { - u-boot,dm-pre-reloc; + bootph-all; }; &apmixedsys { - u-boot,dm-pre-reloc; + bootph-all; }; &timer0 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &snfi { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/mt7623-u-boot.dtsi b/arch/arm/dts/mt7623-u-boot.dtsi index 832c16dca8..b9fd49900c 100644 --- a/arch/arm/dts/mt7623-u-boot.dtsi +++ b/arch/arm/dts/mt7623-u-boot.dtsi @@ -5,25 +5,25 @@ */ &topckgen { - u-boot,dm-pre-reloc; + bootph-all; }; &topckgen { - u-boot,dm-pre-reloc; + bootph-all; }; &pericfg { - u-boot,dm-pre-reloc; + bootph-all; }; &timer0 { - u-boot,dm-pre-reloc; + bootph-all; }; &apmixedsys { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/mt7629-rfb-u-boot.dtsi b/arch/arm/dts/mt7629-rfb-u-boot.dtsi index c17e82ace7..4117047465 100644 --- a/arch/arm/dts/mt7629-rfb-u-boot.dtsi +++ b/arch/arm/dts/mt7629-rfb-u-boot.dtsi @@ -6,37 +6,37 @@ */ &infracfg { - u-boot,dm-pre-reloc; + bootph-all; }; &pericfg { - u-boot,dm-pre-reloc; + bootph-all; }; &timer0 { - u-boot,dm-pre-reloc; + bootph-all; }; &mcucfg { - u-boot,dm-pre-reloc; + bootph-all; }; &dramc { - u-boot,dm-pre-reloc; + bootph-all; }; &apmixedsys { - u-boot,dm-pre-reloc; + bootph-all; }; &topckgen { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &snfi { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/mt7629-rfb.dts b/arch/arm/dts/mt7629-rfb.dts index f2e4e9548b..82f6a34162 100644 --- a/arch/arm/dts/mt7629-rfb.dts +++ b/arch/arm/dts/mt7629-rfb.dts @@ -37,12 +37,12 @@ &pinctrl { state_default: pinmux_conf { - u-boot,dm-pre-reloc; + bootph-all; mux { function = "jtag"; groups = "ephy_leds_jtag"; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -84,7 +84,7 @@ spi-flash@0{ compatible = "jedec,spi-nor"; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -98,7 +98,7 @@ reg = <0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi index 3089371805..2c8ef14f98 100644 --- a/arch/arm/dts/mt7981.dtsi +++ b/arch/arm/dts/mt7981.dtsi @@ -36,7 +36,7 @@ compatible = "fixed-clock"; clock-frequency = <13000000>; #clock-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; hwver: hwver { @@ -61,7 +61,7 @@ interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gpt_clk>; clock-names = "gpt-clk"; - u-boot,dm-pre-reloc; + bootph-all; }; watchdog: watchdog@1001c000 { @@ -87,7 +87,7 @@ compatible = "mediatek,mt7981-fixed-plls"; reg = <0x1001e000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; topckgen: topckgen@1001b000 { @@ -95,7 +95,7 @@ reg = <0x1001b000 0x1000>; clock-parent = <&fixed_plls>; #clock-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; infracfg_ao: infracfg_ao@10001000 { @@ -103,7 +103,7 @@ reg = <0x10001000 0x80>; clock-parent = <&infracfg>; #clock-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; infracfg: infracfg@10001000 { @@ -111,7 +111,7 @@ reg = <0x10001000 0x30>; clock-parent = <&topckgen>; #clock-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl: pinctrl@11d00000 { @@ -163,7 +163,7 @@ <&infracfg CK_INFRA_UART>; mediatek,force-highspeed; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; uart1: serial@11003000 { diff --git a/arch/arm/dts/mt7986-u-boot.dtsi b/arch/arm/dts/mt7986-u-boot.dtsi index 95671f8afa..096b97371b 100644 --- a/arch/arm/dts/mt7986-u-boot.dtsi +++ b/arch/arm/dts/mt7986-u-boot.dtsi @@ -5,29 +5,29 @@ */ &topckgen { - u-boot,dm-pre-reloc; + bootph-all; }; &pericfg { - u-boot,dm-pre-reloc; + bootph-all; }; &apmixedsys { - u-boot,dm-pre-reloc; + bootph-all; }; &timer0 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &snand { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/mt7986.dtsi b/arch/arm/dts/mt7986.dtsi index 794ab1f4bd..30b5a89970 100644 --- a/arch/arm/dts/mt7986.dtsi +++ b/arch/arm/dts/mt7986.dtsi @@ -55,7 +55,7 @@ clock-frequency = <12000000>; #clock-cells = <0>; /* must need this line, or uart uanable to get dummy_clk */ - u-boot,dm-pre-reloc; + bootph-all; }; hwver: hwver { @@ -80,7 +80,7 @@ interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; clocks = <&infracfg CK_INFRA_CK_F26M>; clock-names = "gpt-clk"; - u-boot,dm-pre-reloc; + bootph-all; }; watchdog: watchdog@1001c000 { @@ -168,7 +168,7 @@ <&infracfg CK_INFRA_PWM>; clock-names = "top", "main", "pwm1", "pwm2"; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; uart0: serial@11002000 { @@ -182,7 +182,7 @@ <&infracfg CK_INFRA_UART>; mediatek,force-highspeed; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; uart1: serial@11003000 { diff --git a/arch/arm/dts/mt8516-u-boot.dtsi b/arch/arm/dts/mt8516-u-boot.dtsi index 3c0d843f35..07312dd5f6 100644 --- a/arch/arm/dts/mt8516-u-boot.dtsi +++ b/arch/arm/dts/mt8516-u-boot.dtsi @@ -5,21 +5,21 @@ */ &infracfg { - u-boot,dm-pre-reloc; + bootph-all; }; &topckgen_ { - u-boot,dm-pre-reloc; + bootph-all; }; &topckgen_cg { - u-boot,dm-pre-reloc; + bootph-all; }; &apmixedsys { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/mvebu-u-boot.dtsi b/arch/arm/dts/mvebu-u-boot.dtsi index db4bf39920..6d20a44239 100644 --- a/arch/arm/dts/mvebu-u-boot.dtsi +++ b/arch/arm/dts/mvebu-u-boot.dtsi @@ -4,31 +4,31 @@ / { soc { - u-boot,dm-pre-reloc; + bootph-all; internal-regs { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; #ifdef CONFIG_ARMADA_375 /* Armada 375 has multiple timers, use timer1 here */ &timer1 { - u-boot,dm-pre-reloc; + bootph-all; }; #else &timer { - u-boot,dm-pre-reloc; + bootph-all; }; #endif #ifdef CONFIG_SPL_SPI &spi0 { - u-boot,dm-pre-reloc; + bootph-all; }; #endif diff --git a/arch/arm/dts/omap3-u-boot.dtsi b/arch/arm/dts/omap3-u-boot.dtsi index 96d8ac5453..7366ff5693 100644 --- a/arch/arm/dts/omap3-u-boot.dtsi +++ b/arch/arm/dts/omap3-u-boot.dtsi @@ -9,74 +9,74 @@ /{ ocp@68000000 { - u-boot,dm-spl; + bootph-pre-ram; bandgap@48002524 { - u-boot,dm-spl; + bootph-pre-ram; }; }; }; &uart1 { - u-boot,dm-spl; + bootph-pre-ram; reg-shift = <2>; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; reg-shift = <2>; }; &uart3 { - u-boot,dm-spl; + bootph-pre-ram; reg-shift = <2>; }; &mmc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &l4_core { - u-boot,dm-spl; + bootph-pre-ram; }; &scm { - u-boot,dm-spl; + bootph-pre-ram; }; &scm_conf { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio6 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; clock-frequency = <100000>; }; diff --git a/arch/arm/dts/omap5-u-boot.dtsi b/arch/arm/dts/omap5-u-boot.dtsi index 5a1c7bc9fe..720e79b3a5 100644 --- a/arch/arm/dts/omap5-u-boot.dtsi +++ b/arch/arm/dts/omap5-u-boot.dtsi @@ -19,11 +19,11 @@ }; ocp { - u-boot,dm-spl; + bootph-pre-ram; ocp2scp@4a080000 { compatible = "ti,omap-ocp2scp", "simple-bus"; - u-boot,dm-spl; + bootph-pre-ram; }; ocp2scp@4a090000 { @@ -31,80 +31,80 @@ }; bandgap@4a0021e0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; }; &uart1 { - u-boot,dm-spl; + bootph-pre-ram; reg-shift = <2>; }; &uart3 { - u-boot,dm-spl; + bootph-pre-ram; reg-shift = <2>; }; &mmc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &mmc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &l4_cfg { - u-boot,dm-spl; + bootph-pre-ram; }; &scm { - u-boot,dm-spl; + bootph-pre-ram; }; &scm_conf { - u-boot,dm-spl; + bootph-pre-ram; }; &qspi { - u-boot,dm-spl; + bootph-pre-ram; m25p80@0 { compatible = "jedec,spi-nor"; - u-boot,dm-spl; + bootph-pre-ram; }; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio6 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio7 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; #else /* OMAP54XX */ diff --git a/arch/arm/dts/phycore-imx8mm-u-boot.dtsi b/arch/arm/dts/phycore-imx8mm-u-boot.dtsi index 7c2dfb4a27..516e52e1f5 100644 --- a/arch/arm/dts/phycore-imx8mm-u-boot.dtsi +++ b/arch/arm/dts/phycore-imx8mm-u-boot.dtsi @@ -10,62 +10,62 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; }; &pinctrl_uart3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_wdog { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart3 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi b/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi index 1325e0cb05..e04766ad09 100644 --- a/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi +++ b/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi @@ -24,27 +24,27 @@ }; &emmc_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc_cmd { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc_bus8 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio0 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio1 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio2 { - u-boot,dm-pre-reloc; + bootph-all; /* * The Qseven BIOS_DISABLE signal on the PX30-µQ7 keeps the on-module @@ -53,39 +53,39 @@ * the SPL has been booted from SD Card. */ bios-disable-override-hog { - u-boot,dm-pre-reloc; + bootph-all; }; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &pcfg_pull_none_8ma { - u-boot,dm-pre-reloc; + bootph-all; }; &pcfg_pull_up_8ma { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_bus4 { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_cmd { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_det { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { clock-frequency = <24000000>; - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi index 462eaf68f8..046da022ff 100644 --- a/arch/arm/dts/px30-u-boot.dtsi +++ b/arch/arm/dts/px30-u-boot.dtsi @@ -16,7 +16,7 @@ }; dmc { - u-boot,dm-pre-reloc; + bootph-all; compatible = "rockchip,px30-dmc", "syscon"; reg = <0x0 0xff2a0000 0x0 0x1000>; }; @@ -30,69 +30,69 @@ &uart2 { clock-frequency = <24000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &uart5 { clock-frequency = <24000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ u-boot,spl-fifo-mode; }; &emmc { - u-boot,dm-pre-reloc; + bootph-all; /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ u-boot,spl-fifo-mode; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; &pmugrf { - u-boot,dm-pre-reloc; + bootph-all; }; &xin24m { - u-boot,dm-pre-reloc; + bootph-all; }; &cru { - u-boot,dm-pre-reloc; + bootph-all; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-rates; }; &pmucru { - u-boot,dm-pre-reloc; + bootph-all; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-rates; }; &saradc { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &gpio0 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio1 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio2 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio3 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/qcom-ipq4019.dtsi b/arch/arm/dts/qcom-ipq4019.dtsi index 6edc69da67..0850ae56e9 100644 --- a/arch/arm/dts/qcom-ipq4019.dtsi +++ b/arch/arm/dts/qcom-ipq4019.dtsi @@ -56,7 +56,7 @@ reg = <0x1800000 0x60000>; #clock-cells = <1>; #reset-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; rng: rng@22000 { @@ -71,7 +71,7 @@ reg = <0x1800000 0x60000>; #clock-cells = <1>; #reset-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; soc_gpios: pinctrl@1000000 { @@ -81,7 +81,7 @@ gpio-count = <100>; gpio-bank-name="soc"; #gpio-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; }; blsp1_uart1: serial@78af000 { @@ -90,7 +90,7 @@ clock = <&gcc GCC_BLSP1_UART1_APPS_CLK>; bit-rate = <0xFF>; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; blsp1_spi1: spi@78b5000 { @@ -100,7 +100,7 @@ #address-cells = <1>; #size-cells = <0>; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; mdio: mdio@90000 { diff --git a/arch/arm/dts/qcs404-evb-uboot.dtsi b/arch/arm/dts/qcs404-evb-uboot.dtsi index c73d71e8c7..b4c5f3fa43 100644 --- a/arch/arm/dts/qcs404-evb-uboot.dtsi +++ b/arch/arm/dts/qcs404-evb-uboot.dtsi @@ -7,18 +7,18 @@ / { soc { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_north@1300000 { - u-boot,dm-pre-reloc; + bootph-all; }; clock-controller@1800000 { - u-boot,dm-pre-reloc; + bootph-all; }; serial@78b1000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts b/arch/arm/dts/r7s72100-gr-peach-u-boot.dts index 5b176a9acd..0ae9f91fbe 100644 --- a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts +++ b/arch/arm/dts/r7s72100-gr-peach-u-boot.dts @@ -13,7 +13,7 @@ }; soc { - u-boot,dm-pre-reloc; + bootph-all; }; leds { @@ -70,20 +70,20 @@ }; &ostm0 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &scif2 { - u-boot,dm-pre-reloc; + bootph-all; clock = <66666666>; /* ToDo: Replace by DM clock driver */ }; &scif2_pins { - u-boot,dm-pre-reloc; + bootph-all; }; &usbhs0 { diff --git a/arch/arm/dts/r8a774a1-u-boot.dtsi b/arch/arm/dts/r8a774a1-u-boot.dtsi index f826c41c3b..cddffe8764 100644 --- a/arch/arm/dts/r8a774a1-u-boot.dtsi +++ b/arch/arm/dts/r8a774a1-u-boot.dtsi @@ -8,7 +8,7 @@ #include "r8a779x-u-boot.dtsi" &extalr_clk { - u-boot,dm-pre-reloc; + bootph-all; }; /delete-node/ &audma0; diff --git a/arch/arm/dts/r8a774b1-u-boot.dtsi b/arch/arm/dts/r8a774b1-u-boot.dtsi index 6fab78e776..3b34f82160 100644 --- a/arch/arm/dts/r8a774b1-u-boot.dtsi +++ b/arch/arm/dts/r8a774b1-u-boot.dtsi @@ -8,7 +8,7 @@ #include "r8a779x-u-boot.dtsi" &extalr_clk { - u-boot,dm-pre-reloc; + bootph-all; }; /delete-node/ &audma0; diff --git a/arch/arm/dts/r8a774e1-u-boot.dtsi b/arch/arm/dts/r8a774e1-u-boot.dtsi index 74758dfedf..e86287098b 100644 --- a/arch/arm/dts/r8a774e1-u-boot.dtsi +++ b/arch/arm/dts/r8a774e1-u-boot.dtsi @@ -8,7 +8,7 @@ #include "r8a779x-u-boot.dtsi" &extalr_clk { - u-boot,dm-pre-reloc; + bootph-all; }; /delete-node/ &audma0; diff --git a/arch/arm/dts/r8a7790-lager-u-boot.dts b/arch/arm/dts/r8a7790-lager-u-boot.dts index fecf7e77ae..28b8b604c3 100644 --- a/arch/arm/dts/r8a7790-lager-u-boot.dts +++ b/arch/arm/dts/r8a7790-lager-u-boot.dts @@ -9,7 +9,7 @@ #include "r8a7790-u-boot.dtsi" &scif0 { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { diff --git a/arch/arm/dts/r8a7790-stout-u-boot.dts b/arch/arm/dts/r8a7790-stout-u-boot.dts index 1396764d32..85bcb78761 100644 --- a/arch/arm/dts/r8a7790-stout-u-boot.dts +++ b/arch/arm/dts/r8a7790-stout-u-boot.dts @@ -9,7 +9,7 @@ #include "r8a7790-u-boot.dtsi" &scifa0 { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { diff --git a/arch/arm/dts/r8a7790-u-boot.dtsi b/arch/arm/dts/r8a7790-u-boot.dtsi index 87dbcafe31..45e2fa6f9f 100644 --- a/arch/arm/dts/r8a7790-u-boot.dtsi +++ b/arch/arm/dts/r8a7790-u-boot.dtsi @@ -8,13 +8,13 @@ #include "r8a779x-u-boot.dtsi" &usb_extal_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &pfc { - u-boot,dm-pre-reloc; + bootph-all; }; &rst { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/r8a7791-koelsch-u-boot.dts b/arch/arm/dts/r8a7791-koelsch-u-boot.dts index 4a98528099..c5a1332131 100644 --- a/arch/arm/dts/r8a7791-koelsch-u-boot.dts +++ b/arch/arm/dts/r8a7791-koelsch-u-boot.dts @@ -9,7 +9,7 @@ #include "r8a7791-u-boot.dtsi" &scif0 { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { diff --git a/arch/arm/dts/r8a7791-porter-u-boot.dts b/arch/arm/dts/r8a7791-porter-u-boot.dts index 82051be824..bfec1fc6d6 100644 --- a/arch/arm/dts/r8a7791-porter-u-boot.dts +++ b/arch/arm/dts/r8a7791-porter-u-boot.dts @@ -9,7 +9,7 @@ #include "r8a7791-u-boot.dtsi" &scif0 { - u-boot,dm-pre-reloc; + bootph-all; }; &i2c6 { diff --git a/arch/arm/dts/r8a7791-u-boot.dtsi b/arch/arm/dts/r8a7791-u-boot.dtsi index 7a9938054a..7143ffc165 100644 --- a/arch/arm/dts/r8a7791-u-boot.dtsi +++ b/arch/arm/dts/r8a7791-u-boot.dtsi @@ -8,13 +8,13 @@ #include "r8a779x-u-boot.dtsi" &usb_extal_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &pfc { - u-boot,dm-pre-reloc; + bootph-all; }; &rst { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/r8a7792-blanche-u-boot.dts b/arch/arm/dts/r8a7792-blanche-u-boot.dts index 30b27040f5..1f33df81ce 100644 --- a/arch/arm/dts/r8a7792-blanche-u-boot.dts +++ b/arch/arm/dts/r8a7792-blanche-u-boot.dts @@ -13,5 +13,5 @@ }; &scif0 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/r8a7792-u-boot.dtsi b/arch/arm/dts/r8a7792-u-boot.dtsi index bb72d5edbb..214cfde1f8 100644 --- a/arch/arm/dts/r8a7792-u-boot.dtsi +++ b/arch/arm/dts/r8a7792-u-boot.dtsi @@ -8,9 +8,9 @@ #include "r8a779x-u-boot.dtsi" &pfc { - u-boot,dm-pre-reloc; + bootph-all; }; &rst { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/r8a7793-gose-u-boot.dts b/arch/arm/dts/r8a7793-gose-u-boot.dts index a35d35c335..dd0932ceca 100644 --- a/arch/arm/dts/r8a7793-gose-u-boot.dts +++ b/arch/arm/dts/r8a7793-gose-u-boot.dts @@ -9,7 +9,7 @@ #include "r8a7793-u-boot.dtsi" &scif0 { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { diff --git a/arch/arm/dts/r8a7793-u-boot.dtsi b/arch/arm/dts/r8a7793-u-boot.dtsi index 4858b171b5..fb947462c5 100644 --- a/arch/arm/dts/r8a7793-u-boot.dtsi +++ b/arch/arm/dts/r8a7793-u-boot.dtsi @@ -8,13 +8,13 @@ #include "r8a779x-u-boot.dtsi" &usb_extal_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &pfc { - u-boot,dm-pre-reloc; + bootph-all; }; &rst { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/r8a7794-alt-u-boot.dts b/arch/arm/dts/r8a7794-alt-u-boot.dts index 29b0e32d14..0a39039fc9 100644 --- a/arch/arm/dts/r8a7794-alt-u-boot.dts +++ b/arch/arm/dts/r8a7794-alt-u-boot.dts @@ -38,7 +38,7 @@ }; &scif2 { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { diff --git a/arch/arm/dts/r8a7794-silk-u-boot.dts b/arch/arm/dts/r8a7794-silk-u-boot.dts index 179753d7cf..3fcb535a3a 100644 --- a/arch/arm/dts/r8a7794-silk-u-boot.dts +++ b/arch/arm/dts/r8a7794-silk-u-boot.dts @@ -9,7 +9,7 @@ #include "r8a7794-u-boot.dtsi" &scif2 { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { diff --git a/arch/arm/dts/r8a7794-u-boot.dtsi b/arch/arm/dts/r8a7794-u-boot.dtsi index 84c7b31989..53b54c8891 100644 --- a/arch/arm/dts/r8a7794-u-boot.dtsi +++ b/arch/arm/dts/r8a7794-u-boot.dtsi @@ -8,13 +8,13 @@ #include "r8a779x-u-boot.dtsi" &usb_extal_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &pfc { - u-boot,dm-pre-reloc; + bootph-all; }; &rst { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/r8a77950-salvator-x-u-boot.dts b/arch/arm/dts/r8a77950-salvator-x-u-boot.dts index d94ad91973..ba7cf521d0 100644 --- a/arch/arm/dts/r8a77950-salvator-x-u-boot.dts +++ b/arch/arm/dts/r8a77950-salvator-x-u-boot.dts @@ -12,15 +12,15 @@ sysinfo { compatible = "renesas,rcar-sysinfo"; i2c-eeprom = <&sysinfo_eeprom>; - u-boot,dm-pre-reloc; + bootph-all; }; }; &i2c_dvfs { - u-boot,dm-pre-reloc; + bootph-all; sysinfo_eeprom: eeprom@50 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; }; diff --git a/arch/arm/dts/r8a77950-u-boot.dtsi b/arch/arm/dts/r8a77950-u-boot.dtsi index 2306c7bab8..92907ea09b 100644 --- a/arch/arm/dts/r8a77950-u-boot.dtsi +++ b/arch/arm/dts/r8a77950-u-boot.dtsi @@ -8,7 +8,7 @@ #include "r8a779x-u-boot.dtsi" &extalr_clk { - u-boot,dm-pre-reloc; + bootph-all; }; / { diff --git a/arch/arm/dts/r8a77950-ulcb-u-boot.dts b/arch/arm/dts/r8a77950-ulcb-u-boot.dts index ff00ccdb5b..e371cde349 100644 --- a/arch/arm/dts/r8a77950-ulcb-u-boot.dts +++ b/arch/arm/dts/r8a77950-ulcb-u-boot.dts @@ -21,18 +21,18 @@ sysinfo { compatible = "renesas,rcar-sysinfo"; i2c-eeprom = <&sysinfo_eeprom>; - u-boot,dm-pre-reloc; + bootph-all; }; }; &i2c_dvfs { - u-boot,dm-pre-reloc; + bootph-all; sysinfo_eeprom: eeprom@50 { compatible = "rohm,br24t01", "atmel,24c01"; reg = <0x50>; pagesize = <8>; - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; }; diff --git a/arch/arm/dts/r8a77960-salvator-x-u-boot.dts b/arch/arm/dts/r8a77960-salvator-x-u-boot.dts index 79a54f38c1..2a9f0aa218 100644 --- a/arch/arm/dts/r8a77960-salvator-x-u-boot.dts +++ b/arch/arm/dts/r8a77960-salvator-x-u-boot.dts @@ -12,15 +12,15 @@ sysinfo { compatible = "renesas,rcar-sysinfo"; i2c-eeprom = <&sysinfo_eeprom>; - u-boot,dm-pre-reloc; + bootph-all; }; }; &i2c_dvfs { - u-boot,dm-pre-reloc; + bootph-all; sysinfo_eeprom: eeprom@50 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; }; diff --git a/arch/arm/dts/r8a77960-u-boot.dtsi b/arch/arm/dts/r8a77960-u-boot.dtsi index f64e5a416b..15a9147432 100644 --- a/arch/arm/dts/r8a77960-u-boot.dtsi +++ b/arch/arm/dts/r8a77960-u-boot.dtsi @@ -8,7 +8,7 @@ #include "r8a779x-u-boot.dtsi" &extalr_clk { - u-boot,dm-pre-reloc; + bootph-all; }; / { diff --git a/arch/arm/dts/r8a77960-ulcb-u-boot.dts b/arch/arm/dts/r8a77960-ulcb-u-boot.dts index 1e9e8b87d5..79042b2085 100644 --- a/arch/arm/dts/r8a77960-ulcb-u-boot.dts +++ b/arch/arm/dts/r8a77960-ulcb-u-boot.dts @@ -21,18 +21,18 @@ sysinfo { compatible = "renesas,rcar-sysinfo"; i2c-eeprom = <&sysinfo_eeprom>; - u-boot,dm-pre-reloc; + bootph-all; }; }; &i2c_dvfs { - u-boot,dm-pre-reloc; + bootph-all; sysinfo_eeprom: eeprom@50 { compatible = "rohm,br24t01", "atmel,24c01"; reg = <0x50>; pagesize = <8>; - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; }; diff --git a/arch/arm/dts/r8a77965-salvator-x-u-boot.dts b/arch/arm/dts/r8a77965-salvator-x-u-boot.dts index 4272ecc110..e5421f9ca8 100644 --- a/arch/arm/dts/r8a77965-salvator-x-u-boot.dts +++ b/arch/arm/dts/r8a77965-salvator-x-u-boot.dts @@ -12,15 +12,15 @@ sysinfo { compatible = "renesas,rcar-sysinfo"; i2c-eeprom = <&sysinfo_eeprom>; - u-boot,dm-pre-reloc; + bootph-all; }; }; &i2c_dvfs { - u-boot,dm-pre-reloc; + bootph-all; sysinfo_eeprom: eeprom@50 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; }; diff --git a/arch/arm/dts/r8a77965-u-boot.dtsi b/arch/arm/dts/r8a77965-u-boot.dtsi index c4abcc5a9b..54107d1ae3 100644 --- a/arch/arm/dts/r8a77965-u-boot.dtsi +++ b/arch/arm/dts/r8a77965-u-boot.dtsi @@ -8,7 +8,7 @@ #include "r8a779x-u-boot.dtsi" &extalr_clk { - u-boot,dm-pre-reloc; + bootph-all; }; / { diff --git a/arch/arm/dts/r8a77965-ulcb-u-boot.dts b/arch/arm/dts/r8a77965-ulcb-u-boot.dts index d9c680b171..969911d89c 100644 --- a/arch/arm/dts/r8a77965-ulcb-u-boot.dts +++ b/arch/arm/dts/r8a77965-ulcb-u-boot.dts @@ -21,18 +21,18 @@ sysinfo { compatible = "renesas,rcar-sysinfo"; i2c-eeprom = <&sysinfo_eeprom>; - u-boot,dm-pre-reloc; + bootph-all; }; }; &i2c_dvfs { - u-boot,dm-pre-reloc; + bootph-all; sysinfo_eeprom: eeprom@50 { compatible = "rohm,br24t01", "atmel,24c01"; reg = <0x50>; pagesize = <8>; - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; }; diff --git a/arch/arm/dts/r8a77970-u-boot.dtsi b/arch/arm/dts/r8a77970-u-boot.dtsi index 614caa9e9c..d252c2e8e6 100644 --- a/arch/arm/dts/r8a77970-u-boot.dtsi +++ b/arch/arm/dts/r8a77970-u-boot.dtsi @@ -8,7 +8,7 @@ #include "r8a779x-u-boot.dtsi" &extalr_clk { - u-boot,dm-pre-reloc; + bootph-all; }; / { diff --git a/arch/arm/dts/r8a77980-u-boot.dtsi b/arch/arm/dts/r8a77980-u-boot.dtsi index 54f01c926d..9f7bf499bc 100644 --- a/arch/arm/dts/r8a77980-u-boot.dtsi +++ b/arch/arm/dts/r8a77980-u-boot.dtsi @@ -8,7 +8,7 @@ #include "r8a779x-u-boot.dtsi" &extalr_clk { - u-boot,dm-pre-reloc; + bootph-all; }; / { diff --git a/arch/arm/dts/r8a77990-ebisu-u-boot.dts b/arch/arm/dts/r8a77990-ebisu-u-boot.dts index 55699bafc4..fc1c4a7929 100644 --- a/arch/arm/dts/r8a77990-ebisu-u-boot.dts +++ b/arch/arm/dts/r8a77990-ebisu-u-boot.dts @@ -12,7 +12,7 @@ sysinfo { compatible = "renesas,rcar-sysinfo"; i2c-eeprom = <&sysinfo_eeprom>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -20,13 +20,13 @@ compatible = "renesas,iic-r8a77990", "renesas,rcar-gen3-iic", "renesas,rmobile-iic"; - u-boot,dm-pre-reloc; + bootph-all; sysinfo_eeprom: eeprom@50 { compatible = "rohm,br24t01", "atmel,24c01"; reg = <0x50>; pagesize = <8>; - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; }; diff --git a/arch/arm/dts/r8a779a0-u-boot.dtsi b/arch/arm/dts/r8a779a0-u-boot.dtsi index 9f2772a948..2b6d6ef05d 100644 --- a/arch/arm/dts/r8a779a0-u-boot.dtsi +++ b/arch/arm/dts/r8a779a0-u-boot.dtsi @@ -21,5 +21,5 @@ }; &extalr_clk { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/r8a779x-u-boot.dtsi b/arch/arm/dts/r8a779x-u-boot.dtsi index a6bf75182e..001ac59adb 100644 --- a/arch/arm/dts/r8a779x-u-boot.dtsi +++ b/arch/arm/dts/r8a779x-u-boot.dtsi @@ -7,18 +7,18 @@ / { soc { - u-boot,dm-pre-reloc; + bootph-all; }; }; &cpg { - u-boot,dm-pre-reloc; + bootph-all; }; &extal_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &prr { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3036-sdk-u-boot.dtsi b/arch/arm/dts/rk3036-sdk-u-boot.dtsi index 754800c6e6..ef7e0207c3 100644 --- a/arch/arm/dts/rk3036-sdk-u-boot.dtsi +++ b/arch/arm/dts/rk3036-sdk-u-boot.dtsi @@ -1,13 +1,13 @@ #include "rk3036-u-boot.dtsi" &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3066a-mk808-u-boot.dtsi b/arch/arm/dts/rk3066a-mk808-u-boot.dtsi index e0aa929fce..4474be962d 100644 --- a/arch/arm/dts/rk3066a-mk808-u-boot.dtsi +++ b/arch/arm/dts/rk3066a-mk808-u-boot.dtsi @@ -9,7 +9,7 @@ }; &cru { - u-boot,dm-pre-reloc; + bootph-all; }; &dmc { @@ -27,7 +27,7 @@ &mmc0 { fifo-mode; max-frequency = <4000000>; - u-boot,dm-spl; + bootph-pre-ram; u-boot,spl-fifo-mode; }; @@ -41,9 +41,9 @@ &timer2 { clock-frequency = <24000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3128-evb-u-boot.dtsi b/arch/arm/dts/rk3128-evb-u-boot.dtsi index 8b16bbe41c..2f20cacc7a 100644 --- a/arch/arm/dts/rk3128-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3128-evb-u-boot.dtsi @@ -3,5 +3,5 @@ #include "rk3128-u-boot.dtsi" &emmc { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi index 4a98e2496f..6d1965e6b5 100644 --- a/arch/arm/dts/rk3128-u-boot.dtsi +++ b/arch/arm/dts/rk3128-u-boot.dtsi @@ -6,14 +6,14 @@ dmc: dmc@20004000 { compatible = "rockchip,rk3128-dmc", "syscon"; reg = <0x0 0x20004000 0x0 0x1000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; &cru { - u-boot,dm-pre-reloc; + bootph-all; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi index 9c9016de1b..fe6aba70d1 100644 --- a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi +++ b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi @@ -13,12 +13,12 @@ config { u-boot,boot-led = "rock:red:power"; - u-boot,dm-pre-reloc; + bootph-all; }; }; &cru { - u-boot,dm-spl; + bootph-pre-ram; }; &dmc { @@ -48,15 +48,15 @@ }; &pinctrl { - u-boot,dm-spl; + bootph-pre-ram; }; &timer3 { compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer"; clock-frequency = <24000000>; - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3229-evb-u-boot.dtsi b/arch/arm/dts/rk3229-evb-u-boot.dtsi index b65149c249..4a4e4cc0c9 100644 --- a/arch/arm/dts/rk3229-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3229-evb-u-boot.dtsi @@ -20,9 +20,9 @@ }; &emmc { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi index 79c41e481b..aea917544b 100644 --- a/arch/arm/dts/rk322x-u-boot.dtsi +++ b/arch/arm/dts/rk322x-u-boot.dtsi @@ -29,18 +29,18 @@ rockchip,grf = <&grf>; rockchip,msch = <&service_msch>; rockchip,sram = <&ddr_sram>; - u-boot,dm-pre-reloc; + bootph-all; }; service_msch: syscon@31090000 { compatible = "rockchip,rk3228-msch", "syscon"; reg = <0x31090000 0x2000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; &cru { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc { @@ -48,7 +48,7 @@ }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc { diff --git a/arch/arm/dts/rk3288-evb-u-boot.dtsi b/arch/arm/dts/rk3288-evb-u-boot.dtsi index c8f5120711..686ed2cd5d 100644 --- a/arch/arm/dts/rk3288-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3288-evb-u-boot.dtsi @@ -17,41 +17,41 @@ }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio3 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio8 { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_bus4 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_clk { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_cmd { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_pwr { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index cc84d7c4ae..644198a4a2 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -7,19 +7,19 @@ / { config { - u-boot,dm-pre-reloc; + bootph-all; u-boot,boot-led = "firefly:green:power"; }; leds { - u-boot,dm-pre-reloc; + bootph-all; work { - u-boot,dm-pre-reloc; + bootph-all; }; power { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; @@ -37,45 +37,45 @@ }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio3 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio8 { - u-boot,dm-pre-reloc; + bootph-all; }; &pcfg_pull_up_drv_12ma { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_bus4 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_clk { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_cmd { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_pwr { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3288-miqi-u-boot.dtsi b/arch/arm/dts/rk3288-miqi-u-boot.dtsi index 2a74fdd15f..43cb48bd03 100644 --- a/arch/arm/dts/rk3288-miqi-u-boot.dtsi +++ b/arch/arm/dts/rk3288-miqi-u-boot.dtsi @@ -6,10 +6,10 @@ #include "rk3288-u-boot.dtsi" / { leds { - u-boot,dm-pre-reloc; + bootph-all; work { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; @@ -26,33 +26,33 @@ }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_bus4 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_clk { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_cmd { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_pwr { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi b/arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi index 30f4cb106e..383b383acc 100644 --- a/arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi +++ b/arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi @@ -16,29 +16,29 @@ }; &emmc { - u-boot,dm-pre-reloc; + bootph-all; }; &i2c0 { - u-boot,dm-pre-reloc; + bootph-all; rk818: pmic@1c { - u-boot,dm-pre-reloc; + bootph-all; regulators { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3288-popmetal-u-boot.dtsi b/arch/arm/dts/rk3288-popmetal-u-boot.dtsi index 3782253c8a..57d602619d 100644 --- a/arch/arm/dts/rk3288-popmetal-u-boot.dtsi +++ b/arch/arm/dts/rk3288-popmetal-u-boot.dtsi @@ -17,41 +17,41 @@ }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio3 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio8 { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_bus4 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_clk { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_cmd { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_pwr { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi b/arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi index 538607dd73..86da1f4c06 100644 --- a/arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi +++ b/arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi @@ -23,17 +23,17 @@ }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3288-rock2-square-u-boot.dtsi b/arch/arm/dts/rk3288-rock2-square-u-boot.dtsi index 509f789b98..ea4a6e0046 100644 --- a/arch/arm/dts/rk3288-rock2-square-u-boot.dtsi +++ b/arch/arm/dts/rk3288-rock2-square-u-boot.dtsi @@ -14,17 +14,17 @@ }; &gpio7 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi b/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi index a177fca73a..b4c5483146 100644 --- a/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi +++ b/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi @@ -14,21 +14,21 @@ }; &emmc { - u-boot,dm-spl; + bootph-pre-ram; }; &emmc_clk { - u-boot,dm-spl; + bootph-pre-ram; }; &emmc_cmd { - u-boot,dm-spl; + bootph-pre-ram; }; &emmc_pwr { - u-boot,dm-spl; + bootph-pre-ram; }; &emmc_bus8 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3288-tinker-u-boot.dtsi b/arch/arm/dts/rk3288-tinker-u-boot.dtsi index 56d10c82ec..0cf1b696d1 100644 --- a/arch/arm/dts/rk3288-tinker-u-boot.dtsi +++ b/arch/arm/dts/rk3288-tinker-u-boot.dtsi @@ -6,7 +6,7 @@ #include "rk3288-u-boot.dtsi" &dmc { - u-boot,dm-pre-reloc; + bootph-all; rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d 0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6 0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0 @@ -25,61 +25,61 @@ }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2_xfer { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio7 { - u-boot,dm-spl; + bootph-pre-ram; }; &vcc_sd { - u-boot,dm-spl; + bootph-pre-ram; }; &pcfg_pull_none_drv_8ma { - u-boot,dm-spl; + bootph-pre-ram; }; &pcfg_pull_up_drv_8ma { - u-boot,dm-spl; + bootph-pre-ram; }; &pcfg_pull_none { - u-boot,dm-spl; + bootph-pre-ram; }; &pcfg_pull_up { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_bus4 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_cd { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_clk { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_cmd { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc_pwr { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi index e411445ed6..1894162153 100644 --- a/arch/arm/dts/rk3288-u-boot.dtsi +++ b/arch/arm/dts/rk3288-u-boot.dtsi @@ -46,13 +46,13 @@ rockchip,pmu = <&pmu>; rockchip,sgrf = <&sgrf>; rockchip,sram = <&ddr_sram>; - u-boot,dm-pre-reloc; + bootph-all; }; noc: syscon@ffac0000 { compatible = "rockchip,rk3288-noc", "syscon"; reg = <0xffac0000 0x2000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -88,23 +88,23 @@ }; &cru { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio7 { - u-boot,dm-pre-reloc; + bootph-all; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; &pmu { - u-boot,dm-pre-reloc; + bootph-all; }; &sgrf { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { @@ -124,9 +124,9 @@ }; &vopb { - u-boot,dm-pre-reloc; + bootph-all; }; &vopl { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi index 251fbdee71..90ce9e1395 100644 --- a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi +++ b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi @@ -17,17 +17,17 @@ }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3288-veyron-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-u-boot.dtsi index 21e1aec291..ab564e73ed 100644 --- a/arch/arm/dts/rk3288-veyron-u-boot.dtsi +++ b/arch/arm/dts/rk3288-veyron-u-boot.dtsi @@ -32,41 +32,41 @@ }; &gpio3 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio7 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio8 { - u-boot,dm-pre-reloc; + bootph-all; }; &i2c0 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &rk808 { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; }; &spi2 { - u-boot,dm-pre-reloc; + bootph-all; }; &spi_flash { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3288-vyasa-u-boot.dtsi b/arch/arm/dts/rk3288-vyasa-u-boot.dtsi index 7730d17228..8f50bfe898 100644 --- a/arch/arm/dts/rk3288-vyasa-u-boot.dtsi +++ b/arch/arm/dts/rk3288-vyasa-u-boot.dtsi @@ -18,17 +18,17 @@ }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi index c6ea746de0..d15ba94d37 100644 --- a/arch/arm/dts/rk3308-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi @@ -11,7 +11,7 @@ }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; clock-frequency = <24000000>; status = "okay"; }; diff --git a/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi index ffbe742053..97d922c435 100644 --- a/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi +++ b/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi @@ -11,7 +11,7 @@ }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; clock-frequency = <24000000>; status = "okay"; }; diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi index ab5bfc2ce9..c8451b2475 100644 --- a/arch/arm/dts/rk3308-u-boot.dtsi +++ b/arch/arm/dts/rk3308-u-boot.dtsi @@ -13,24 +13,24 @@ }; &cru { - u-boot,dm-pre-reloc; + bootph-all; }; &dmc { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc { /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ u-boot,spl-fifo-mode; - u-boot,dm-pre-reloc; + bootph-all; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; &saradc { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi index 16c33735eb..04028bf649 100644 --- a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi +++ b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi @@ -20,7 +20,7 @@ }; dmc { - u-boot,dm-pre-reloc; + bootph-all; compatible = "rockchip,px30-dmc", "syscon"; reg = <0x0 0xff2a0000 0x0 0x1000>; }; @@ -34,7 +34,7 @@ /* U-Boot clk driver for px30 cannot set GPU_CLK */ &cru { - u-boot,dm-pre-reloc; + bootph-all; assigned-clocks = <&cru PLL_NPLL>, <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>, @@ -47,63 +47,63 @@ }; &gpio0 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio1 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio2 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio3 { - u-boot,dm-pre-reloc; + bootph-all; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; &pmucru { - u-boot,dm-pre-reloc; + bootph-all; }; &pmugrf { - u-boot,dm-pre-reloc; + bootph-all; }; &saradc { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ u-boot,spl-fifo-mode; }; &sfc { - u-boot,dm-pre-reloc; + bootph-all; }; &{/spi@ff3a0000/flash@0} { - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { clock-frequency = <24000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { clock-frequency = <24000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &xin24m { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi index 8db5e55af6..78d37ab475 100644 --- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi +++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi @@ -13,24 +13,24 @@ }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc0m1_pin { - u-boot,dm-spl; + bootph-pre-ram; }; &pcfg_pull_up_4ma { - u-boot,dm-spl; + bootph-pre-ram; }; /* Need this and all the pinctrl/gpio stuff above to set pinmux */ &vcc_sd { - u-boot,dm-spl; + bootph-pre-ram; }; &gmac2io { diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi index 20a62134a0..27a454f017 100644 --- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi +++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi @@ -33,19 +33,19 @@ }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc0m1_pin { - u-boot,dm-spl; + bootph-pre-ram; }; &pcfg_pull_up_4ma { - u-boot,dm-spl; + bootph-pre-ram; }; &usb_host0_xhci { @@ -64,5 +64,5 @@ /* Need this and all the pinctrl/gpio stuff above to set pinmux */ &vcc_sd { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi index 9d557eb988..088e21c76a 100644 --- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi @@ -30,19 +30,19 @@ }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc0m1_pin { - u-boot,dm-spl; + bootph-pre-ram; }; &pcfg_pull_up_4ma { - u-boot,dm-spl; + bootph-pre-ram; }; &usb_host0_xhci { @@ -52,5 +52,5 @@ /* Need this and all the pinctrl/gpio stuff above to set pinmux */ &vcc_sd { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi index 3c3b1370e3..c20a99a620 100644 --- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi @@ -33,19 +33,19 @@ }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc0m1_pin { - u-boot,dm-spl; + bootph-pre-ram; }; &pcfg_pull_up_4ma { - u-boot,dm-spl; + bootph-pre-ram; }; &usb_host0_xhci { @@ -65,11 +65,11 @@ /* Need this and all the pinctrl/gpio stuff above to set pinmux */ &vcc_sd { - u-boot,dm-spl; + bootph-pre-ram; }; &spi0 { spi_flash: spiflash@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi index d4a7540a92..668f8ca29d 100644 --- a/arch/arm/dts/rk3328-u-boot.dtsi +++ b/arch/arm/dts/rk3328-u-boot.dtsi @@ -17,7 +17,7 @@ }; dmc: dmc { - u-boot,dm-pre-reloc; + bootph-all; compatible = "rockchip,rk3328-dmc"; reg = <0x0 0xff400000 0x0 0x1000 0x0 0xff780000 0x0 0x3000 @@ -40,27 +40,27 @@ }; &cru { - u-boot,dm-pre-reloc; + bootph-all; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; clock-frequency = <24000000>; }; &emmc { - u-boot,dm-pre-reloc; + bootph-all; /* mmc to sram can't do dma, prevent aborts transfering TF-A parts */ u-boot,spl-fifo-mode; }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; /* mmc to sram can't do dma, prevent aborts transfering TF-A parts */ u-boot,spl-fifo-mode; @@ -71,5 +71,5 @@ }; &spi0 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3368-geekbox-u-boot.dtsi b/arch/arm/dts/rk3368-geekbox-u-boot.dtsi index 0b724fa45f..cfc8b9340a 100644 --- a/arch/arm/dts/rk3368-geekbox-u-boot.dtsi +++ b/arch/arm/dts/rk3368-geekbox-u-boot.dtsi @@ -6,30 +6,30 @@ #include "rk3368-u-boot.dtsi" &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &service_msch { - u-boot,dm-pre-reloc; + bootph-all; }; &dmc { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &pmugrf { - u-boot,dm-pre-reloc; + bootph-all; }; &cru { - u-boot,dm-pre-reloc; + bootph-all; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi b/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi index 7826d1e70b..a3c2b707e9 100644 --- a/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi +++ b/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi @@ -39,19 +39,19 @@ }; &gpio2 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &service_msch { - u-boot,dm-pre-reloc; + bootph-all; }; &dmc { - u-boot,dm-pre-reloc; + bootph-all; /* * Validation of throughput using SPEC2000 shows the following @@ -75,43 +75,43 @@ }; &pmugrf { - u-boot,dm-pre-reloc; + bootph-all; }; &sgrf { - u-boot,dm-pre-reloc; + bootph-all; }; &cru { - u-boot,dm-pre-reloc; + bootph-all; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &spi1 { - u-boot,dm-spl; + bootph-pre-ram; spiflash: w25q32dw@0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &timer0 { - u-boot,dm-pre-reloc; + bootph-all; clock-frequency = <24000000>; status = "okay"; }; diff --git a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi index 264fb7adf0..0ddb0d8f25 100644 --- a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi @@ -12,7 +12,7 @@ }; &dmc { - u-boot,dm-pre-reloc; + bootph-all; /* * PX5-evb(2GB) need to use CBRD mode, or else the dram is not correct @@ -28,46 +28,46 @@ }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &service_msch { - u-boot,dm-pre-reloc; + bootph-all; }; &dmc { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &pmugrf { - u-boot,dm-pre-reloc; + bootph-all; }; &sgrf { - u-boot,dm-pre-reloc; + bootph-all; }; &cru { - u-boot,dm-pre-reloc; + bootph-all; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc { /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ u-boot,spl-fifo-mode; - u-boot,dm-pre-reloc; + bootph-all; }; &timer0 { - u-boot,dm-pre-reloc; + bootph-all; clock-frequency = <24000000>; status = "okay"; }; diff --git a/arch/arm/dts/rk3368-sheep-u-boot.dtsi b/arch/arm/dts/rk3368-sheep-u-boot.dtsi index 0b724fa45f..cfc8b9340a 100644 --- a/arch/arm/dts/rk3368-sheep-u-boot.dtsi +++ b/arch/arm/dts/rk3368-sheep-u-boot.dtsi @@ -6,30 +6,30 @@ #include "rk3368-u-boot.dtsi" &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &service_msch { - u-boot,dm-pre-reloc; + bootph-all; }; &dmc { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &pmugrf { - u-boot,dm-pre-reloc; + bootph-all; }; &cru { - u-boot,dm-pre-reloc; + bootph-all; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi index 5e39b1493d..dfce63e4d4 100644 --- a/arch/arm/dts/rk3399-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi @@ -14,11 +14,11 @@ }; &i2c0 { - u-boot,dm-pre-reloc; + bootph-all; }; &rk808 { - u-boot,dm-pre-reloc; + bootph-all; }; &tcphy1 { @@ -39,7 +39,7 @@ }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; bus-width = <4>; cap-mmc-highspeed; cap-sd-highspeed; diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi index 33734e99be..b1604a6872 100644 --- a/arch/arm/dts/rk3399-gru-u-boot.dtsi +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi @@ -61,5 +61,5 @@ }; &spi_flash { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi index fd87102c0b..ea7a5a17ae 100644 --- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi @@ -22,16 +22,16 @@ &sdhci { max-frequency = <25000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc { max-frequency = <20000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &spiflash { - u-boot,dm-pre-reloc; + bootph-all; }; &vdd_log { diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi index 1dad283ad0..347243fe47 100644 --- a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi +++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi @@ -22,10 +22,10 @@ &sdhci { max-frequency = <25000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc { max-frequency = <20000000>; - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi index 088861dbf6..2b3ea6da88 100644 --- a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi +++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi @@ -62,11 +62,11 @@ }; &gpio1 { - u-boot,dm-pre-reloc; + bootph-all; }; &gpio3 { - u-boot,dm-pre-reloc; + bootph-all; /* * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module @@ -75,7 +75,7 @@ * eMMC and SPI after the SPL has been booted from SD Card. */ bios_disable_override { - u-boot,dm-pre-reloc; + bootph-all; gpios = <RK_PD5 GPIO_ACTIVE_LOW>; output-high; line-name = "bios_disable_override"; @@ -84,29 +84,29 @@ }; &gpio4 { - u-boot,dm-pre-reloc; + bootph-all; }; &norflash { - u-boot,dm-pre-reloc; + bootph-all; }; &pcfg_pull_none { - u-boot,dm-pre-reloc; + bootph-all; }; &pcfg_pull_up { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_bus4 { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_cmd { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi index e3c9364e35..f85e7b62d9 100644 --- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi +++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi @@ -42,7 +42,7 @@ &spi1 { spi_flash: flash@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi index 37dff04adf..32a83b2855 100644 --- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi @@ -17,7 +17,7 @@ &spi1 { spi_flash: flash@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index 8a0b1803f3..e677ae678d 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -15,13 +15,13 @@ }; cic: syscon@ff620000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "rockchip,rk3399-cic", "syscon"; reg = <0x0 0xff620000 0x0 0x100>; }; dfi: dfi@ff630000 { - u-boot,dm-pre-reloc; + bootph-all; reg = <0x00 0xff630000 0x00 0x4000>; compatible = "rockchip,rk3399-dfi"; rockchip,pmu = <&pmugrf>; @@ -36,7 +36,7 @@ }; dmc: dmc { - u-boot,dm-pre-reloc; + bootph-all; compatible = "rockchip,rk3399-dmc"; devfreq-events = <&dfi>; interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>; @@ -53,7 +53,7 @@ }; pmusgrf: syscon@ff330000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "rockchip,rk3399-pmusgrf", "syscon"; reg = <0x0 0xff330000 0x0 0xe3d4>; }; @@ -86,65 +86,65 @@ #endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */ &cru { - u-boot,dm-pre-reloc; + bootph-all; }; &emmc_phy { - u-boot,dm-pre-reloc; + bootph-all; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &pmu { - u-boot,dm-pre-reloc; + bootph-all; }; &pmugrf { - u-boot,dm-pre-reloc; + bootph-all; }; &pmu { - u-boot,dm-pre-reloc; + bootph-all; }; &pmucru { - u-boot,dm-pre-reloc; + bootph-all; }; &sdhci { max-frequency = <200000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc { - u-boot,dm-pre-reloc; + bootph-all; /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ u-boot,spl-fifo-mode; }; &spi1 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &vopb { - u-boot,dm-pre-reloc; + bootph-all; }; &vopl { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rk3568-evb-u-boot.dtsi b/arch/arm/dts/rk3568-evb-u-boot.dtsi index 17503d3d27..382a52a28b 100644 --- a/arch/arm/dts/rk3568-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3568-evb-u-boot.dtsi @@ -18,6 +18,6 @@ &uart2 { clock-frequency = <24000000>; - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; }; diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index ccb8db0001..580e5762cf 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -17,37 +17,37 @@ dmc: dmc { compatible = "rockchip,rk3568-dmc"; - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; }; &cru { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &pmucru { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &pmugrf { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &sdhci { - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; }; &sdmmc0 { - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; }; diff --git a/arch/arm/dts/rk3xxx-u-boot.dtsi b/arch/arm/dts/rk3xxx-u-boot.dtsi index e67432fb39..f50bacdb84 100644 --- a/arch/arm/dts/rk3xxx-u-boot.dtsi +++ b/arch/arm/dts/rk3xxx-u-boot.dtsi @@ -4,7 +4,7 @@ noc: syscon@10128000 { compatible = "rockchip,rk3188-noc", "syscon"; reg = <0x10128000 0x2000>; - u-boot,dm-pre-reloc; + bootph-all; }; dmc: dmc@20020000 { @@ -18,16 +18,16 @@ rockchip,grf = <&grf>; rockchip,pmu = <&pmu>; rockchip,noc = <&noc>; - u-boot,dm-pre-reloc; + bootph-all; }; }; &grf { - u-boot,dm-pre-reloc; + bootph-all; }; &pmu { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { diff --git a/arch/arm/dts/rv1108-u-boot.dtsi b/arch/arm/dts/rv1108-u-boot.dtsi index 6a2098b8d4..ccf2d8bd83 100644 --- a/arch/arm/dts/rv1108-u-boot.dtsi +++ b/arch/arm/dts/rv1108-u-boot.dtsi @@ -6,5 +6,5 @@ #include "rockchip-u-boot.dtsi" &grf { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi index bc77037760..5e348278f2 100644 --- a/arch/arm/dts/rv1126-u-boot.dtsi +++ b/arch/arm/dts/rv1126-u-boot.dtsi @@ -13,50 +13,50 @@ dmc { compatible = "rockchip,rv1126-dmc"; - u-boot,dm-pre-reloc; + bootph-all; }; }; &gpio0 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &grf { - u-boot,dm-spl; + bootph-pre-ram; }; &pmu { - u-boot,dm-spl; + bootph-pre-ram; }; &pmugrf { - u-boot,dm-spl; + bootph-pre-ram; }; &xin24m { - u-boot,dm-spl; + bootph-pre-ram; }; &cru { - u-boot,dm-spl; + bootph-pre-ram; }; &pmucru { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &emmc { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/rz-g2-beacon-u-boot.dtsi b/arch/arm/dts/rz-g2-beacon-u-boot.dtsi index da1c3b0939..84416fceaf 100644 --- a/arch/arm/dts/rz-g2-beacon-u-boot.dtsi +++ b/arch/arm/dts/rz-g2-beacon-u-boot.dtsi @@ -9,12 +9,12 @@ }; soc { - u-boot,dm-pre-reloc; + bootph-all; }; }; &cpg { - u-boot,dm-pre-reloc; + bootph-all; }; &ehci0 { @@ -26,11 +26,11 @@ }; &extal_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &extalr_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &pfc { @@ -41,7 +41,7 @@ }; &prr { - u-boot,dm-pre-reloc; + bootph-all; }; &rpc { diff --git a/arch/arm/dts/s5p4418.dtsi b/arch/arm/dts/s5p4418.dtsi index 3027cd4bb9..d83eb52109 100644 --- a/arch/arm/dts/s5p4418.dtsi +++ b/arch/arm/dts/s5p4418.dtsi @@ -95,7 +95,7 @@ compatible = "nexell,nexell-display"; reg = <0xc0102800 0x100>; index = <0>; - u-boot,dm-pre-reloc; + bootph-all; status = "disabled"; }; @@ -165,7 +165,7 @@ pinctrl@C0010000 { compatible = "nexell,s5pxx18-pinctrl"; reg = <0xc0010000 0xf000>; - u-boot,dm-pre-reloc; + bootph-all; }; uart0:uart@c00a1000 { diff --git a/arch/arm/dts/s700-u-boot.dtsi b/arch/arm/dts/s700-u-boot.dtsi index 3c3396bccf..d21baf1053 100644 --- a/arch/arm/dts/s700-u-boot.dtsi +++ b/arch/arm/dts/s700-u-boot.dtsi @@ -5,7 +5,7 @@ /{ soc { - u-boot,dm-pre-reloc; + bootph-all; gmac: ethernet@e0220000 { compatible = "actions,s700-ethernet"; @@ -33,9 +33,9 @@ }; &uart3 { - u-boot,dm-pre-reloc; + bootph-all; }; &cmu { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/s900-u-boot.dtsi b/arch/arm/dts/s900-u-boot.dtsi index a95f2cc628..4f47486aac 100644 --- a/arch/arm/dts/s900-u-boot.dtsi +++ b/arch/arm/dts/s900-u-boot.dtsi @@ -4,14 +4,14 @@ /{ soc { - u-boot,dm-pre-reloc; + bootph-all; }; }; &uart5 { - u-boot,dm-pre-reloc; + bootph-all; }; &cmu { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/sam9x60ek-u-boot.dtsi b/arch/arm/dts/sam9x60ek-u-boot.dtsi index 8c63ed869c..fd2afa8a2f 100644 --- a/arch/arm/dts/sam9x60ek-u-boot.dtsi +++ b/arch/arm/dts/sam9x60ek-u-boot.dtsi @@ -7,74 +7,74 @@ / { chosen { - u-boot,dm-pre-reloc; + bootph-all; }; ahb { - u-boot,dm-pre-reloc; + bootph-all; apb { - u-boot,dm-pre-reloc; + bootph-all; pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; }; &clk32 { - u-boot,dm-pre-reloc; + bootph-all; }; &dbgu { - u-boot,dm-pre-reloc; + bootph-all; }; &main_rc { - u-boot,dm-pre-reloc; + bootph-all; }; &main_xtal { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_dbgu { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_qspi { - u-boot,dm-pre-reloc; + bootph-all; }; &pioA { - u-boot,dm-pre-reloc; + bootph-all; }; &pioB { - u-boot,dm-pre-reloc; + bootph-all; }; &pmc { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; }; &slow_xtal { - u-boot,dm-pre-reloc; + bootph-all; }; &slow_rc_osc { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi index 187c2ff2fb..dd6468ed96 100644 --- a/arch/arm/dts/sama5d2.dtsi +++ b/arch/arm/dts/sama5d2.dtsi @@ -32,7 +32,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; usb1: ohci@400000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; @@ -70,7 +70,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; hlcdc: hlcdc@f0000000 { compatible = "atmel,at91sam9x5-hlcdc"; @@ -84,12 +84,12 @@ reg = <0xf0014000 0x160>; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; main: mainck { compatible = "atmel,at91sam9x5-clk-main"; #clock-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; plla: pllack@0 { @@ -100,7 +100,7 @@ atmel,clk-input-range = <12000000 12000000>; #atmel,pll-clk-output-range-cells = <4>; atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>; - u-boot,dm-pre-reloc; + bootph-all; }; plladiv: plladivck { @@ -132,7 +132,7 @@ #clock-cells = <0>; clocks = <&main>; regmap-sfr = <&sfr>; - u-boot,dm-pre-reloc; + bootph-all; }; mck: masterck { @@ -141,14 +141,14 @@ clocks = <&main>, <&plladiv>, <&utmi>; atmel,clk-output-range = <124000000 166000000>; atmel,clk-divisors = <1 2 4 3>; - u-boot,dm-pre-reloc; + bootph-all; }; h32ck: h32mxck { #clock-cells = <0>; compatible = "atmel,sama5d4-clk-h32mx"; clocks = <&mck>; - u-boot,dm-pre-reloc; + bootph-all; }; usb: usbck { @@ -239,7 +239,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&h32ck>; - u-boot,dm-pre-reloc; + bootph-all; macb0_clk: macb0_clk@5 { #clock-cells = <0>; @@ -267,7 +267,7 @@ #clock-cells = <0>; reg = <18>; atmel,clk-output-range = <0 83000000>; - u-boot,dm-pre-reloc; + bootph-all; }; flx0_clk: flx0_clk@19 { @@ -304,21 +304,21 @@ #clock-cells = <0>; reg = <24>; atmel,clk-output-range = <0 83000000>; - u-boot,dm-pre-reloc; + bootph-all; }; uart1_clk: uart1_clk@25 { #clock-cells = <0>; reg = <25>; atmel,clk-output-range = <0 83000000>; - u-boot,dm-pre-reloc; + bootph-all; }; uart2_clk: uart2_clk@26 { #clock-cells = <0>; reg = <26>; atmel,clk-output-range = <0 83000000>; - u-boot,dm-pre-reloc; + bootph-all; }; uart3_clk: uart3_clk@27 { @@ -349,7 +349,7 @@ #clock-cells = <0>; reg = <33>; atmel,clk-output-range = <0 83000000>; - u-boot,dm-pre-reloc; + bootph-all; }; spi1_clk: spi1_clk@34 { @@ -362,7 +362,7 @@ #clock-cells = <0>; reg = <35>; atmel,clk-output-range = <0 83000000>; - u-boot,dm-pre-reloc; + bootph-all; }; tcb1_clk: tcb1_clk@36 { @@ -455,7 +455,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; - u-boot,dm-pre-reloc; + bootph-all; dma0_clk: dma0_clk@6 { #clock-cells = <0>; @@ -495,13 +495,13 @@ sdmmc0_hclk: sdmmc0_hclk@31 { #clock-cells = <0>; reg = <31>; - u-boot,dm-pre-reloc; + bootph-all; }; sdmmc1_hclk: sdmmc1_hclk@32 { #clock-cells = <0>; reg = <32>; - u-boot,dm-pre-reloc; + bootph-all; }; lcdc_clk: lcdc_clk@45 { @@ -517,13 +517,13 @@ qspi0_clk: qspi0_clk@52 { #clock-cells = <0>; reg = <52>; - u-boot,dm-pre-reloc; + bootph-all; }; qspi1_clk: qspi1_clk@53 { #clock-cells = <0>; reg = <53>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -533,18 +533,18 @@ #size-cells = <0>; interrupt-parent = <&pmc>; clocks = <&main>, <&plla>, <&utmi>, <&mck>; - u-boot,dm-pre-reloc; + bootph-all; sdmmc0_gclk: sdmmc0_gclk@31 { #clock-cells = <0>; reg = <31>; - u-boot,dm-pre-reloc; + bootph-all; }; sdmmc1_gclk: sdmmc1_gclk@32 { #clock-cells = <0>; reg = <32>; - u-boot,dm-pre-reloc; + bootph-all; }; tcb0_gclk: tcb0_gclk@35 { @@ -648,12 +648,12 @@ clock-names = "t0_clk", "gclk", "slow_clk"; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; timer0: timer@0 { compatible = "atmel,tcb-timer"; reg = <0>, <1>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -804,7 +804,7 @@ clocks = <&pioA_clk>; gpio-controller; #gpio-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/sama5d27_som1.dtsi b/arch/arm/dts/sama5d27_som1.dtsi index f920077449..d0c3b758e2 100644 --- a/arch/arm/dts/sama5d27_som1.dtsi +++ b/arch/arm/dts/sama5d27_som1.dtsi @@ -63,7 +63,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_qspi1_sck_cs_default &pinctrl_qspi1_dat_default>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; spi_flash@0 { compatible = "jedec,spi-nor"; @@ -71,7 +71,7 @@ spi-max-frequency = <50000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <4>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -139,7 +139,7 @@ pinmux = <PIN_PB5__QSPI1_SCK>, <PIN_PB6__QSPI1_CS>; bias-disable; - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl_qspi1_dat_default: qspi1_dat_default { @@ -148,7 +148,7 @@ <PIN_PB9__QSPI1_IO2>, <PIN_PB10__QSPI1_IO3>; bias-pull-up; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/sama5d3.dtsi b/arch/arm/dts/sama5d3.dtsi index 42c30e9f30..4c03a302ec 100644 --- a/arch/arm/dts/sama5d3.dtsi +++ b/arch/arm/dts/sama5d3.dtsi @@ -89,14 +89,14 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; apb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; mmc0: mmc@f0000000 { compatible = "atmel,hsmci"; @@ -479,7 +479,7 @@ }; pinctrl@fffff200 { - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <1>; compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus"; @@ -556,9 +556,9 @@ }; dbgu { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_dbgu: dbgu-0 { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */ AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */ @@ -619,23 +619,23 @@ }; mmc0 { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */ AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */ AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */ }; pinctrl_mmc0_dat1_3: mmc0_dat1_3 { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */ AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */ AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */ }; pinctrl_mmc0_dat4_7: mmc0_dat4_7 { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */ AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */ @@ -645,16 +645,16 @@ }; mmc1 { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */ AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */ AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */ }; pinctrl_mmc1_dat1_3: mmc1_dat1_3 { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */ AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */ @@ -749,9 +749,9 @@ }; spi0 { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_spi0: spi0-0 { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */ AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */ @@ -760,9 +760,9 @@ }; spi1 { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_spi1: spi1-0 { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */ AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */ @@ -884,7 +884,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioA_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioB: gpio@fffff400 { @@ -896,7 +896,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioB_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioC: gpio@fffff600 { @@ -908,7 +908,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioC_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioD: gpio@fffff800 { @@ -920,7 +920,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioD_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioE: gpio@fffffa00 { @@ -932,7 +932,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioE_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pmc: pmc@fffffc00 { @@ -943,7 +943,7 @@ #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; main_rc_osc: main_rc_osc { compatible = "atmel,at91sam9x5-clk-main-rc-osc"; @@ -995,7 +995,7 @@ interrupts = <AT91_PMC_LOCKU>; clocks = <&main>; regmap-sfr = <&sfr>; - u-boot,dm-pre-reloc; + bootph-all; }; mck: masterck { @@ -1006,7 +1006,7 @@ clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; atmel,clk-output-range = <0 166000000>; atmel,clk-divisors = <1 2 4 3>; - u-boot,dm-pre-reloc; + bootph-all; }; usb: usbck { @@ -1100,10 +1100,10 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; - u-boot,dm-pre-reloc; + bootph-all; dbgu_clk: dbgu_clk@2 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <2>; }; @@ -1114,31 +1114,31 @@ }; pioA_clk: pioA_clk@6 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <6>; }; pioB_clk: pioB_clk@7 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <7>; }; pioC_clk: pioC_clk@8 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <8>; }; pioD_clk: pioD_clk@9 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <9>; }; pioE_clk: pioE_clk@10 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <10>; }; @@ -1192,26 +1192,26 @@ }; mci0_clk: mci0_clk@21 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <21>; }; mci1_clk: mci1_clk@22 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <22>; }; spi0_clk: spi0_clk@24 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <24>; atmel,clk-output-range = <0 133000000>; }; spi1_clk: spi1_clk@25 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <25>; atmel,clk-output-range = <0 133000000>; @@ -1320,7 +1320,7 @@ reg = <0xfffffe30 0xf>; interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; clocks = <&mck>; - u-boot,dm-pre-reloc; + bootph-all; }; watchdog@fffffe40 { diff --git a/arch/arm/dts/sama5d3xdm.dtsi b/arch/arm/dts/sama5d3xdm.dtsi index b3df9af2b4..865e3fa203 100644 --- a/arch/arm/dts/sama5d3xdm.dtsi +++ b/arch/arm/dts/sama5d3xdm.dtsi @@ -17,10 +17,10 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888_alt>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; display-timings { - u-boot,dm-pre-reloc; + bootph-all; 800x480 { clock-frequency = <24000000>; hactive = <800>; @@ -31,7 +31,7 @@ vfront-porch = <22>; vback-porch = <21>; vsync-len = <5>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/sama5d3xmb.dtsi b/arch/arm/dts/sama5d3xmb.dtsi index 906f3ce8c9..3dd9bf8658 100644 --- a/arch/arm/dts/sama5d3xmb.dtsi +++ b/arch/arm/dts/sama5d3xmb.dtsi @@ -12,7 +12,7 @@ compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &dbgu; }; @@ -22,7 +22,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; slot@0 { reg = <0>; bus-width = <4>; @@ -32,13 +32,13 @@ spi0: spi@f0004000 { dmas = <0>, <0>; /* Do not use DMA for spi0 */ - u-boot,dm-pre-reloc; + bootph-all; spi_flash@0 { compatible = "jedec,spi-nor"; spi-max-frequency = <50000000>; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -105,7 +105,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; slot@0 { reg = <0>; bus-width = <4>; @@ -140,15 +140,15 @@ pinctrl@fffff200 { board { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_mmc0_cd: mmc0_cd { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD17 GPIO with pullup deglitch */ }; pinctrl_mmc1_cd: mmc1_cd { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD18 GPIO with pullup deglitch */ }; @@ -183,7 +183,7 @@ dbgu: serial@ffffee00 { dmas = <0>, <0>; /* Do not use DMA for dbgu */ status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; watchdog@fffffe40 { diff --git a/arch/arm/dts/sama5d3xmb_cmp.dtsi b/arch/arm/dts/sama5d3xmb_cmp.dtsi index c6bf0f50fd..098209c5ca 100644 --- a/arch/arm/dts/sama5d3xmb_cmp.dtsi +++ b/arch/arm/dts/sama5d3xmb_cmp.dtsi @@ -11,7 +11,7 @@ compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; chosen { - u-boot,dm-pre-reloc; + bootph-all; stdout-path = &dbgu; }; @@ -180,7 +180,7 @@ dbgu: serial@ffffee00 { dmas = <0>, <0>; /* Do not use DMA for dbgu */ status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; watchdog@fffffe40 { diff --git a/arch/arm/dts/sama5d4.dtsi b/arch/arm/dts/sama5d4.dtsi index e1df24cdbe..5e2c9a1db2 100644 --- a/arch/arm/dts/sama5d4.dtsi +++ b/arch/arm/dts/sama5d4.dtsi @@ -123,7 +123,7 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; usb0: gadget@00400000 { #address-cells = <1>; @@ -317,7 +317,7 @@ #address-cells = <1>; #size-cells = <1>; ranges; - u-boot,dm-pre-reloc; + bootph-all; hlcdc: hlcdc@f0000000 { compatible = "atmel,at91sam9x5-hlcdc"; @@ -376,7 +376,7 @@ #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; main_rc_osc: main_rc_osc { compatible = "atmel,at91sam9x5-clk-main-rc-osc"; @@ -401,7 +401,7 @@ interrupt-parent = <&pmc>; interrupts = <AT91_PMC_MOSCSELS>; clocks = <&main_rc_osc &main_osc>; - u-boot,dm-pre-reloc; + bootph-all; }; plla: pllack@0 { @@ -428,7 +428,7 @@ interrupt-parent = <&pmc>; interrupts = <AT91_PMC_LOCKU>; clocks = <&main>; - u-boot,dm-pre-reloc; + bootph-all; }; mck: masterck { @@ -445,7 +445,7 @@ #clock-cells = <0>; compatible = "atmel,sama5d4-clk-h32mx"; clocks = <&mck>; - u-boot,dm-pre-reloc; + bootph-all; }; usb: usbck { @@ -490,7 +490,7 @@ compatible = "atmel,at91rm9200-clk-system"; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; ddrck: ddrck@2 { #clock-cells = <0>; @@ -546,10 +546,10 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&h32ck>; - u-boot,dm-pre-reloc; + bootph-all; pioD_clk: pioD_clk@5 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <5>; }; @@ -595,25 +595,25 @@ }; pioA_clk: pioA_clk@23 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <23>; }; pioB_clk: pioB_clk@24 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <24>; }; pioC_clk: pioC_clk@25 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <25>; }; pioE_clk: pioE_clk@26 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <26>; }; @@ -634,7 +634,7 @@ }; usart3_clk: usart3_clk@30 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <30>; }; @@ -665,13 +665,13 @@ }; mci1_clk: mci1_clk@36 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <36>; }; spi0_clk: spi0_clk@37 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; reg = <37>; }; @@ -1392,7 +1392,7 @@ interrupt-controller; #interrupt-cells = <2>; clocks = <&pioC_clk>; - u-boot,dm-pre-reloc; + bootph-all; }; pioD: gpio@fc068000 { @@ -1418,7 +1418,7 @@ }; pinctrl@fc06a000 { - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <1>; compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; @@ -1709,9 +1709,9 @@ }; mmc1 { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* MCI1_CK */ AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_CDA */ @@ -1719,7 +1719,7 @@ >; }; pinctrl_mmc1_dat1_3: mmc1_dat1_3 { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA1 */ AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA2 */ @@ -1751,9 +1751,9 @@ }; spi0 { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_spi0: spi0-0 { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MISO */ AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MOSI */ @@ -1878,9 +1878,9 @@ }; usart3 { - u-boot,dm-pre-reloc; + bootph-all; pinctrl_usart3: usart3-0 { - u-boot,dm-pre-reloc; + bootph-all; atmel,pins = <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */ AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */ diff --git a/arch/arm/dts/socfpga-common-u-boot.dtsi b/arch/arm/dts/socfpga-common-u-boot.dtsi index d55460755f..eb3d103931 100644 --- a/arch/arm/dts/socfpga-common-u-boot.dtsi +++ b/arch/arm/dts/socfpga-common-u-boot.dtsi @@ -6,22 +6,22 @@ */ /{ soc { - u-boot,dm-pre-reloc; + bootph-all; }; }; &clkmgr { - u-boot,dm-pre-reloc; + bootph-all; }; &rst { - u-boot,dm-pre-reloc; + bootph-all; }; &sdr { - u-boot,dm-pre-reloc; + bootph-all; }; &sysmgr { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/socfpga_agilex-u-boot.dtsi b/arch/arm/dts/socfpga_agilex-u-boot.dtsi index 08f7cf7f7a..4d7680455b 100644 --- a/arch/arm/dts/socfpga_agilex-u-boot.dtsi +++ b/arch/arm/dts/socfpga_agilex-u-boot.dtsi @@ -11,22 +11,22 @@ memory { #address-cells = <2>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; }; soc { - u-boot,dm-pre-reloc; + bootph-all; ccu: cache-controller@f7000000 { compatible = "arteris,ncore-ccu"; reg = <0xf7000000 0x100900>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; &clkmgr { - u-boot,dm-pre-reloc; + bootph-all; }; &gmac1 { @@ -66,13 +66,13 @@ }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; }; &rst { compatible = "altr,rst-mgr"; altr,modrst-offset = <0x20>; - u-boot,dm-pre-reloc; + bootph-all; }; &sdr { @@ -81,18 +81,18 @@ <0xf8010000 0x190>, <0xf8011000 0x500>; resets = <&rst DDRSCH_RESET>; - u-boot,dm-pre-reloc; + bootph-all; }; &sysmgr { compatible = "altr,sys-mgr", "syscon"; - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &watchdog0 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi index 2400fad18a..63df28e836 100644 --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi @@ -33,7 +33,7 @@ compatible = "jedec,spi-nor"; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; - u-boot,dm-pre-reloc; + bootph-all; }; &i2c1 { @@ -43,7 +43,7 @@ &mmc { drvsel = <3>; smplsel = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { @@ -51,5 +51,5 @@ }; &watchdog0 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/socfpga_arria10-handoff.dtsi b/arch/arm/dts/socfpga_arria10-handoff.dtsi index c08371625e..a3afb4d9df 100644 --- a/arch/arm/dts/socfpga_arria10-handoff.dtsi +++ b/arch/arm/dts/socfpga_arria10-handoff.dtsi @@ -4,14 +4,14 @@ clocks { #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; altera_arria10_hps_eosc1: altera_arria10_hps_eosc1 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <EOSC1_CLK_HZ>; clock-output-names = "altera_arria10_hps_eosc1-clk"; - u-boot,dm-pre-reloc; + bootph-all; }; altera_arria10_hps_cb_intosc_ls: altera_arria10_hps_cb_intosc_ls { @@ -19,7 +19,7 @@ #clock-cells = <0>; clock-frequency = <CB_INTOSC_LS_CLK_HZ>; clock-output-names = "altera_arria10_hps_cb_intosc_ls-clk"; - u-boot,dm-pre-reloc; + bootph-all; }; /* Clock source: altera_arria10_hps_f2h_free */ @@ -28,7 +28,7 @@ #clock-cells = <0>; clock-frequency = <F2H_FREE_CLK_HZ>; clock-output-names = "altera_arria10_hps_f2h_free-clk"; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -36,7 +36,7 @@ compatible = "altr,socfpga-a10-clk-init"; reg = <0xffd04000 0x00000200>; reg-names = "soc_clock_manager_OCP_SLV"; - u-boot,dm-pre-reloc; + bootph-all; mainpll { vco0-psrc = <MAINPLLGRP_VCO0_PSRC>; @@ -63,7 +63,7 @@ nocdiv-csatclk = <MAINPLLGRP_NOCDIV_CSATCLK>; nocdiv-cstraceclk = <MAINPLLGRP_NOCDIV_CSTRACECLK>; nocdiv-cspdbgclk = <MAINPLLGRP_NOCDIV_CSPDBGCLK>; - u-boot,dm-pre-reloc; + bootph-all; }; perpll { @@ -88,13 +88,13 @@ emacctl-emac1sel = <PERPLLGRP_EMACCTL_EMAC1SEL>; emacctl-emac2sel = <PERPLLGRP_EMACCTL_EMAC2SEL>; gpiodiv-gpiodbclk = <PERPLLGRP_GPIODIV_GPIODBCLK>; - u-boot,dm-pre-reloc; + bootph-all; }; alteragrp { nocclk = <ALTERAGRP_NOCCLK>; mpuclk = <ALTERAGRP_MPUCLK>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -104,7 +104,7 @@ compatible = "pinctrl-single"; reg = <0xffd07000 0x00000800>; reg-names = "soc_3v_io48_pin_mux_OCP_SLV"; - u-boot,dm-pre-reloc; + bootph-all; shared { reg = <0xffd07000 0x00000200>; @@ -159,7 +159,7 @@ <0x000000b4 PINMUX_SHARED_IO_Q4_10_SEL>, <0x000000b8 PINMUX_SHARED_IO_Q4_11_SEL>, <0x000000bc PINMUX_SHARED_IO_Q4_12_SEL>; - u-boot,dm-pre-reloc; + bootph-all; }; dedicated { @@ -181,7 +181,7 @@ <0x00000038 PINMUX_DEDICATED_IO_15_SEL>, <0x0000003c PINMUX_DEDICATED_IO_16_SEL>, <0x00000040 PINMUX_DEDICATED_IO_17_SEL>; - u-boot,dm-pre-reloc; + bootph-all; }; dedicated_cfg { @@ -207,7 +207,7 @@ <0x0000013c CONFIG_IO_MACRO (CONFIG_IO_15)>, <0x00000140 CONFIG_IO_MACRO (CONFIG_IO_16)>, <0x00000144 CONFIG_IO_MACRO (CONFIG_IO_17)>; - u-boot,dm-pre-reloc; + bootph-all; }; fpga { @@ -232,7 +232,7 @@ <0x00000038 PINMUX_SPIS1_USEFPGA_SEL>, <0x0000003c PINMUX_UART0_USEFPGA_SEL>, <0x00000040 PINMUX_UART1_USEFPGA_SEL>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -240,7 +240,7 @@ compatible = "altr,socfpga-a10-noc"; reg = <0xffd10000 0x00008000>; reg-names = "mpu_m0"; - u-boot,dm-pre-reloc; + bootph-all; firewall { mpu0 = <0x00000000 0x0000ffff>; @@ -248,43 +248,43 @@ fpga2sdram0-0 = <0x00000000 0x0000ffff>; fpga2sdram1-0 = <0x00000000 0x0000ffff>; fpga2sdram2-0 = <0x00000000 0x0000ffff>; - u-boot,dm-pre-reloc; + bootph-all; }; }; hps_fpgabridge0: fpgabridge@0 { compatible = "altr,socfpga-hps2fpga-bridge"; init-val = <H2F_AXI_MASTER>; - u-boot,dm-pre-reloc; + bootph-all; }; hps_fpgabridge1: fpgabridge@1 { compatible = "altr,socfpga-lwhps2fpga-bridge"; init-val = <LWH2F_AXI_MASTER>; - u-boot,dm-pre-reloc; + bootph-all; }; hps_fpgabridge2: fpgabridge@2 { compatible = "altr,socfpga-fpga2hps-bridge"; init-val = <F2H_AXI_SLAVE>; - u-boot,dm-pre-reloc; + bootph-all; }; hps_fpgabridge3: fpgabridge@3 { compatible = "altr,socfpga-fpga2sdram0-bridge"; init-val = <F2SDRAM0_AXI_SLAVE>; - u-boot,dm-pre-reloc; + bootph-all; }; hps_fpgabridge4: fpgabridge@4 { compatible = "altr,socfpga-fpga2sdram1-bridge"; init-val = <F2SDRAM1_AXI_SLAVE>; - u-boot,dm-pre-reloc; + bootph-all; }; hps_fpgabridge5: fpgabridge@5 { compatible = "altr,socfpga-fpga2sdram2-bridge"; init-val = <F2SDRAM2_AXI_SLAVE>; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/socfpga_arria10-u-boot.dtsi b/arch/arm/dts/socfpga_arria10-u-boot.dtsi index 6ff1ea6e5e..2ed532ffb5 100644 --- a/arch/arm/dts/socfpga_arria10-u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria10-u-boot.dtsi @@ -6,36 +6,36 @@ / { chosen { tick-timer = &timer2; - u-boot,dm-pre-reloc; + bootph-all; }; memory@0 { - u-boot,dm-pre-reloc; + bootph-all; }; soc { - u-boot,dm-pre-reloc; + bootph-all; }; }; &clkmgr { - u-boot,dm-pre-reloc; + bootph-all; clocks { - u-boot,dm-pre-reloc; + bootph-all; }; }; &cb_intosc_hs_div2_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &cb_intosc_ls_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &f2s_free_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &gmac0 { @@ -74,47 +74,47 @@ }; &L2 { - u-boot,dm-pre-reloc; + bootph-all; }; &l4_mp_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &l4_sp_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &l4_sys_free_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &main_periph_ref_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &main_pll { - u-boot,dm-pre-reloc; + bootph-all; }; &main_noc_base_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &noc_free_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &osc1 { - u-boot,dm-pre-reloc; + bootph-all; }; &peri_noc_base_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &periph_pll { - u-boot,dm-pre-reloc; + bootph-all; }; &porta { @@ -130,13 +130,13 @@ }; &rst { - u-boot,dm-pre-reloc; + bootph-all; }; &sysmgr { - u-boot,dm-pre-reloc; + bootph-all; }; &timer2 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi b/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi index ef215230c2..3396fb8003 100644 --- a/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi @@ -2,90 +2,90 @@ / { chosen { - u-boot,dm-pre-reloc; + bootph-all; }; clocks { - u-boot,dm-pre-reloc; + bootph-all; altera_arria10_hps_eosc1 { - u-boot,dm-pre-reloc; + bootph-all; }; altera_arria10_hps_cb_intosc_ls { - u-boot,dm-pre-reloc; + bootph-all; }; altera_arria10_hps_f2h_free { - u-boot,dm-pre-reloc; + bootph-all; }; }; clock_manager@0xffd04000 { - u-boot,dm-pre-reloc; + bootph-all; mainpll { - u-boot,dm-pre-reloc; + bootph-all; }; perpll { - u-boot,dm-pre-reloc; + bootph-all; }; alteragrp { - u-boot,dm-pre-reloc; + bootph-all; }; }; pinmux@0xffd07000 { - u-boot,dm-pre-reloc; + bootph-all; shared { - u-boot,dm-pre-reloc; + bootph-all; }; dedicated { - u-boot,dm-pre-reloc; + bootph-all; }; dedicated_cfg { - u-boot,dm-pre-reloc; + bootph-all; }; fpga { - u-boot,dm-pre-reloc; + bootph-all; }; }; noc@0xffd10000 { - u-boot,dm-pre-reloc; + bootph-all; firewall { - u-boot,dm-pre-reloc; + bootph-all; }; }; fpgabridge@0 { - u-boot,dm-pre-reloc; + bootph-all; }; fpgabridge@1 { - u-boot,dm-pre-reloc; + bootph-all; }; fpgabridge@2 { - u-boot,dm-pre-reloc; + bootph-all; }; fpgabridge@3 { - u-boot,dm-pre-reloc; + bootph-all; }; fpgabridge@4 { - u-boot,dm-pre-reloc; + bootph-all; }; fpgabridge@5 { - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi index 365e05100a..8866df3ddd 100644 --- a/arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi @@ -10,45 +10,45 @@ }; fs_loader0: fs-loader { - u-boot,dm-pre-reloc; + bootph-all; compatible = "u-boot,fs-loader"; phandlepart = <&mmc 1>; }; }; &atsha204a { - u-boot,dm-pre-reloc; + bootph-all; }; &fpga_mgr { - u-boot,dm-pre-reloc; + bootph-all; altr,bitstream = "fpga.itb"; }; &i2c1 { - u-boot,dm-pre-reloc; + bootph-all; }; &main_sdmmc_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc { - u-boot,dm-pre-reloc; + bootph-all; }; &peri_sdmmc_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_free_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi index 22e614d04c..56d50ecee3 100644 --- a/arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi @@ -13,9 +13,9 @@ }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &watchdog1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi index 298c337ed7..10f8a959a0 100644 --- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi @@ -14,34 +14,34 @@ }; fs_loader0: fs-loader { - u-boot,dm-pre-reloc; + bootph-all; compatible = "u-boot,fs-loader"; phandlepart = <&mmc 1>; }; }; &fpga_mgr { - u-boot,dm-pre-reloc; + bootph-all; altr,bitstream = "fit_spl_fpga.itb"; }; &mmc { - u-boot,dm-pre-reloc; + bootph-all; }; /* Clock available early */ &main_sdmmc_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &peri_sdmmc_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_free_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc_clk { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/socfpga_arria5_secu1.dts b/arch/arm/dts/socfpga_arria5_secu1.dts index cfe3e67df4..8e9c3bbdf9 100644 --- a/arch/arm/dts/socfpga_arria5_secu1.dts +++ b/arch/arm/dts/socfpga_arria5_secu1.dts @@ -97,7 +97,7 @@ vmmc-supply = <®ulator_3_3v>; vqmmc-supply = <®ulator_3_3v>; bus-width = <4>; - u-boot,dm-pre-reloc; + bootph-all; }; &nand0 { @@ -122,7 +122,7 @@ &uart0 { clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; @@ -131,6 +131,6 @@ }; &watchdog0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi index dfaff4c0f7..62116faafa 100644 --- a/arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi @@ -20,21 +20,21 @@ }; &mmc { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; }; &flash { compatible = "n25q00", "jedec,spi-nor"; - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { diff --git a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts index 6439daa525..ca030c8c41 100644 --- a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts +++ b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts @@ -58,7 +58,7 @@ &mmc0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; &usb1 { @@ -67,7 +67,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &watchdog0 { diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi index 0219c6948d..8d2caf69dd 100644 --- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi +++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi @@ -19,12 +19,12 @@ }; &mmc { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { diff --git a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts index 4be4083941..34886ec1ad 100644 --- a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts +++ b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts @@ -69,7 +69,7 @@ &mmc0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; &usb1 { @@ -78,7 +78,7 @@ &uart0 { clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &watchdog0 { diff --git a/arch/arm/dts/socfpga_cyclone5_de10_standard.dts b/arch/arm/dts/socfpga_cyclone5_de10_standard.dts index 39bce3b2ac..b38f072382 100644 --- a/arch/arm/dts/socfpga_cyclone5_de10_standard.dts +++ b/arch/arm/dts/socfpga_cyclone5_de10_standard.dts @@ -69,7 +69,7 @@ &mmc0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; &usb1 { @@ -78,7 +78,7 @@ &uart0 { clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &watchdog0 { diff --git a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts index b71496bfb5..e9de72429f 100644 --- a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts +++ b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts @@ -67,7 +67,7 @@ &mmc0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; &usb1 { @@ -76,7 +76,7 @@ &uart0 { clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &watchdog0 { diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts b/arch/arm/dts/socfpga_cyclone5_is1.dts index a769498791..58a5faf6ea 100644 --- a/arch/arm/dts/socfpga_cyclone5_is1.dts +++ b/arch/arm/dts/socfpga_cyclone5_is1.dts @@ -73,7 +73,7 @@ &mmc0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; cd-gpios = <&portb 18 0>; vmmc-supply = <®ulator_3_3v>; @@ -82,10 +82,10 @@ &qspi { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; flash0: n25q00@0 { - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <1>; compatible = "n25q00", "jedec,spi-nor"; @@ -106,7 +106,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &watchdog0 { diff --git a/arch/arm/dts/socfpga_cyclone5_mcvevk-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_mcvevk-u-boot.dtsi index eea453b8ad..4cadfcd4f1 100644 --- a/arch/arm/dts/socfpga_cyclone5_mcvevk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_cyclone5_mcvevk-u-boot.dtsi @@ -13,12 +13,12 @@ }; &mmc { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &porta { diff --git a/arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi index d24f621cd6..bca4b0887b 100644 --- a/arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi @@ -24,16 +24,16 @@ }; &mmc { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; }; &flash0 { compatible = "n25q00", "jedec,spi-nor"; - u-boot,dm-pre-reloc; + bootph-all; partition@qspi-boot { /* 8MB for raw data. */ @@ -50,7 +50,7 @@ &uart0 { clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { diff --git a/arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi index 85cc396a70..4b99a24701 100644 --- a/arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi +++ b/arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi @@ -20,21 +20,21 @@ }; &mmc { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; }; &flash { compatible = "n25q00", "jedec,spi-nor"; - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { diff --git a/arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi index 0a4d54e304..12c70c1537 100644 --- a/arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi +++ b/arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi @@ -20,21 +20,21 @@ }; &mmc { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; }; &flash { compatible = "n25q256a", "jedec,spi-nor"; - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { diff --git a/arch/arm/dts/socfpga_cyclone5_sr1500.dts b/arch/arm/dts/socfpga_cyclone5_sr1500.dts index bb29da6d6c..56031e576f 100644 --- a/arch/arm/dts/socfpga_cyclone5_sr1500.dts +++ b/arch/arm/dts/socfpga_cyclone5_sr1500.dts @@ -72,12 +72,12 @@ &mmc0 { status = "okay"; bus-width = <8>; - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; &usb1 { @@ -90,10 +90,10 @@ &qspi { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; flash0: n25q00@0 { - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <1>; compatible = "n25q00", "jedec,spi-nor"; diff --git a/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi index fb05c31d87..330949c018 100644 --- a/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi +++ b/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi @@ -20,21 +20,21 @@ }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; n25q128@0 { compatible = "n25q128", "jedec,spi-nor"; - u-boot,dm-pre-reloc; + bootph-all; }; n25q00@1 { compatible = "n25q00", "jedec,spi-nor"; - u-boot,dm-pre-reloc; + bootph-all; }; }; &uart0 { clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { @@ -54,5 +54,5 @@ }; &watchdog0 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/socfpga_n5x-u-boot.dtsi b/arch/arm/dts/socfpga_n5x-u-boot.dtsi index d377ae5f69..e27a64651e 100644 --- a/arch/arm/dts/socfpga_n5x-u-boot.dtsi +++ b/arch/arm/dts/socfpga_n5x-u-boot.dtsi @@ -12,16 +12,16 @@ memory { #address-cells = <2>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; }; soc { - u-boot,dm-pre-reloc; + bootph-all; ccu: cache-controller@f7000000 { compatible = "arteris,ncore-ccu"; reg = <0xf7000000 0x100900>; - u-boot,dm-pre-reloc; + bootph-all; }; clocks { @@ -42,7 +42,7 @@ &clkmgr { compatible = "intel,n5x-clkmgr"; - u-boot,dm-pre-reloc; + bootph-all; }; &gmac0 { @@ -85,7 +85,7 @@ }; &memclkmgr { - u-boot,dm-pre-reloc; + bootph-all; }; &mmc { @@ -107,13 +107,13 @@ }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; }; &rst { compatible = "altr,rst-mgr"; altr,modrst-offset = <0x20>; - u-boot,dm-pre-reloc; + bootph-all; }; &sdr { @@ -121,7 +121,7 @@ resets = <&rst DDRSCH_RESET>; clocks = <&memclkmgr>; clock-names = "mem_clk"; - u-boot,dm-pre-reloc; + bootph-all; }; &spi0 { @@ -134,7 +134,7 @@ &sysmgr { compatible = "altr,sys-mgr", "syscon"; - u-boot,dm-pre-reloc; + bootph-all; }; &timer0 { @@ -155,7 +155,7 @@ &uart0 { clocks = <&clkmgr N5X_L4_SP_CLK>; - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { @@ -165,17 +165,17 @@ &usb0 { clocks = <&clkmgr N5X_USB_CLK>; disable-over-current; - u-boot,dm-pre-reloc; + bootph-all; }; &usb1 { clocks = <&clkmgr N5X_USB_CLK>; - u-boot,dm-pre-reloc; + bootph-all; }; &watchdog0 { clocks = <&clkmgr N5X_L4_SYS_FREE_CLK>; - u-boot,dm-pre-reloc; + bootph-all; }; &watchdog1 { diff --git a/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi index 502da36bd8..840537c9d0 100644 --- a/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi @@ -41,7 +41,7 @@ compatible = "jedec,spi-nor"; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; - u-boot,dm-pre-reloc; + bootph-all; }; &i2c1 { @@ -51,7 +51,7 @@ &mmc { drvsel = <3>; smplsel = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { @@ -59,5 +59,5 @@ }; &watchdog0 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi index 7a7777202c..eb82d66320 100755 --- a/arch/arm/dts/socfpga_stratix10.dtsi +++ b/arch/arm/dts/socfpga_stratix10.dtsi @@ -80,7 +80,7 @@ device_type = "soc"; interrupt-parent = <&intc>; ranges = <0 0 0 0xffffffff>; - u-boot,dm-pre-reloc; + bootph-all; clkmgr: clkmgr@ffd10000 { compatible = "altr,clk-mgr"; @@ -228,7 +228,7 @@ interrupts = <0 96 4>; fifo-depth = <0x400>; resets = <&rst SDMMC_RESET>, <&rst SDMMC_OCP_RESET>; - u-boot,dm-pre-reloc; + bootph-all; status = "disabled"; }; @@ -255,7 +255,7 @@ compatible = "altr,rst-mgr"; reg = <0xffd11000 0x1000>; altr,modrst-offset = <0x20>; - u-boot,dm-pre-reloc; + bootph-all; }; sdr: sdr@f8000400 { @@ -264,7 +264,7 @@ <0xf8010000 0x190>, <0xf8011000 0x500>; resets = <&rst DDRSCH_RESET>; - u-boot,dm-pre-reloc; + bootph-all; }; spi0: spi@ffda4000 { @@ -341,7 +341,7 @@ reg-io-width = <4>; resets = <&rst UART0_RESET>; clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; status = "disabled"; }; diff --git a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi index 75a29045da..ef0df76976 100755 --- a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi @@ -23,12 +23,12 @@ }; &clkmgr { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; &flash0 { @@ -36,14 +36,14 @@ spi-max-frequency = <100000000>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; - u-boot,dm-pre-reloc; + bootph-all; }; &sysmgr { - u-boot,dm-pre-reloc; + bootph-all; }; &watchdog0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts index 8aa55a60ab..e6d8fe6a90 100755 --- a/arch/arm/dts/socfpga_stratix10_socdk.dts +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts @@ -43,7 +43,7 @@ /* 4GB */ reg = <0 0x00000000 0 0x80000000>, <1 0x80000000 0 0x80000000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/starqltechn-uboot.dtsi b/arch/arm/dts/starqltechn-uboot.dtsi index 8d5d09c3a5..d81a22ffe4 100644 --- a/arch/arm/dts/starqltechn-uboot.dtsi +++ b/arch/arm/dts/starqltechn-uboot.dtsi @@ -9,21 +9,21 @@ / { framebuffer@9D400000 { - u-boot,dm-pre-reloc; + bootph-all; }; soc { - u-boot,dm-pre-reloc; + bootph-all; serial@a84000 { - u-boot,dm-pre-reloc; + bootph-all; }; clock-controller@100000 { - u-boot,dm-pre-reloc; + bootph-all; }; gpio_north@3900000 { - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl_north@3900000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/stm32429i-eval-u-boot.dtsi b/arch/arm/dts/stm32429i-eval-u-boot.dtsi index 030da47b7a..e909653137 100644 --- a/arch/arm/dts/stm32429i-eval-u-boot.dtsi +++ b/arch/arm/dts/stm32429i-eval-u-boot.dtsi @@ -7,7 +7,7 @@ #include <dt-bindings/memory/stm32-sdram.h> /{ clocks { - u-boot,dm-pre-reloc; + bootph-all; }; aliases { @@ -26,9 +26,9 @@ }; soc { - u-boot,dm-pre-reloc; + bootph-all; pin-controller { - u-boot,dm-pre-reloc; + bootph-all; }; fmc: fmc@A0000000 { @@ -39,7 +39,7 @@ pinctrl-0 = <&fmc_pins_d32>; pinctrl-names = "default"; st,mem_remap = <4>; - u-boot,dm-pre-reloc; + bootph-all; /* * Memory configuration from sdram @@ -68,86 +68,86 @@ }; &clk_hse { - u-boot,dm-pre-reloc; + bootph-all; }; &clk_lse { - u-boot,dm-pre-reloc; + bootph-all; }; &clk_i2s_ckin { - u-boot,dm-pre-reloc; + bootph-all; }; &pwrcfg { - u-boot,dm-pre-reloc; + bootph-all; }; &syscfg { - u-boot,dm-pre-reloc; + bootph-all; }; &rcc { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioa { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiob { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioc { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiod { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioe { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiof { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiog { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioh { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioi { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioj { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiok { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { usart1_pins_a: usart1-0 { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; }; }; fmc_pins_d32: fmc_d32@0 { - u-boot,dm-pre-reloc; + bootph-all; pins { pinmux = <STM32_PINMUX('I',10, AF12)>, /* D31 */ @@ -213,11 +213,11 @@ <STM32_PINMUX('H', 2, AF12)>, /* SDCKE0 */ <STM32_PINMUX('G', 8, AF12)>; /* SDCLK> */ slew-rate = <2>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; &timers5 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/stm32746g-eval-u-boot.dtsi b/arch/arm/dts/stm32746g-eval-u-boot.dtsi index 8550ef7863..1c288acec9 100644 --- a/arch/arm/dts/stm32746g-eval-u-boot.dtsi +++ b/arch/arm/dts/stm32746g-eval-u-boot.dtsi @@ -39,7 +39,7 @@ * Memory configuration from sdram datasheet IS42S32800G-6BLI */ bank1: bank@0 { - u-boot,dm-pre-reloc; + bootph-all; st,sdram-control = /bits/ 8 <NO_COL_9 NO_ROW_12 MWIDTH_32 @@ -166,12 +166,12 @@ }; usart1_pins_a: usart1-0 { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi b/arch/arm/dts/stm32f429-disco-u-boot.dtsi index 45f899662d..9a3b4acfb1 100644 --- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi @@ -7,7 +7,7 @@ #include <dt-bindings/memory/stm32-sdram.h> /{ clocks { - u-boot,dm-pre-reloc; + bootph-all; }; aliases { @@ -26,7 +26,7 @@ }; soc { - u-boot,dm-pre-reloc; + bootph-all; fmc: fmc@A0000000 { compatible = "st,stm32-fmc"; reg = <0xa0000000 0x1000>; @@ -35,7 +35,7 @@ pinctrl-names = "default"; st,syscfg = <&syscfg>; st,swp_fmc = <1>; - u-boot,dm-pre-reloc; + bootph-all; /* * Memory configuration from sdram datasheet @@ -63,76 +63,76 @@ }; &clk_hse { - u-boot,dm-pre-reloc; + bootph-all; }; &clk_i2s_ckin { - u-boot,dm-pre-reloc; + bootph-all; }; &clk_lse { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioa { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiob { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioc { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiod { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioe { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiof { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiog { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioh { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioi { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioj { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiok { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; usart1_pins_a: usart1-0 { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; }; }; fmc_pins: fmc@0 { - u-boot,dm-pre-reloc; + bootph-all; pins { pinmux = <STM32_PINMUX('D',10, AF12)>, /* D15 */ @@ -178,19 +178,19 @@ <STM32_PINMUX('B', 5, AF12)>, /* SDCKE1 */ <STM32_PINMUX('G', 8, AF12)>; /* SDCLK */ slew-rate = <2>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; &pwrcfg { - u-boot,dm-pre-reloc; + bootph-all; }; &rcc { - u-boot,dm-pre-reloc; + bootph-all; }; &timers5 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi b/arch/arm/dts/stm32f469-disco-u-boot.dtsi index ee0c82b53e..c07e2022e4 100644 --- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi @@ -7,7 +7,7 @@ #include <dt-bindings/memory/stm32-sdram.h> /{ clocks { - u-boot,dm-pre-reloc; + bootph-all; }; aliases { @@ -27,7 +27,7 @@ }; soc { - u-boot,dm-pre-reloc; + bootph-all; fmc: fmc@A0000000 { compatible = "st,stm32-fmc"; @@ -37,7 +37,7 @@ pinctrl-0 = <&fmc_pins_d32>; pinctrl-names = "default"; st,mem_remap = <4>; - u-boot,dm-pre-reloc; + bootph-all; /* * Memory configuration from sdram @@ -79,66 +79,66 @@ }; &clk_hse { - u-boot,dm-pre-reloc; + bootph-all; }; &clk_i2s_ckin { - u-boot,dm-pre-reloc; + bootph-all; }; &clk_lse { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioa { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiob { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioc { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiod { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioe { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiof { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiog { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioh { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioi { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioj { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiok { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; fmc_pins_d32: fmc_d32@0 { - u-boot,dm-pre-reloc; + bootph-all; pins { pinmux = <STM32_PINMUX('I',10, AF12)>, /* D31 */ @@ -203,7 +203,7 @@ <STM32_PINMUX('H', 2, AF12)>, /* SDCKE0 */ <STM32_PINMUX('G', 8, AF12)>; /* SDCLK> */ slew-rate = <2>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -220,18 +220,18 @@ }; usart3_pins_a: usart3-0 { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; &pwrcfg { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { @@ -248,13 +248,13 @@ }; &rcc { - u-boot,dm-pre-reloc; + bootph-all; }; &syscfg { - u-boot,dm-pre-reloc; + bootph-all; }; &timers5 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/stm32f7-u-boot.dtsi b/arch/arm/dts/stm32f7-u-boot.dtsi index 0ba8031c33..efc4e2afe1 100644 --- a/arch/arm/dts/stm32f7-u-boot.dtsi +++ b/arch/arm/dts/stm32f7-u-boot.dtsi @@ -3,7 +3,7 @@ #include <dt-bindings/memory/stm32-sdram.h> /{ soc { - u-boot,dm-pre-reloc; + bootph-all; fmc: fmc@A0000000 { compatible = "st,stm32-fmc"; @@ -12,7 +12,7 @@ pinctrl-0 = <&fmc_pins>; pinctrl-names = "default"; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; mac: ethernet@40028000 { @@ -60,70 +60,70 @@ }; &clk_hse { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioa { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiob { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioc { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiod { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioe { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiof { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiog { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioh { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioi { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; fmc_pins: fmc@0 { - u-boot,dm-pre-reloc; + bootph-all; pins { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; &pwrcfg { - u-boot,dm-pre-reloc; + bootph-all; }; &rcc { - u-boot,dm-pre-reloc; + bootph-all; }; &timers5 { - u-boot,dm-pre-reloc; + bootph-all; }; &usart1 { - u-boot,dm-pre-reloc; + bootph-all; clocks = <&rcc 0 STM32F7_APB2_CLOCK(USART1)>; }; diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi index a4ce936d7d..19b5451db4 100644 --- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi @@ -73,7 +73,7 @@ pinctrl-0 = <<dc_pins>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; @@ -81,7 +81,7 @@ &fmc { /* Memory configuration from sdram datasheet MT48LC_4M32_B2B5-6A */ bank1: bank@0 { - u-boot,dm-pre-reloc; + bootph-all; st,sdram-control = /bits/ 8 <NO_COL_8 NO_ROW_12 MWIDTH_16 @@ -213,18 +213,18 @@ }; usart1_pins_b: usart1-1 { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; &pwrcfg { - u-boot,dm-pre-reloc; + bootph-all; }; &qspi { diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi b/arch/arm/dts/stm32f769-disco-u-boot.dtsi index 5589b41652..b5198fddff 100644 --- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi @@ -59,7 +59,7 @@ <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>, <&clk_hse>; clock-names = "pclk", "px_clk", "ref"; - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; ports { @@ -83,7 +83,7 @@ clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; ports { port@0 { @@ -99,7 +99,7 @@ &fmc { /* Memory configuration from sdram datasheet MT48LC_4M32_B2B5-6A */ bank1: bank@0 { - u-boot,dm-pre-reloc; + bootph-all; st,sdram-control = /bits/ 8 <NO_COL_8 NO_ROW_12 MWIDTH_32 @@ -216,12 +216,12 @@ }; usart1_pins_a: usart1-0 { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/stm32h7-u-boot.dtsi b/arch/arm/dts/stm32h7-u-boot.dtsi index 84dc7656d1..dea4db396c 100644 --- a/arch/arm/dts/stm32h7-u-boot.dtsi +++ b/arch/arm/dts/stm32h7-u-boot.dtsi @@ -4,7 +4,7 @@ /{ clocks { - u-boot,dm-pre-reloc; + bootph-all; }; aliases { @@ -24,9 +24,9 @@ }; soc { - u-boot,dm-pre-reloc; + bootph-all; pin-controller { - u-boot,dm-pre-reloc; + bootph-all; }; fmc: fmc@52004000 { @@ -42,83 +42,83 @@ }; &clk_hse { - u-boot,dm-pre-reloc; + bootph-all; }; &clk_i2s { - u-boot,dm-pre-reloc; + bootph-all; }; &clk_lse { - u-boot,dm-pre-reloc; + bootph-all; }; &fmc { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioa { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32-gpio"; }; &gpiob { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32-gpio"; }; &gpioc { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32-gpio"; }; &gpiod { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32-gpio"; }; &gpioe { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32-gpio"; }; &gpiof { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32-gpio"; }; &gpiog { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32-gpio"; }; &gpioh { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32-gpio"; }; &gpioi { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32-gpio"; }; &gpioj { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32-gpio"; }; &gpiok { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32-gpio"; }; &pwrcfg { - u-boot,dm-pre-reloc; + bootph-all; }; &rcc { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc1 { @@ -126,9 +126,9 @@ }; &timer5 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi b/arch/arm/dts/stm32mp13-u-boot.dtsi index 3730f474b2..726cd1a7e4 100644 --- a/arch/arm/dts/stm32mp13-u-boot.dtsi +++ b/arch/arm/dts/stm32mp13-u-boot.dtsi @@ -19,20 +19,20 @@ firmware { optee { - u-boot,dm-pre-reloc; + bootph-all; }; }; /* need PSCI for sysreset during board_f */ psci { - u-boot,dm-pre-proper; + bootph-some-ram; }; soc { - u-boot,dm-pre-reloc; + bootph-all; ddr: ddr@5a003000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32mp13-ddr"; @@ -45,77 +45,77 @@ }; &bsec { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioa { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiob { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioc { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiod { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioe { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiof { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiog { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioh { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioi { - u-boot,dm-pre-reloc; + bootph-all; }; &iwdg2 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &rcc { - u-boot,dm-pre-reloc; + bootph-all; }; &scmi { - u-boot,dm-pre-reloc; + bootph-all; }; &scmi_clk { - u-boot,dm-pre-reloc; + bootph-all; }; &scmi_reset { - u-boot,dm-pre-reloc; + bootph-all; }; &scmi_shm { - u-boot,dm-pre-reloc; + bootph-all; }; &scmi_sram { - u-boot,dm-pre-reloc; + bootph-all; }; &syscfg { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi index cbe4eb5608..48605ff8bb 100644 --- a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi +++ b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi @@ -26,15 +26,15 @@ }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/stm32mp15-ddr.dtsi b/arch/arm/dts/stm32mp15-ddr.dtsi index d02f79dac6..48b0828828 100644 --- a/arch/arm/dts/stm32mp15-ddr.dtsi +++ b/arch/arm/dts/stm32mp15-ddr.dtsi @@ -21,7 +21,7 @@ "ddrphycapb"; config-DDR_MEM_COMPATIBLE { - u-boot,dm-pre-reloc; + bootph-all; compatible = __stringify(st,DDR_MEM_COMPATIBLE); diff --git a/arch/arm/dts/stm32mp15-scmi-u-boot.dtsi b/arch/arm/dts/stm32mp15-scmi-u-boot.dtsi index 314fc39a05..7c8fec6cbf 100644 --- a/arch/arm/dts/stm32mp15-scmi-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15-scmi-u-boot.dtsi @@ -26,10 +26,10 @@ }; soc { - u-boot,dm-pre-reloc; + bootph-all; ddr: ddr@5a003000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32mp1-ddr"; @@ -42,73 +42,73 @@ /* need PSCI for sysreset during board_f */ psci { - u-boot,dm-pre-proper; + bootph-some-ram; }; }; &bsec { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioa { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiob { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioc { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiod { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioe { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiof { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiog { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioh { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioi { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioj { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiok { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioz { - u-boot,dm-pre-reloc; + bootph-all; }; &optee { - u-boot,dm-pre-proper; + bootph-some-ram; }; &iwdg2 { - u-boot,dm-pre-reloc; + bootph-all; }; /* pre-reloc probe = reserve video frame buffer in video_reserve() */ <dc { - u-boot,dm-pre-proper; + bootph-some-ram; }; /* temp = waiting kernel update */ @@ -119,19 +119,19 @@ }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_z { - u-boot,dm-pre-reloc; + bootph-all; }; &rcc { - u-boot,dm-pre-reloc; + bootph-all; }; &scmi { - u-boot,dm-pre-proper; + bootph-some-ram; }; &usart1 { diff --git a/arch/arm/dts/stm32mp15-u-boot.dtsi b/arch/arm/dts/stm32mp15-u-boot.dtsi index d5c87d29d8..d872c6fc56 100644 --- a/arch/arm/dts/stm32mp15-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15-u-boot.dtsi @@ -26,16 +26,16 @@ }; clocks { - u-boot,dm-pre-reloc; + bootph-all; }; /* need PSCI for sysreset during board_f */ psci { - u-boot,dm-pre-proper; + bootph-some-ram; }; reboot { - u-boot,dm-pre-reloc; + bootph-all; compatible = "syscon-reboot"; regmap = <&rcc>; offset = <0x404>; @@ -43,10 +43,10 @@ }; soc { - u-boot,dm-pre-reloc; + bootph-all; ddr: ddr@5a003000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32mp1-ddr"; @@ -59,94 +59,94 @@ }; &bsec { - u-boot,dm-pre-reloc; + bootph-all; }; &clk_csi { - u-boot,dm-pre-reloc; + bootph-all; }; &clk_hsi { - u-boot,dm-pre-reloc; + bootph-all; }; &clk_hse { - u-boot,dm-pre-reloc; + bootph-all; }; &clk_lsi { - u-boot,dm-pre-reloc; + bootph-all; }; &clk_lse { - u-boot,dm-pre-reloc; + bootph-all; }; &cpu0_opp_table { - u-boot,dm-spl; + bootph-pre-ram; opp-650000000 { - u-boot,dm-spl; + bootph-pre-ram; }; opp-800000000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &gpioa { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiob { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioc { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiod { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioe { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiof { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiog { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioh { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioi { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioj { - u-boot,dm-pre-reloc; + bootph-all; }; &gpiok { - u-boot,dm-pre-reloc; + bootph-all; }; &gpioz { - u-boot,dm-pre-reloc; + bootph-all; }; &iwdg2 { - u-boot,dm-pre-reloc; + bootph-all; }; /* pre-reloc probe = reserve video frame buffer in video_reserve() */ <dc { - u-boot,dm-pre-proper; + bootph-some-ram; }; /* temp = waiting kernel update */ @@ -157,19 +157,19 @@ }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_z { - u-boot,dm-pre-reloc; + bootph-all; }; &pwr_regulators { - u-boot,dm-pre-reloc; + bootph-all; }; &rcc { - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <0>; }; diff --git a/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi index 92fdf09872..20728f27ee 100644 --- a/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi @@ -35,16 +35,16 @@ }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; /* pull-up on rx to avoid floating level */ bias-pull-up; }; diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi index 15a04ae927..cff3f49948 100644 --- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi @@ -37,12 +37,12 @@ }; reserved-memory { - u-boot,dm-spl; + bootph-pre-ram; optee@de000000 { reg = <0xde000000 0x02000000>; no-map; - u-boot,dm-spl; + bootph-pre-ram; }; }; #endif @@ -66,18 +66,18 @@ }; &i2c4 { - u-boot,dm-pre-reloc; + bootph-all; }; &i2c4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins { - u-boot,dm-pre-reloc; + bootph-all; }; }; &pmic { - u-boot,dm-pre-reloc; + bootph-all; }; &rcc { @@ -151,7 +151,7 @@ reg = <1>; cfg = < 2 65 1 0 0 PQR(1,1,1) >; frac = < 0x1400 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ @@ -160,7 +160,7 @@ reg = <2>; cfg = < 1 33 1 16 36 PQR(1,1,1) >; frac = < 0x1a04 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ @@ -168,35 +168,35 @@ compatible = "st,stm32mp1-pll"; reg = <3>; cfg = < 3 98 5 7 7 PQR(1,1,1) >; - u-boot,dm-pre-reloc; + bootph-all; }; }; &sdmmc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc1_b4_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; /* pull-up on rx to avoid floating level */ bias-pull-up; }; diff --git a/arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2-u-boot.dtsi b/arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2-u-boot.dtsi index 96fe461235..5547535975 100644 --- a/arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2-u-boot.dtsi @@ -18,34 +18,34 @@ }; &sdmmc1 { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc1_b4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; }; }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; bias-pull-up; }; }; diff --git a/arch/arm/dts/stm32mp157a-icore-stm32mp1-edimm2.2-u-boot.dtsi b/arch/arm/dts/stm32mp157a-icore-stm32mp1-edimm2.2-u-boot.dtsi index 96fe461235..5547535975 100644 --- a/arch/arm/dts/stm32mp157a-icore-stm32mp1-edimm2.2-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-icore-stm32mp1-edimm2.2-u-boot.dtsi @@ -18,34 +18,34 @@ }; &sdmmc1 { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc1_b4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; }; }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; bias-pull-up; }; }; diff --git a/arch/arm/dts/stm32mp157a-icore-stm32mp1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-icore-stm32mp1-u-boot.dtsi index d62c24d4ce..630c96efd0 100644 --- a/arch/arm/dts/stm32mp157a-icore-stm32mp1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-icore-stm32mp1-u-boot.dtsi @@ -10,47 +10,47 @@ #include "stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi" &vddcore { - u-boot,dm-pre-reloc; + bootph-all; }; &vdd { - u-boot,dm-pre-reloc; + bootph-all; }; &vdd_usb { - u-boot,dm-pre-reloc; + bootph-all; }; &vdda { - u-boot,dm-pre-reloc; + bootph-all; }; &vdd_ddr { - u-boot,dm-pre-reloc; + bootph-all; }; &vtt_ddr { - u-boot,dm-pre-reloc; + bootph-all; }; &vref_ddr { - u-boot,dm-pre-reloc; + bootph-all; }; &vdd_sd { - u-boot,dm-pre-reloc; + bootph-all; }; &v3v3 { - u-boot,dm-pre-reloc; + bootph-all; }; &v2v8 { - u-boot,dm-pre-reloc; + bootph-all; }; &v1v8 { - u-boot,dm-pre-reloc; + bootph-all; }; &rcc { @@ -124,7 +124,7 @@ reg = <1>; cfg = < 2 65 1 0 0 PQR(1,1,1) >; frac = < 0x1400 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ @@ -133,7 +133,7 @@ reg = <2>; cfg = < 1 33 1 16 36 PQR(1,1,1) >; frac = < 0x1a04 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ @@ -141,6 +141,6 @@ compatible = "st,stm32mp1-pll"; reg = <3>; cfg = < 3 98 5 7 7 PQR(1,1,1) >; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7-u-boot.dtsi b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7-u-boot.dtsi index e4bd215812..a5e7060922 100644 --- a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7-u-boot.dtsi @@ -18,34 +18,34 @@ }; &sdmmc1 { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc1_b4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; }; }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; bias-pull-up; }; }; diff --git a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-u-boot.dtsi b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-u-boot.dtsi index e4bd215812..a5e7060922 100644 --- a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-u-boot.dtsi @@ -18,34 +18,34 @@ }; &sdmmc1 { - u-boot,dm-pre-reloc; + bootph-all; }; &sdmmc1_b4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; }; }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; bias-pull-up; }; }; diff --git a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-u-boot.dtsi index 836df6f746..7bba28af5b 100644 --- a/arch/arm/dts/stm32mp157a-microgea-stm32mp1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-microgea-stm32mp1-u-boot.dtsi @@ -10,19 +10,19 @@ #include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi" &vin { - u-boot,dm-pre-reloc; + bootph-all; }; &vddcore { - u-boot,dm-pre-reloc; + bootph-all; }; &vdd { - u-boot,dm-pre-reloc; + bootph-all; }; &vddq_ddr { - u-boot,dm-pre-reloc; + bootph-all; }; &rcc { @@ -96,7 +96,7 @@ reg = <1>; cfg = < 2 65 1 0 0 PQR(1,1,1) >; frac = < 0x1400 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ @@ -105,7 +105,7 @@ reg = <2>; cfg = < 1 33 1 16 36 PQR(1,1,1) >; frac = < 0x1a04 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ @@ -113,6 +113,6 @@ compatible = "st,stm32mp1-pll"; reg = <3>; cfg = < 3 98 5 7 7 PQR(1,1,1) >; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi index 63948ef493..4d763bd3a2 100644 --- a/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi @@ -29,16 +29,16 @@ }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; /* pull-up on rx to avoid floating level */ bias-pull-up; }; diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi index 408abaf52f..b8288273dd 100644 --- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi @@ -58,18 +58,18 @@ }; &i2c4 { - u-boot,dm-pre-reloc; + bootph-all; }; &i2c4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins { - u-boot,dm-pre-reloc; + bootph-all; }; }; &pmic { - u-boot,dm-pre-reloc; + bootph-all; }; &rcc { @@ -143,7 +143,7 @@ reg = <1>; cfg = < 2 65 1 0 0 PQR(1,1,1) >; frac = < 0x1400 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ @@ -152,7 +152,7 @@ reg = <2>; cfg = < 1 33 1 16 36 PQR(1,1,1) >; frac = < 0x1a04 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ @@ -160,66 +160,66 @@ compatible = "st,stm32mp1-pll"; reg = <3>; cfg = < 3 98 5 7 7 PQR(1,1,1) >; - u-boot,dm-pre-reloc; + bootph-all; }; }; &sdmmc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc1_b4_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc1_dir_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc2_b4_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc2_d47_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins { - u-boot,dm-spl; + bootph-pre-ram; }; }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; /* pull-up on rx to avoid floating level */ bias-pull-up; }; diff --git a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi index 7bf08bec6d..cb32c30431 100644 --- a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi @@ -22,37 +22,37 @@ }; &flash0 { - u-boot,dm-spl; + bootph-pre-ram; }; &qspi { - u-boot,dm-spl; + bootph-pre-ram; }; &qspi_clk_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins { - u-boot,dm-spl; + bootph-pre-ram; }; }; &qspi_bk1_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &qspi_bk2_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; diff --git a/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi index 4ff848350d..b780dbd95e 100644 --- a/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi @@ -18,18 +18,18 @@ }; &i2c2 { - u-boot,dm-pre-reloc; + bootph-all; }; &i2c2_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins { - u-boot,dm-pre-reloc; + bootph-all; }; }; &pmic { - u-boot,dm-pre-reloc; + bootph-all; }; &rcc { @@ -103,7 +103,7 @@ reg = <1>; cfg = < 2 65 1 0 0 PQR(1,1,1) >; frac = < 0x1400 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ @@ -112,7 +112,7 @@ reg = <2>; cfg = < 1 33 1 16 36 PQR(1,1,1) >; frac = < 0x1a04 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ @@ -120,27 +120,27 @@ compatible = "st,stm32mp1-pll"; reg = <3>; cfg = < 3 98 5 7 7 PQR(1,1,1) >; - u-boot,dm-pre-reloc; + bootph-all; }; }; &sdmmc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc2_b4_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc2_d47_pins_d { - u-boot,dm-spl; + bootph-pre-ram; pins { - u-boot,dm-spl; + bootph-pre-ram; }; }; diff --git a/arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi b/arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi index abceba5cbd..c1e35f2049 100644 --- a/arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi @@ -29,30 +29,30 @@ }; &sdmmc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc1_b4_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index b72a2f63f1..bc0730cf2b 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -46,17 +46,17 @@ }; &i2c4 { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; eeprom0: eeprom@50 { }; }; &i2c4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins { - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -82,46 +82,46 @@ }; &pmic { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; regulators { - u-boot,dm-spl; + bootph-pre-ram; }; }; &flash0 { - u-boot,dm-spl; + bootph-pre-ram; }; &qspi { - u-boot,dm-spl; + bootph-pre-ram; }; &qspi_clk_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins { - u-boot,dm-spl; + bootph-pre-ram; }; }; &qspi_bk1_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &qspi_bk2_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -211,7 +211,7 @@ reg = <1>; cfg = < 2 65 1 0 0 PQR(1,1,1) >; frac = < 0x1400 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ @@ -220,7 +220,7 @@ reg = <2>; cfg = < 1 33 1 16 36 PQR(1,1,1) >; frac = < 0x1a04 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 600.0 MHz => P = 100, Q = 50, R = 50 */ @@ -228,12 +228,12 @@ compatible = "st,stm32mp1-pll"; reg = <3>; cfg = < 1 49 5 11 11 PQR(1,1,1) >; - u-boot,dm-pre-reloc; + bootph-all; }; }; &sdmmc1 { - u-boot,dm-spl; + bootph-pre-ram; st,use-ckin; st,cmd-gpios = <&gpiod 2 0>; st,ck-gpios = <&gpioc 12 0>; @@ -241,91 +241,91 @@ }; &sdmmc1_b4_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc1_dir_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc2_b4_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc2_d47_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins { - u-boot,dm-spl; + bootph-pre-ram; }; }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; /* pull-up on rx to avoid floating level */ bias-pull-up; }; }; ®11 { - u-boot,dm-spl; + bootph-pre-ram; }; ®18 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb33 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbotg_hs_pins_a { - u-boot,dm-spl; + bootph-pre-ram; }; &usbotg_hs { - u-boot,dm-spl; + bootph-pre-ram; }; &usbphyc { - u-boot,dm-spl; + bootph-pre-ram; }; &usbphyc_port0 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbphyc_port1 { - u-boot,dm-spl; + bootph-pre-ram; }; &vdd_usb { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi index 6dee51dc1c..ab4d66c961 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi @@ -32,7 +32,7 @@ }; &sdmmc1 { - u-boot,dm-spl; + bootph-pre-ram; st,use-ckin; st,cmd-gpios = <&gpiod 2 0>; st,ck-gpios = <&gpioc 12 0>; @@ -40,57 +40,57 @@ }; &sdmmc1_b4_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc1_dir_pins_b { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc2_b4_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc2_d47_pins_c { - u-boot,dm-spl; + bootph-pre-ram; pins { - u-boot,dm-spl; + bootph-pre-ram; }; }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_b { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; /delete-property/ bias-disable; bias-pull-up; }; @@ -106,5 +106,5 @@ }; &vdd_io { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi index b6a6a78647..038c3a92eb 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi @@ -30,7 +30,7 @@ }; &sdmmc1 { - u-boot,dm-spl; + bootph-pre-ram; st,use-ckin; st,cmd-gpios = <&gpiod 2 0>; st,ck-gpios = <&gpioc 12 0>; @@ -38,43 +38,43 @@ }; &sdmmc1_b4_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc1_dir_pins_b { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc2_b4_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc2_d47_pins_c { - u-boot,dm-spl; + bootph-pre-ram; pins { - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -83,16 +83,16 @@ }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_d { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; /delete-property/ bias-disable; bias-pull-up; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi index 5b051b8ac4..31995c058e 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi @@ -30,7 +30,7 @@ }; &sdmmc1 { - u-boot,dm-spl; + bootph-pre-ram; st,use-ckin; st,cmd-gpios = <&gpiod 2 0>; st,ck-gpios = <&gpioc 12 0>; @@ -38,57 +38,57 @@ }; &sdmmc1_b4_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc1_dir_pins_b { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &sdmmc2_b4_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &sdmmc2_d47_pins_c { - u-boot,dm-spl; + bootph-pre-ram; pins { - u-boot,dm-spl; + bootph-pre-ram; }; }; &uart4 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart4_pins_b { - u-boot,dm-pre-reloc; + bootph-all; pins1 { - u-boot,dm-pre-reloc; + bootph-all; }; pins2 { - u-boot,dm-pre-reloc; + bootph-all; /delete-property/ bias-disable; bias-pull-up; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi index 25a288b047..804c66283e 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi @@ -14,7 +14,7 @@ #include "stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi" / { - u-boot,dm-pre-reloc; + bootph-all; aliases { eeprom0 = &eeprom0; @@ -27,55 +27,55 @@ }; &flash0 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c4 { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; eeprom0: eeprom@53 { }; }; &i2c4_pins_a { - u-boot,dm-pre-reloc; + bootph-all; pins { - u-boot,dm-pre-reloc; + bootph-all; }; }; &pmic { - u-boot,dm-pre-reloc; - u-boot,dm-spl; + bootph-all; + bootph-pre-ram; regulators { - u-boot,dm-spl; + bootph-pre-ram; }; }; &pwr_regulators { - u-boot,dm-spl; + bootph-pre-ram; }; &qspi { - u-boot,dm-spl; + bootph-pre-ram; }; &qspi_clk_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins { - u-boot,dm-spl; + bootph-pre-ram; }; }; &qspi_bk1_pins_a { - u-boot,dm-spl; + bootph-pre-ram; pins1 { - u-boot,dm-spl; + bootph-pre-ram; }; pins2 { - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -165,7 +165,7 @@ reg = <1>; cfg = < 2 65 1 0 0 PQR(1,1,1) >; frac = < 0x1400 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ @@ -174,7 +174,7 @@ reg = <2>; cfg = < 1 33 1 16 36 PQR(1,1,1) >; frac = < 0x1a04 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 594.0 MHz => P = 99, Q = 74, R = 99 */ @@ -182,42 +182,42 @@ compatible = "st,stm32mp1-pll"; reg = <3>; cfg = < 3 98 5 7 5 PQR(1,1,1) >; - u-boot,dm-pre-reloc; + bootph-all; }; }; ®11 { - u-boot,dm-spl; + bootph-pre-ram; }; ®18 { - u-boot,dm-spl; + bootph-pre-ram; }; &usb33 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbotg_hs_pins_a { - u-boot,dm-spl; + bootph-pre-ram; }; &usbotg_hs { - u-boot,dm-spl; + bootph-pre-ram; }; &usbphyc { - u-boot,dm-spl; + bootph-pre-ram; }; &usbphyc_port0 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbphyc_port1 { - u-boot,dm-spl; + bootph-pre-ram; }; &vdd_usb { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/arm/dts/t8103-u-boot.dtsi b/arch/arm/dts/t8103-u-boot.dtsi index 43f552979d..e9e593a00c 100644 --- a/arch/arm/dts/t8103-u-boot.dtsi +++ b/arch/arm/dts/t8103-u-boot.dtsi @@ -1,25 +1,25 @@ // SPDX-License-Identifier: GPL-2.0+ OR MIT &serial0 { - u-boot,dm-pre-reloc; + bootph-all; }; &pmgr { - u-boot,dm-pre-reloc; + bootph-all; }; &ps_sio_busif { - u-boot,dm-pre-reloc; + bootph-all; }; &ps_sio { - u-boot,dm-pre-reloc; + bootph-all; }; &ps_uart_p { - u-boot,dm-pre-reloc; + bootph-all; }; &ps_uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi b/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi index ddfeba806c..376dcdf68f 100644 --- a/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi +++ b/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi @@ -8,9 +8,9 @@ / { host1x@50000000 { - u-boot,dm-pre-reloc; + bootph-all; dc@54200000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/tegra20-u-boot.dtsi b/arch/arm/dts/tegra20-u-boot.dtsi index f64667e549..fa582bcb9f 100644 --- a/arch/arm/dts/tegra20-u-boot.dtsi +++ b/arch/arm/dts/tegra20-u-boot.dtsi @@ -5,9 +5,9 @@ / { host1x@50000000 { - u-boot,dm-pre-reloc; + bootph-all; dc@54200000 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/arm/dts/uniphier-v7-u-boot.dtsi b/arch/arm/dts/uniphier-v7-u-boot.dtsi index 603b33dd2b..eadcc21fc0 100644 --- a/arch/arm/dts/uniphier-v7-u-boot.dtsi +++ b/arch/arm/dts/uniphier-v7-u-boot.dtsi @@ -1,43 +1,43 @@ / { soc { - u-boot,dm-pre-reloc; + bootph-all; timer@60000200 { - u-boot,dm-pre-reloc; + bootph-all; }; serial@54006800 { - u-boot,dm-pre-reloc; + bootph-all; }; serial@54006900 { - u-boot,dm-pre-reloc; + bootph-all; }; serial@54006a00 { - u-boot,dm-pre-reloc; + bootph-all; }; soc-glue@5f800000 { - u-boot,dm-pre-reloc; + bootph-all; pinctrl { - u-boot,dm-pre-reloc; + bootph-all; emmc { - u-boot,dm-pre-reloc; + bootph-all; }; uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; @@ -45,5 +45,5 @@ }; &emmc { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/versal-mini-emmc0.dts b/arch/arm/dts/versal-mini-emmc0.dts index d098c2d01b..1863d29d3d 100644 --- a/arch/arm/dts/versal-mini-emmc0.dts +++ b/arch/arm/dts/versal-mini-emmc0.dts @@ -25,11 +25,11 @@ dcc: dcc { compatible = "arm,dcc"; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; amba: amba { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; #address-cells = <0x2>; #size-cells = <0x2>; diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts index 9d4ac28359..8701c3bb27 100644 --- a/arch/arm/dts/versal-mini-emmc1.dts +++ b/arch/arm/dts/versal-mini-emmc1.dts @@ -25,11 +25,11 @@ dcc: dcc { compatible = "arm,dcc"; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; amba: amba { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; #address-cells = <0x2>; #size-cells = <0x2>; diff --git a/arch/arm/dts/versal-mini-ospi.dtsi b/arch/arm/dts/versal-mini-ospi.dtsi index a4b76e2b99..2d04521dd6 100644 --- a/arch/arm/dts/versal-mini-ospi.dtsi +++ b/arch/arm/dts/versal-mini-ospi.dtsi @@ -25,11 +25,11 @@ dcc: dcc { compatible = "arm,dcc"; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; amba: amba { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; #address-cells = <0x2>; #size-cells = <0x2>; diff --git a/arch/arm/dts/versal-mini-qspi.dtsi b/arch/arm/dts/versal-mini-qspi.dtsi index 71d0ba5e00..bb8819dd25 100644 --- a/arch/arm/dts/versal-mini-qspi.dtsi +++ b/arch/arm/dts/versal-mini-qspi.dtsi @@ -25,11 +25,11 @@ dcc: dcc { compatible = "arm,dcc"; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; amba: amba { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; #address-cells = <0x2>; #size-cells = <0x2>; diff --git a/arch/arm/dts/versal-mini.dts b/arch/arm/dts/versal-mini.dts index 6a83981cc2..769eb9e7b2 100644 --- a/arch/arm/dts/versal-mini.dts +++ b/arch/arm/dts/versal-mini.dts @@ -31,6 +31,6 @@ dcc: dcc { compatible = "arm,dcc"; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/versal-net-mini.dts b/arch/arm/dts/versal-net-mini.dts index 8c29a6ed6b..9365efbe9f 100644 --- a/arch/arm/dts/versal-net-mini.dts +++ b/arch/arm/dts/versal-net-mini.dts @@ -33,7 +33,7 @@ }; clk1: clk1 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <1000000>; @@ -42,18 +42,18 @@ dcc: dcc { compatible = "arm,dcc"; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; amba: axi { compatible = "simple-bus"; - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <2>; #size-cells = <2>; ranges; serial0: serial@f1920000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "arm,pl011", "arm,primecell"; reg = <0 0xf1920000 0 0x1000>; reg-io-width = <4>; diff --git a/arch/arm/dts/vf610-bk4r1-u-boot.dtsi b/arch/arm/dts/vf610-bk4r1-u-boot.dtsi index 088926bde2..1336006e03 100644 --- a/arch/arm/dts/vf610-bk4r1-u-boot.dtsi +++ b/arch/arm/dts/vf610-bk4r1-u-boot.dtsi @@ -6,22 +6,22 @@ / { soc { - u-boot,dm-pre-reloc; + bootph-all; }; }; &aips0 { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_ddr { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/vf610-colibri-eval-v3-u-boot.dtsi b/arch/arm/dts/vf610-colibri-eval-v3-u-boot.dtsi index f67c11b3da..572d40877e 100644 --- a/arch/arm/dts/vf610-colibri-eval-v3-u-boot.dtsi +++ b/arch/arm/dts/vf610-colibri-eval-v3-u-boot.dtsi @@ -5,16 +5,16 @@ / { soc { - u-boot,dm-pre-reloc; + bootph-all; }; }; &aips0 { - u-boot,dm-pre-reloc; + bootph-all; }; &dcu0 { - u-boot,dm-pre-reloc; + bootph-all; }; &iomuxc { @@ -78,13 +78,13 @@ }; &pinctrl_ddr { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl_uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index f72ef526f0..149c644634 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -96,7 +96,7 @@ }; amba: axi { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -330,14 +330,14 @@ }; slcr: slcr@f8000000 { - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <1>; compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; reg = <0xF8000000 0x1000>; ranges; clkc: clkc@100 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <1>; compatible = "xlnx,ps7-clkc"; fclk-enable = <0xf>; @@ -427,7 +427,7 @@ }; scutimer: timer@f8f00600 { - u-boot,dm-pre-reloc; + bootph-all; interrupt-parent = <&intc>; interrupts = <1 13 0x301>; compatible = "arm,cortex-a9-twd-timer"; diff --git a/arch/arm/dts/zynq-cc108.dts b/arch/arm/dts/zynq-cc108.dts index 036106e221..dc942b0f59 100644 --- a/arch/arm/dts/zynq-cc108.dts +++ b/arch/arm/dts/zynq-cc108.dts @@ -99,7 +99,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynq-cse-nand.dts b/arch/arm/dts/zynq-cse-nand.dts index 27adfb9216..18f627f3d7 100644 --- a/arch/arm/dts/zynq-cse-nand.dts +++ b/arch/arm/dts/zynq-cse-nand.dts @@ -28,11 +28,11 @@ dcc: dcc { compatible = "arm,dcc"; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; amba: amba { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -54,14 +54,14 @@ }; slcr: slcr@f8000000 { - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <1>; compatible = "xlnx,zynq-slcr", "syscon", "simple-bus"; reg = <0xF8000000 0x1000>; ranges; clkc: clkc@100 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <1>; compatible = "xlnx,ps7-clkc"; clock-output-names = "armpll", "ddrpll", @@ -88,7 +88,7 @@ }; scutimer: timer@f8f00600 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "arm,cortex-a9-twd-timer"; reg = <0xf8f00600 0x20>; clock-frequency = <333333333>; diff --git a/arch/arm/dts/zynq-cse-nor.dts b/arch/arm/dts/zynq-cse-nor.dts index f22a149f79..a5c8a0813f 100644 --- a/arch/arm/dts/zynq-cse-nor.dts +++ b/arch/arm/dts/zynq-cse-nor.dts @@ -28,25 +28,25 @@ dcc: dcc { compatible = "arm,dcc"; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; amba: amba { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; slcr: slcr@f8000000 { - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <1>; compatible = "xlnx,zynq-slcr", "syscon", "simple-bus"; reg = <0xF8000000 0x1000>; ranges; clkc: clkc@100 { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <1>; compatible = "xlnx,ps7-clkc"; clock-output-names = "armpll", "ddrpll", @@ -79,7 +79,7 @@ * why place cfi-flash directly here. */ flash@e2000000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "cfi-flash"; reg = <0xe2000000 0x2000000>; #address-cells = <1>; @@ -87,7 +87,7 @@ }; scutimer: timer@f8f00600 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "arm,cortex-a9-twd-timer"; reg = <0xf8f00600 0x20>; clock-frequency = <333333333>; diff --git a/arch/arm/dts/zynq-cse-qspi.dtsi b/arch/arm/dts/zynq-cse-qspi.dtsi index f7ac92b802..2e4afafebf 100644 --- a/arch/arm/dts/zynq-cse-qspi.dtsi +++ b/arch/arm/dts/zynq-cse-qspi.dtsi @@ -29,11 +29,11 @@ dcc: dcc { compatible = "arm,dcc"; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; amba: amba { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -91,7 +91,7 @@ }; slcr: slcr@f8000000 { - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <1>; compatible = "xlnx,zynq-slcr", "syscon", "simple-bus"; @@ -101,7 +101,7 @@ #clock-cells = <1>; compatible = "xlnx,ps7-clkc"; fclk-enable = <0xf>; - u-boot,dm-pre-reloc; + bootph-all; clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", @@ -118,7 +118,7 @@ }; scutimer: timer@f8f00600 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "arm,cortex-a9-twd-timer"; reg = <0xf8f00600 0x20>; clock-frequency = <333333333>; diff --git a/arch/arm/dts/zynq-dlc20-rev1.0.dts b/arch/arm/dts/zynq-dlc20-rev1.0.dts index 39ebcee9f7..cbf52c88b9 100644 --- a/arch/arm/dts/zynq-dlc20-rev1.0.dts +++ b/arch/arm/dts/zynq-dlc20-rev1.0.dts @@ -64,7 +64,7 @@ }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; is-dual = <0>; num-cs = <1>; @@ -81,14 +81,14 @@ }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; /* EMMC MTFC4GACAJCN - MIO40-MIO45 */ non-removable; bus-width = <4>; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; /* MIO8/9 */ }; diff --git a/arch/arm/dts/zynq-microzed.dts b/arch/arm/dts/zynq-microzed.dts index 0766398605..875ee080df 100644 --- a/arch/arm/dts/zynq-microzed.dts +++ b/arch/arm/dts/zynq-microzed.dts @@ -38,12 +38,12 @@ }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; @@ -58,7 +58,7 @@ }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynq-minized.dts b/arch/arm/dts/zynq-minized.dts index 525921ee7b..38365d1c0e 100644 --- a/arch/arm/dts/zynq-minized.dts +++ b/arch/arm/dts/zynq-minized.dts @@ -79,7 +79,7 @@ }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynq-picozed.dts b/arch/arm/dts/zynq-picozed.dts index dea6a422c3..640537eeba 100644 --- a/arch/arm/dts/zynq-picozed.dts +++ b/arch/arm/dts/zynq-picozed.dts @@ -24,16 +24,16 @@ }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &sdhci1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynq-syzygy-hub.dts b/arch/arm/dts/zynq-syzygy-hub.dts index cb878b0d0d..99f248d4e5 100644 --- a/arch/arm/dts/zynq-syzygy-hub.dts +++ b/arch/arm/dts/zynq-syzygy-hub.dts @@ -61,12 +61,12 @@ }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynq-topic-miami.dts b/arch/arm/dts/zynq-topic-miami.dts index c4ec56138e..57cb86aafd 100644 --- a/arch/arm/dts/zynq-topic-miami.dts +++ b/arch/arm/dts/zynq-topic-miami.dts @@ -31,7 +31,7 @@ }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; is-dual = <0>; num-cs = <1>; @@ -82,12 +82,12 @@ }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index f04129fd04..24ad49ee6a 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -396,7 +396,7 @@ }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; num-cs = <1>; flash@0 { @@ -409,14 +409,14 @@ }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdhci0_default>; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_default>; diff --git a/arch/arm/dts/zynq-zc706.dts b/arch/arm/dts/zynq-zc706.dts index dd3ae83c82..03eb016ed6 100644 --- a/arch/arm/dts/zynq-zc706.dts +++ b/arch/arm/dts/zynq-zc706.dts @@ -307,7 +307,7 @@ }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; num-cs = <1>; flash@0 { @@ -320,14 +320,14 @@ }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdhci0_default>; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_default>; diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts index 002ff9f7f4..17680d7f8e 100644 --- a/arch/arm/dts/zynq-zc770-xm010.dts +++ b/arch/arm/dts/zynq-zc770-xm010.dts @@ -97,7 +97,7 @@ }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zc770-xm011.dts b/arch/arm/dts/zynq-zc770-xm011.dts index 0ef2ae1744..02214349fe 100644 --- a/arch/arm/dts/zynq-zc770-xm011.dts +++ b/arch/arm/dts/zynq-zc770-xm011.dts @@ -62,7 +62,7 @@ }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zc770-xm012.dts b/arch/arm/dts/zynq-zc770-xm012.dts index ccf76e7984..6e36634e3d 100644 --- a/arch/arm/dts/zynq-zc770-xm012.dts +++ b/arch/arm/dts/zynq-zc770-xm012.dts @@ -69,6 +69,6 @@ }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts index 455c8a9610..21902fbb0c 100644 --- a/arch/arm/dts/zynq-zc770-xm013.dts +++ b/arch/arm/dts/zynq-zc770-xm013.dts @@ -86,6 +86,6 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts index cf28167a7f..5320b4b233 100644 --- a/arch/arm/dts/zynq-zed.dts +++ b/arch/arm/dts/zynq-zed.dts @@ -49,7 +49,7 @@ }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; num-cs = <1>; flash@0 { @@ -61,12 +61,12 @@ }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zturn-common.dtsi b/arch/arm/dts/zynq-zturn-common.dtsi index 486b6fa2e1..edba3d86c3 100644 --- a/arch/arm/dts/zynq-zturn-common.dtsi +++ b/arch/arm/dts/zynq-zturn-common.dtsi @@ -64,7 +64,7 @@ }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; @@ -78,17 +78,17 @@ }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zybo-z7.dts b/arch/arm/dts/zynq-zybo-z7.dts index 116958ec97..83b8413097 100644 --- a/arch/arm/dts/zynq-zybo-z7.dts +++ b/arch/arm/dts/zynq-zybo-z7.dts @@ -60,17 +60,17 @@ }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zybo.dts b/arch/arm/dts/zynq-zybo.dts index 0ac54ebbdc..0ce5238c9a 100644 --- a/arch/arm/dts/zynq-zybo.dts +++ b/arch/arm/dts/zynq-zybo.dts @@ -50,17 +50,17 @@ }; &qspi { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &sdhci0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-a2197-revA.dts b/arch/arm/dts/zynqmp-a2197-revA.dts index 89c3a281d0..04f9f025e5 100644 --- a/arch/arm/dts/zynqmp-a2197-revA.dts +++ b/arch/arm/dts/zynqmp-a2197-revA.dts @@ -40,14 +40,14 @@ &i2c0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; clock-frequency = <400000>; i2c-mux@74 { /* this cover MGT board */ compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; reg = <0x74>; - u-boot,dm-pre-reloc; + bootph-all; /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ i2c@0 { #address-cells = <1>; @@ -56,7 +56,7 @@ /* Use for storing information about SC board */ eeprom0: eeprom@50 { /* u96 - 24LC32A - 256B */ compatible = "atmel,24c32"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x50>; }; }; @@ -65,14 +65,14 @@ &i2c1 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; clock-frequency = <400000>; i2c-mux@74 { /* This cover processor board */ compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; reg = <0x74>; - u-boot,dm-pre-reloc; + bootph-all; /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ i2c@0 { #address-cells = <1>; @@ -81,7 +81,7 @@ /* Use for storing information about SC board */ eeprom1: eeprom@50 { /* u96 - 24LC32A - 256B */ compatible = "atmel,24c32"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x50>; }; }; diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index b99eb07b00..38dc9cd8fc 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -34,35 +34,35 @@ }; pss_ref_clk: pss_ref_clk { - u-boot,dm-pre-reloc; + bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <33333333>; }; video_clk: video_clk { - u-boot,dm-pre-reloc; + bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; }; pss_alt_ref_clk: pss_alt_ref_clk { - u-boot,dm-pre-reloc; + bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; gt_crx_ref_clk: gt_crx_ref_clk { - u-boot,dm-pre-reloc; + bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <108000000>; }; aux_ref_clk: aux_ref_clk { - u-boot,dm-pre-reloc; + bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; @@ -71,7 +71,7 @@ &zynqmp_firmware { zynqmp_clk: clock-controller { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <1>; compatible = "xlnx,zynqmp-clk"; clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>, diff --git a/arch/arm/dts/zynqmp-dlc21-revA.dts b/arch/arm/dts/zynqmp-dlc21-revA.dts index bf0d89a5fc..7460e4a4fd 100644 --- a/arch/arm/dts/zynqmp-dlc21-revA.dts +++ b/arch/arm/dts/zynqmp-dlc21-revA.dts @@ -80,7 +80,7 @@ &uart0 { /* uart0 MIO38-39 */ status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; &gem0 { @@ -196,10 +196,10 @@ status = "okay"; is-decoded-cs = <0>; num-cs = <1>; - u-boot,dm-pre-reloc; + bootph-all; displayspi@0 { compatible = "syncoam,seps525"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0>; status = "okay"; spi-max-frequency = <10000000>; diff --git a/arch/arm/dts/zynqmp-mini-emmc0.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts index 1cc4ade5e8..d1e58eb6d1 100644 --- a/arch/arm/dts/zynqmp-mini-emmc0.dts +++ b/arch/arm/dts/zynqmp-mini-emmc0.dts @@ -32,7 +32,7 @@ dcc: dcc { compatible = "arm,dcc"; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; clk_xin: clk_xin { @@ -48,7 +48,7 @@ ranges; sdhci0: sdhci@ff160000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; status = "disabled"; non-removable; diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts index 96b5dc2932..0c139f82aa 100644 --- a/arch/arm/dts/zynqmp-mini-emmc1.dts +++ b/arch/arm/dts/zynqmp-mini-emmc1.dts @@ -32,7 +32,7 @@ dcc: dcc { compatible = "arm,dcc"; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; clk_xin: clk_xin { @@ -48,7 +48,7 @@ ranges; sdhci1: sdhci@ff170000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; status = "disabled"; non-removable; diff --git a/arch/arm/dts/zynqmp-mini-nand.dts b/arch/arm/dts/zynqmp-mini-nand.dts index d376ade834..8fae01b250 100644 --- a/arch/arm/dts/zynqmp-mini-nand.dts +++ b/arch/arm/dts/zynqmp-mini-nand.dts @@ -32,7 +32,7 @@ dcc: dcc { compatible = "arm,dcc"; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; amba: amba { diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts index 20c21deb66..a7cf4eff6c 100644 --- a/arch/arm/dts/zynqmp-mini-qspi.dts +++ b/arch/arm/dts/zynqmp-mini-qspi.dts @@ -33,7 +33,7 @@ dcc: dcc { compatible = "arm,dcc"; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; amba: amba { diff --git a/arch/arm/dts/zynqmp-mini.dts b/arch/arm/dts/zynqmp-mini.dts index 1faee9ec75..15bee169a9 100644 --- a/arch/arm/dts/zynqmp-mini.dts +++ b/arch/arm/dts/zynqmp-mini.dts @@ -31,7 +31,7 @@ dcc: dcc { compatible = "arm,dcc"; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/arm/dts/zynqmp-r5.dts b/arch/arm/dts/zynqmp-r5.dts index a72172ef2e..9789d7144e 100644 --- a/arch/arm/dts/zynqmp-r5.dts +++ b/arch/arm/dts/zynqmp-r5.dts @@ -44,11 +44,11 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <100000000>; - u-boot,dm-pre-reloc; + bootph-all; }; amba { - u-boot,dm-pre-reloc; + bootph-all; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -63,7 +63,7 @@ }; uart1: serial@ff010000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "cdns,uart-r1p12", "xlnx,xuartps"; reg = <0xff010000 0x1000>; clock-names = "uart_clk", "pclk"; diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index aafaaec3f1..ed75049741 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -254,20 +254,20 @@ &i2c1 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; clock-frequency = <400000>; scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; eeprom: eeprom@50 { /* u46 - also at address 0x58 */ - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,24c64", "atmel,24c64"; /* st m24c64 */ reg = <0x50>; /* WP pin EE_WP_EN connected to slg7x644092@68 */ }; eeprom_cc: eeprom@51 { /* required by spec - also at address 0x59 */ - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,24c64", "atmel,24c64"; /* st m24c64 */ reg = <0x51>; }; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 0a06c73390..b74fb3b0ba 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -102,7 +102,7 @@ }; zynqmp_ipi: zynqmp_ipi { - u-boot,dm-pre-reloc; + bootph-all; compatible = "xlnx,zynqmp-ipi-mailbox"; interrupt-parent = <&gic>; interrupts = <0 35 4>; @@ -112,7 +112,7 @@ ranges; ipi_mailbox_pmu1: mailbox@ff990400 { - u-boot,dm-pre-reloc; + bootph-all; reg = <0x0 0xff9905c0 0x0 0x20>, <0x0 0xff9905e0 0x0 0x20>, <0x0 0xff990e80 0x0 0x20>, @@ -129,7 +129,7 @@ dcc: dcc { compatible = "arm,dcc"; status = "disabled"; - u-boot,dm-pre-reloc; + bootph-all; }; pmu { @@ -151,10 +151,10 @@ compatible = "xlnx,zynqmp-firmware"; #power-domain-cells = <1>; method = "smc"; - u-boot,dm-pre-reloc; + bootph-all; zynqmp_power: zynqmp-power { - u-boot,dm-pre-reloc; + bootph-all; compatible = "xlnx,zynqmp-power"; interrupt-parent = <&gic>; interrupts = <0 35 4>; @@ -223,7 +223,7 @@ amba: axi { compatible = "simple-bus"; - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <2>; #size-cells = <2>; ranges; @@ -669,7 +669,7 @@ }; qspi: spi@ff0f0000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "xlnx,zynqmp-qspi-1.0"; status = "disabled"; clock-names = "ref_clk", "pclk"; @@ -717,7 +717,7 @@ }; sdhci0: mmc@ff160000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; status = "disabled"; interrupt-parent = <&gic>; @@ -732,7 +732,7 @@ }; sdhci1: mmc@ff170000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; status = "disabled"; interrupt-parent = <&gic>; @@ -825,7 +825,7 @@ }; uart0: serial@ff000000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12"; status = "disabled"; interrupt-parent = <&gic>; @@ -836,7 +836,7 @@ }; uart1: serial@ff010000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12"; status = "disabled"; interrupt-parent = <&gic>; @@ -968,7 +968,7 @@ }; zynqmp_dpsub: display@fd4a0000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "xlnx,zynqmp-dpsub-1.7"; status = "disabled"; reg = <0x0 0xfd4a0000 0x0 0x1000>, diff --git a/arch/m68k/dts/M5208EVBE.dts b/arch/m68k/dts/M5208EVBE.dts index 3e5a698861..78973fca57 100644 --- a/arch/m68k/dts/M5208EVBE.dts +++ b/arch/m68k/dts/M5208EVBE.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/M5235EVB.dts b/arch/m68k/dts/M5235EVB.dts index b170b7bd03..e8b22c9216 100644 --- a/arch/m68k/dts/M5235EVB.dts +++ b/arch/m68k/dts/M5235EVB.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/M5235EVB_Flash32.dts b/arch/m68k/dts/M5235EVB_Flash32.dts index 497d824541..60b28c07f7 100644 --- a/arch/m68k/dts/M5235EVB_Flash32.dts +++ b/arch/m68k/dts/M5235EVB_Flash32.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/M5249EVB.dts b/arch/m68k/dts/M5249EVB.dts index b2a1be9090..84ba4f188b 100644 --- a/arch/m68k/dts/M5249EVB.dts +++ b/arch/m68k/dts/M5249EVB.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/M5253DEMO.dts b/arch/m68k/dts/M5253DEMO.dts index 7ebaa9a2e0..515484ae93 100644 --- a/arch/m68k/dts/M5253DEMO.dts +++ b/arch/m68k/dts/M5253DEMO.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/M5272C3.dts b/arch/m68k/dts/M5272C3.dts index 0ecf1e7429..a228937907 100644 --- a/arch/m68k/dts/M5272C3.dts +++ b/arch/m68k/dts/M5272C3.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/M5275EVB.dts b/arch/m68k/dts/M5275EVB.dts index f0f573c08c..4737f927db 100644 --- a/arch/m68k/dts/M5275EVB.dts +++ b/arch/m68k/dts/M5275EVB.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/M5282EVB.dts b/arch/m68k/dts/M5282EVB.dts index 9b506635b9..51788f9654 100644 --- a/arch/m68k/dts/M5282EVB.dts +++ b/arch/m68k/dts/M5282EVB.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/M53017EVB.dts b/arch/m68k/dts/M53017EVB.dts index 401318ddf9..31c50b65c2 100644 --- a/arch/m68k/dts/M53017EVB.dts +++ b/arch/m68k/dts/M53017EVB.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/M5329AFEE.dts b/arch/m68k/dts/M5329AFEE.dts index ab009c5605..de4af4743d 100644 --- a/arch/m68k/dts/M5329AFEE.dts +++ b/arch/m68k/dts/M5329AFEE.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/M5329BFEE.dts b/arch/m68k/dts/M5329BFEE.dts index 7e73ab9c66..2b2aae2cf9 100644 --- a/arch/m68k/dts/M5329BFEE.dts +++ b/arch/m68k/dts/M5329BFEE.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/M5373EVB.dts b/arch/m68k/dts/M5373EVB.dts index 4e1b7aeb77..7df8206d63 100644 --- a/arch/m68k/dts/M5373EVB.dts +++ b/arch/m68k/dts/M5373EVB.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/amcore.dts b/arch/m68k/dts/amcore.dts index c21fb8ff79..d43202a3ab 100644 --- a/arch/m68k/dts/amcore.dts +++ b/arch/m68k/dts/amcore.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/astro_mcf5373l.dts b/arch/m68k/dts/astro_mcf5373l.dts index 1b1a46ac2d..d3caf12db1 100644 --- a/arch/m68k/dts/astro_mcf5373l.dts +++ b/arch/m68k/dts/astro_mcf5373l.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/cobra5272.dts b/arch/m68k/dts/cobra5272.dts index 6085eee5b3..2b5767d96d 100644 --- a/arch/m68k/dts/cobra5272.dts +++ b/arch/m68k/dts/cobra5272.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/eb_cpu5282.dts b/arch/m68k/dts/eb_cpu5282.dts index 655c4ecf5a..925f9af3a8 100644 --- a/arch/m68k/dts/eb_cpu5282.dts +++ b/arch/m68k/dts/eb_cpu5282.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/eb_cpu5282_internal.dts b/arch/m68k/dts/eb_cpu5282_internal.dts index f5a044d7cc..ae6a8157cf 100644 --- a/arch/m68k/dts/eb_cpu5282_internal.dts +++ b/arch/m68k/dts/eb_cpu5282_internal.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/m68k/dts/stmark2.dts b/arch/m68k/dts/stmark2.dts index 306b56d679..56c328ff0c 100644 --- a/arch/m68k/dts/stmark2.dts +++ b/arch/m68k/dts/stmark2.dts @@ -16,7 +16,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/mips/dts/ar933x.dtsi b/arch/mips/dts/ar933x.dtsi index 37354324fe..c4f29324ef 100644 --- a/arch/mips/dts/ar933x.dtsi +++ b/arch/mips/dts/ar933x.dtsi @@ -35,7 +35,7 @@ }; pinctrl { - u-boot,dm-pre-reloc; + bootph-all; compatible = "qca,ar933x-pinctrl"; ranges; #address-cells = <1>; diff --git a/arch/mips/dts/brcm,bcm3380.dtsi b/arch/mips/dts/brcm,bcm3380.dtsi index 7cccec5da5..c79a6db42f 100644 --- a/arch/mips/dts/brcm,bcm3380.dtsi +++ b/arch/mips/dts/brcm,bcm3380.dtsi @@ -19,20 +19,20 @@ reg = <0x14e00000 0x4>; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; cpu@0 { compatible = "brcm,bcm3380-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; cpu@1 { compatible = "brcm,bcm3380-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -40,13 +40,13 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; periph_osc: periph-osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <48000000>; - u-boot,dm-pre-reloc; + bootph-all; }; periph_clk0: periph-clk@14e00004 { @@ -66,12 +66,12 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; memory-controller@12000000 { compatible = "brcm,bcm6328-mc"; reg = <0x12000000 0x1000>; - u-boot,dm-pre-reloc; + bootph-all; }; periph_rst0: reset-controller@14e0008c { diff --git a/arch/mips/dts/brcm,bcm6318.dtsi b/arch/mips/dts/brcm,bcm6318.dtsi index d678dab242..5813de7bf6 100644 --- a/arch/mips/dts/brcm,bcm6318.dtsi +++ b/arch/mips/dts/brcm,bcm6318.dtsi @@ -21,13 +21,13 @@ reg = <0x10000000 0x4>; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; cpu@0 { compatible = "brcm,bcm6318-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -35,7 +35,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; hsspi_pll: hsspi-pll { compatible = "fixed-clock"; @@ -47,7 +47,7 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; - u-boot,dm-pre-reloc; + bootph-all; }; periph_clk: periph-clk { @@ -67,7 +67,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; periph_rst: reset-controller@10000010 { compatible = "brcm,bcm6345-reset"; @@ -157,7 +157,7 @@ memory-controller@10004000 { compatible = "brcm,bcm6318-mc"; reg = <0x10004000 0x38>; - u-boot,dm-pre-reloc; + bootph-all; }; ehci: usb-controller@10005000 { diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi index 5294242529..587a6e8042 100644 --- a/arch/mips/dts/brcm,bcm63268.dtsi +++ b/arch/mips/dts/brcm,bcm63268.dtsi @@ -22,20 +22,20 @@ reg = <0x10000000 0x4>; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; cpu@0 { compatible = "brcm,bcm63268-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; cpu@1 { compatible = "brcm,bcm63268-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -43,7 +43,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; hsspi_pll: hsspi-pll { compatible = "fixed-clock"; @@ -55,7 +55,7 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; - u-boot,dm-pre-reloc; + bootph-all; }; periph_clk: periph-clk { @@ -75,7 +75,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; pll_cntl: syscon@10000008 { compatible = "syscon"; @@ -234,7 +234,7 @@ memory-controller@10003000 { compatible = "brcm,bcm6328-mc"; reg = <0x10003000 0x894>; - u-boot,dm-pre-reloc; + bootph-all; }; iudma: dma-controller@1000d800 { diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mips/dts/brcm,bcm6328.dtsi index 350c0e903b..7b9c09c68a 100644 --- a/arch/mips/dts/brcm,bcm6328.dtsi +++ b/arch/mips/dts/brcm,bcm6328.dtsi @@ -21,20 +21,20 @@ reg = <0x10000000 0x4>; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; cpu@0 { compatible = "brcm,bcm6328-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; cpu@1 { compatible = "brcm,bcm6328-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -42,7 +42,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; hsspi_pll: hsspi-pll { compatible = "fixed-clock"; @@ -54,7 +54,7 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; - u-boot,dm-pre-reloc; + bootph-all; }; periph_clk: periph-clk { @@ -68,7 +68,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; periph_rst: reset-controller@10000010 { compatible = "brcm,bcm6345-reset"; @@ -202,7 +202,7 @@ memory-controller@10003000 { compatible = "brcm,bcm6328-mc"; reg = <0x10003000 0x864>; - u-boot,dm-pre-reloc; + bootph-all; }; iudma: dma-controller@1000d800 { diff --git a/arch/mips/dts/brcm,bcm6338.dtsi b/arch/mips/dts/brcm,bcm6338.dtsi index c547e949dd..92e4d62941 100644 --- a/arch/mips/dts/brcm,bcm6338.dtsi +++ b/arch/mips/dts/brcm,bcm6338.dtsi @@ -20,13 +20,13 @@ reg = <0xfffe0000 0x4>; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; cpu@0 { compatible = "brcm,bcm6338-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -34,13 +34,13 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; periph_osc: periph-osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; - u-boot,dm-pre-reloc; + bootph-all; }; periph_clk: periph-clk { @@ -64,7 +64,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; pll_cntl: syscon@fffe0008 { compatible = "syscon"; @@ -129,7 +129,7 @@ memory-controller@fffe3100 { compatible = "brcm,bcm6338-mc"; reg = <0xfffe3100 0x38>; - u-boot,dm-pre-reloc; + bootph-all; }; iudma: dma-controller@fffe2400 { diff --git a/arch/mips/dts/brcm,bcm6348.dtsi b/arch/mips/dts/brcm,bcm6348.dtsi index 79e7bd892b..3f1471b67c 100644 --- a/arch/mips/dts/brcm,bcm6348.dtsi +++ b/arch/mips/dts/brcm,bcm6348.dtsi @@ -20,13 +20,13 @@ reg = <0xfffe0000 0x4>; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; cpu@0 { compatible = "brcm,bcm6348-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -34,13 +34,13 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; periph_osc: periph-osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; - u-boot,dm-pre-reloc; + bootph-all; }; periph_clk: periph-clk { @@ -64,7 +64,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; pll_cntl: syscon@fffe0008 { compatible = "syscon"; @@ -158,7 +158,7 @@ memory-controller@fffe2300 { compatible = "brcm,bcm6338-mc"; reg = <0xfffe2300 0x38>; - u-boot,dm-pre-reloc; + bootph-all; }; enet0: ethernet@fffe6000 { diff --git a/arch/mips/dts/brcm,bcm6358.dtsi b/arch/mips/dts/brcm,bcm6358.dtsi index 5e9c9ad769..d53e4f7ac0 100644 --- a/arch/mips/dts/brcm,bcm6358.dtsi +++ b/arch/mips/dts/brcm,bcm6358.dtsi @@ -20,20 +20,20 @@ reg = <0xfffe0000 0x4>; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; cpu@0 { compatible = "brcm,bcm6358-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; cpu@1 { compatible = "brcm,bcm6358-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -41,13 +41,13 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; periph_osc: periph-osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; - u-boot,dm-pre-reloc; + bootph-all; }; periph_clk: periph-clk { @@ -71,7 +71,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; pll_cntl: syscon@fffe0008 { compatible = "syscon"; @@ -162,7 +162,7 @@ memory-controller@fffe1200 { compatible = "brcm,bcm6358-mc"; reg = <0xfffe1200 0x4c>; - u-boot,dm-pre-reloc; + bootph-all; }; ehci: usb-controller@fffe1300 { diff --git a/arch/mips/dts/brcm,bcm6362.dtsi b/arch/mips/dts/brcm,bcm6362.dtsi index 71598f97b3..b1f0085c96 100644 --- a/arch/mips/dts/brcm,bcm6362.dtsi +++ b/arch/mips/dts/brcm,bcm6362.dtsi @@ -22,20 +22,20 @@ reg = <0x10000000 0x4>; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; cpu@0 { compatible = "brcm,bcm6362-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; cpu@1 { compatible = "brcm,bcm6362-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -43,7 +43,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; hsspi_pll: hsspi-pll { compatible = "fixed-clock"; @@ -55,7 +55,7 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; - u-boot,dm-pre-reloc; + bootph-all; }; periph_clk: periph-clk { @@ -69,7 +69,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; pll_cntl: syscon@10000008 { compatible = "syscon"; @@ -228,7 +228,7 @@ memory-controller@10003000 { compatible = "brcm,bcm6328-mc"; reg = <0x10003000 0x864>; - u-boot,dm-pre-reloc; + bootph-all; }; iudma: dma-controller@1000d800 { diff --git a/arch/mips/dts/brcm,bcm6368.dtsi b/arch/mips/dts/brcm,bcm6368.dtsi index 69be65056e..ea50ff9200 100644 --- a/arch/mips/dts/brcm,bcm6368.dtsi +++ b/arch/mips/dts/brcm,bcm6368.dtsi @@ -20,20 +20,20 @@ reg = <0x10000000 0x4>; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; cpu@0 { compatible = "brcm,bcm6368-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; cpu@1 { compatible = "brcm,bcm6368-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -41,13 +41,13 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; periph_osc: periph-osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; - u-boot,dm-pre-reloc; + bootph-all; }; periph_clk: periph-clk { @@ -71,7 +71,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; pll_cntl: syscon@10000008 { compatible = "syscon"; @@ -180,7 +180,7 @@ memory-controller@10001200 { compatible = "brcm,bcm6358-mc"; reg = <0x10001200 0x4c>; - u-boot,dm-pre-reloc; + bootph-all; }; ehci: usb-controller@10001500 { diff --git a/arch/mips/dts/brcm,bcm6838.dtsi b/arch/mips/dts/brcm,bcm6838.dtsi index 6676f83b2a..4032e24528 100644 --- a/arch/mips/dts/brcm,bcm6838.dtsi +++ b/arch/mips/dts/brcm,bcm6838.dtsi @@ -12,32 +12,32 @@ reg = <0x14e00000 0x4>; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; cpu@0 { compatible = "brcm,bcm6838-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <0>; - u-boot,dm-pre-reloc; + bootph-all; }; cpu@1 { compatible = "brcm,bcm6838-cpu", "mips,mips4Kc"; device_type = "cpu"; reg = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; }; clocks { compatible = "simple-bus"; - u-boot,dm-pre-reloc; + bootph-all; periph_osc: periph-osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -45,12 +45,12 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; memory: memory-controller@12000000 { compatible = "brcm,bcm6328-mc"; reg = <0x12000000 0x1000>; - u-boot,dm-pre-reloc; + bootph-all; }; gpio_test_port: syscon@14e00294 { diff --git a/arch/mips/dts/brcm,bcm968380gerg.dts b/arch/mips/dts/brcm,bcm968380gerg.dts index 5a5ac0ea7d..c7835a7c0a 100644 --- a/arch/mips/dts/brcm,bcm968380gerg.dts +++ b/arch/mips/dts/brcm,bcm968380gerg.dts @@ -25,7 +25,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/mips/dts/comtrend,ar-5315u.dts b/arch/mips/dts/comtrend,ar-5315u.dts index 28443b3b0f..65f5184c09 100644 --- a/arch/mips/dts/comtrend,ar-5315u.dts +++ b/arch/mips/dts/comtrend,ar-5315u.dts @@ -119,7 +119,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/mips/dts/comtrend,ar-5387un.dts b/arch/mips/dts/comtrend,ar-5387un.dts index 12ace64621..e5163d6147 100644 --- a/arch/mips/dts/comtrend,ar-5387un.dts +++ b/arch/mips/dts/comtrend,ar-5387un.dts @@ -103,7 +103,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/mips/dts/comtrend,ct-5361.dts b/arch/mips/dts/comtrend,ct-5361.dts index f6b8a94e25..8170095abd 100644 --- a/arch/mips/dts/comtrend,ct-5361.dts +++ b/arch/mips/dts/comtrend,ct-5361.dts @@ -59,7 +59,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/mips/dts/comtrend,vr-3032u.dts b/arch/mips/dts/comtrend,vr-3032u.dts index 110119b507..55a70d215e 100644 --- a/arch/mips/dts/comtrend,vr-3032u.dts +++ b/arch/mips/dts/comtrend,vr-3032u.dts @@ -117,7 +117,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/mips/dts/comtrend,wap-5813n.dts b/arch/mips/dts/comtrend,wap-5813n.dts index 7e835b28d2..2625d4e03a 100644 --- a/arch/mips/dts/comtrend,wap-5813n.dts +++ b/arch/mips/dts/comtrend,wap-5813n.dts @@ -81,7 +81,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/mips/dts/huawei,hg556a.dts b/arch/mips/dts/huawei,hg556a.dts index 6a7fc1df4b..ce28a25d29 100644 --- a/arch/mips/dts/huawei,hg556a.dts +++ b/arch/mips/dts/huawei,hg556a.dts @@ -118,7 +118,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/mips/dts/img,boston.dts b/arch/mips/dts/img,boston.dts index 1d4eeda4e8..c1a7396303 100644 --- a/arch/mips/dts/img,boston.dts +++ b/arch/mips/dts/img,boston.dts @@ -178,14 +178,14 @@ plat_regs: system-controller@17ffd000 { compatible = "img,boston-platform-regs", "syscon"; reg = <0x17ffd000 0x1000>; - u-boot,dm-pre-reloc; + bootph-all; }; clk_boston: clock { compatible = "img,boston-clock"; #clock-cells = <1>; regmap = <&plat_regs>; - u-boot,dm-pre-reloc; + bootph-all; }; reboot: syscon-reboot { @@ -206,7 +206,7 @@ clocks = <&clk_boston BOSTON_CLK_SYS>; - u-boot,dm-pre-reloc; + bootph-all; }; lcd: lcd@17fff000 { diff --git a/arch/mips/dts/mrvl,cn73xx.dtsi b/arch/mips/dts/mrvl,cn73xx.dtsi index 77f3548a32..23aac65406 100644 --- a/arch/mips/dts/mrvl,cn73xx.dtsi +++ b/arch/mips/dts/mrvl,cn73xx.dtsi @@ -43,7 +43,7 @@ clk: clock { compatible = "mrvl,octeon-clk"; #clock-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; gpio: gpio-controller@1070000000800 { @@ -77,7 +77,7 @@ #size-cells = <0>; compatible = "cavium,octeon-7xxx-l2c"; reg = <0x11800 0x80000000 0x0 0x01000000>; - u-boot,dm-pre-reloc; + bootph-all; }; lmc: lmc@1180088000000 { @@ -85,7 +85,7 @@ #size-cells = <0>; compatible = "cavium,octeon-7xxx-ddr4"; reg = <0x11800 0x88000000 0x0 0x02000000>; // 2 IFs - u-boot,dm-pre-reloc; + bootph-all; l2c-handle = <&l2c>; }; diff --git a/arch/mips/dts/mrvl,octeon-ebb7304.dts b/arch/mips/dts/mrvl,octeon-ebb7304.dts index 08247eb4e0..59e43b9c77 100644 --- a/arch/mips/dts/mrvl,octeon-ebb7304.dts +++ b/arch/mips/dts/mrvl,octeon-ebb7304.dts @@ -113,7 +113,7 @@ }; &i2c0 { - u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */ + bootph-all; /* Needed early for DDR SPD EEPROM */ clock-frequency = <100000>; rtc@68 { @@ -129,7 +129,7 @@ }; &i2c1 { - u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */ + bootph-all; /* Needed early for DDR SPD EEPROM */ clock-frequency = <100000>; }; diff --git a/arch/mips/dts/mrvl,octeon-nic23.dts b/arch/mips/dts/mrvl,octeon-nic23.dts index dfbd51c924..e58a66431a 100644 --- a/arch/mips/dts/mrvl,octeon-nic23.dts +++ b/arch/mips/dts/mrvl,octeon-nic23.dts @@ -116,7 +116,7 @@ }; &i2c0 { - u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */ + bootph-all; /* Needed early for DDR SPD EEPROM */ clock-frequency = <100000>; sfp0eeprom: eeprom@50 { @@ -131,7 +131,7 @@ }; &i2c1 { - u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */ + bootph-all; /* Needed early for DDR SPD EEPROM */ clock-frequency = <100000>; vitesse@10 { diff --git a/arch/mips/dts/mt7620-u-boot.dtsi b/arch/mips/dts/mt7620-u-boot.dtsi index ed8425719b..5038408471 100644 --- a/arch/mips/dts/mt7620-u-boot.dtsi +++ b/arch/mips/dts/mt7620-u-boot.dtsi @@ -6,9 +6,9 @@ */ &uartlite { - u-boot,dm-pre-reloc; + bootph-all; }; &uartfull { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/mips/dts/mt7621-u-boot.dtsi b/arch/mips/dts/mt7621-u-boot.dtsi index c5a8aa357f..fbac2ade25 100644 --- a/arch/mips/dts/mt7621-u-boot.dtsi +++ b/arch/mips/dts/mt7621-u-boot.dtsi @@ -14,35 +14,35 @@ }; &sysc { - u-boot,dm-pre-reloc; + bootph-all; }; &reboot { - u-boot,dm-pre-reloc; + bootph-all; }; &clkctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &rstctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &binman { diff --git a/arch/mips/dts/mt7628-u-boot.dtsi b/arch/mips/dts/mt7628-u-boot.dtsi index eea5dc64bf..83026fd885 100644 --- a/arch/mips/dts/mt7628-u-boot.dtsi +++ b/arch/mips/dts/mt7628-u-boot.dtsi @@ -6,33 +6,33 @@ */ &palmbus { - u-boot,dm-pre-reloc; + bootph-all; }; &reboot { - u-boot,dm-pre-reloc; + bootph-all; }; &clkctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &rstctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart1 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi index 6baa63add3..8ac206280c 100644 --- a/arch/mips/dts/mt7628a.dtsi +++ b/arch/mips/dts/mt7628a.dtsi @@ -58,7 +58,7 @@ reg-names = "syscfg0", "clkcfg"; compatible = "mediatek,mt7628-clk"; #clock-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; rstctrl: rstctrl@0x34 { diff --git a/arch/mips/dts/mti,malta.dts b/arch/mips/dts/mti,malta.dts index ef47a340bb..b6af1ffd76 100644 --- a/arch/mips/dts/mti,malta.dts +++ b/arch/mips/dts/mti,malta.dts @@ -26,7 +26,7 @@ clock-frequency = <1843200>; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/arch/mips/dts/netgear,cg3100d.dts b/arch/mips/dts/netgear,cg3100d.dts index a42a0da2dd..1c5b8ebec8 100644 --- a/arch/mips/dts/netgear,cg3100d.dts +++ b/arch/mips/dts/netgear,cg3100d.dts @@ -102,6 +102,6 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/mips/dts/netgear,dgnd3700v2.dts b/arch/mips/dts/netgear,dgnd3700v2.dts index 88fca647cd..72314558da 100644 --- a/arch/mips/dts/netgear,dgnd3700v2.dts +++ b/arch/mips/dts/netgear,dgnd3700v2.dts @@ -137,7 +137,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/mips/dts/pic32mzda_sk.dts b/arch/mips/dts/pic32mzda_sk.dts index fc86154e0a..b9b78b507e 100644 --- a/arch/mips/dts/pic32mzda_sk.dts +++ b/arch/mips/dts/pic32mzda_sk.dts @@ -26,17 +26,17 @@ microchip,refo4-frequency = <25000000>; microchip,refo5-frequency = <40000000>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; &pinctrl { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; &sdhci { diff --git a/arch/mips/dts/qca953x.dtsi b/arch/mips/dts/qca953x.dtsi index 90d34ddbbf..148de76863 100644 --- a/arch/mips/dts/qca953x.dtsi +++ b/arch/mips/dts/qca953x.dtsi @@ -35,7 +35,7 @@ }; pinctrl { - u-boot,dm-pre-reloc; + bootph-all; compatible = "qca,qca953x-pinctrl"; ranges; #address-cells = <1>; diff --git a/arch/mips/dts/sagem,f@st1704.dts b/arch/mips/dts/sagem,f@st1704.dts index 98ed353f20..4e1340bfd5 100644 --- a/arch/mips/dts/sagem,f@st1704.dts +++ b/arch/mips/dts/sagem,f@st1704.dts @@ -68,6 +68,6 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/mips/dts/sfr,nb4-ser.dts b/arch/mips/dts/sfr,nb4-ser.dts index dfbc4148dc..ad3a4ce8a8 100644 --- a/arch/mips/dts/sfr,nb4-ser.dts +++ b/arch/mips/dts/sfr,nb4-ser.dts @@ -119,7 +119,7 @@ }; &uart0 { - u-boot,dm-pre-reloc; + bootph-all; status = "okay"; }; diff --git a/arch/nios2/dts/10m50_devboard.dts b/arch/nios2/dts/10m50_devboard.dts index 9cd40165ab..df645962da 100644 --- a/arch/nios2/dts/10m50_devboard.dts +++ b/arch/nios2/dts/10m50_devboard.dts @@ -18,7 +18,7 @@ #size-cells = <0>; cpu: cpu@0 { - u-boot,dm-pre-reloc; + bootph-all; device_type = "cpu"; compatible = "altr,nios2-1.1"; reg = <0x00000000>; diff --git a/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi b/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi index 3439737fa3..edbee7d0c9 100644 --- a/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi +++ b/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi @@ -21,13 +21,13 @@ cpus { compatible = "cpu_bus"; - u-boot,dm-pre-reloc; + bootph-all; PowerPC,8308@0 { compatible = "fsl,mpc8308"; clocks = <&socclocks MPC83XX_CLK_CORE &socclocks MPC83XX_CLK_CSB>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -66,7 +66,7 @@ socclocks: clocks { compatible = "fsl,mpc8308-clk"; #clock-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; }; timer { @@ -178,11 +178,11 @@ }; &board_soc { - u-boot,dm-pre-reloc; + bootph-all; clocks = <&socclocks MPC83XX_CLK_CSB>; memory@2000 { - u-boot,dm-pre-reloc; + bootph-all; }; sdhc@2e000 { @@ -228,21 +228,21 @@ }; &board_soc { - u-boot,dm-pre-reloc; + bootph-all; }; &GPIO_VB0 { - u-boot,dm-pre-reloc; + bootph-all; }; &serial0 { clocks = <&socclocks MPC83XX_CLK_CSB>; - u-boot,dm-pre-reloc; + bootph-all; }; &serial1 { clocks = <&socclocks MPC83XX_CLK_CSB>; - u-boot,dm-pre-reloc; + bootph-all; }; &pci0 { diff --git a/arch/powerpc/dts/km8321-uboot.dtsi b/arch/powerpc/dts/km8321-uboot.dtsi index fd11fe63e0..7e776f8872 100644 --- a/arch/powerpc/dts/km8321-uboot.dtsi +++ b/arch/powerpc/dts/km8321-uboot.dtsi @@ -8,9 +8,9 @@ / { cpus { - u-boot,dm-pre-reloc; + bootph-all; PowerPC,8321@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -29,39 +29,39 @@ &serial0 { clock-frequency = <132000000>; - u-boot,dm-pre-reloc; + bootph-all; }; &soc { - u-boot,dm-pre-reloc; + bootph-all; par_io@1400 { compatible = "fsl,mpc8360-par_io"; - u-boot,dm-pre-reloc; + bootph-all; serial_pin@0 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@0 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@1 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@3 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@4 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@5 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@6 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@7 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/arch/powerpc/dts/km836x-uboot.dtsi b/arch/powerpc/dts/km836x-uboot.dtsi index 5c78529c44..50c886bc18 100644 --- a/arch/powerpc/dts/km836x-uboot.dtsi +++ b/arch/powerpc/dts/km836x-uboot.dtsi @@ -8,9 +8,9 @@ / { cpus { - u-boot,dm-pre-reloc; + bootph-all; PowerPC,8360@0 { - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -24,38 +24,38 @@ }; &soc { - u-boot,dm-pre-reloc; + bootph-all; par_io@1400 { - u-boot,dm-pre-reloc; + bootph-all; serial_pin@0 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@0 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@1 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@3 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@4 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@5 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@6 { - u-boot,dm-pre-reloc; + bootph-all; }; ucc_pin@7 { - u-boot,dm-pre-reloc; + bootph-all; }; }; }; &serial0 { - u-boot,dm-pre-reloc; + bootph-all; }; diff --git a/arch/powerpc/dts/kmcent2-u-boot.dtsi b/arch/powerpc/dts/kmcent2-u-boot.dtsi index d027762764..b26e240bc4 100644 --- a/arch/powerpc/dts/kmcent2-u-boot.dtsi +++ b/arch/powerpc/dts/kmcent2-u-boot.dtsi @@ -24,7 +24,7 @@ }; soc@ffe000000 { - u-boot,dm-pre-reloc; + bootph-all; spi@110000 { /* This documents where km_fpgacfg should be appear */ fpga@0 { @@ -39,7 +39,7 @@ }; i2c@118000 { - u-boot,dm-pre-reloc; + bootph-all; mux@70 { i2c@1 { /* IVM bus */ reg = <1>; @@ -50,7 +50,7 @@ }; serial@11c500 { - u-boot,dm-pre-reloc; + bootph-all; clock-frequency = <200000000>; }; diff --git a/arch/powerpc/dts/pq3-i2c-0.dtsi b/arch/powerpc/dts/pq3-i2c-0.dtsi index 0ed519c2e5..a838bd9e7a 100644 --- a/arch/powerpc/dts/pq3-i2c-0.dtsi +++ b/arch/powerpc/dts/pq3-i2c-0.dtsi @@ -9,7 +9,7 @@ i2c@3000 { #size-cells = <0>; cell-index = <0>; compatible = "fsl-i2c"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x3000 0x100>; interrupts = <43 2 0 0>; dfsrr; diff --git a/arch/powerpc/dts/pq3-i2c-1.dtsi b/arch/powerpc/dts/pq3-i2c-1.dtsi index 78b0fcf81d..96cd009ac7 100644 --- a/arch/powerpc/dts/pq3-i2c-1.dtsi +++ b/arch/powerpc/dts/pq3-i2c-1.dtsi @@ -9,7 +9,7 @@ i2c@3100 { #size-cells = <0>; cell-index = <1>; compatible = "fsl-i2c"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x3100 0x100>; interrupts = <43 2 0 0>; dfsrr; diff --git a/arch/powerpc/dts/qoriq-i2c-0.dtsi b/arch/powerpc/dts/qoriq-i2c-0.dtsi index 9d0ab886e7..7fb09e0125 100644 --- a/arch/powerpc/dts/qoriq-i2c-0.dtsi +++ b/arch/powerpc/dts/qoriq-i2c-0.dtsi @@ -9,7 +9,7 @@ i2c0: i2c@118000 { #size-cells = <0>; cell-index = <0>; compatible = "fsl-i2c"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x118000 0x100>; interrupts = <38 2 0 0>; }; @@ -19,7 +19,7 @@ i2c1: i2c@118100 { #size-cells = <0>; cell-index = <1>; compatible = "fsl-i2c"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x118100 0x100>; interrupts = <38 2 0 0>; }; diff --git a/arch/powerpc/dts/qoriq-i2c-1.dtsi b/arch/powerpc/dts/qoriq-i2c-1.dtsi index de0a22e3e0..f469abc1f5 100644 --- a/arch/powerpc/dts/qoriq-i2c-1.dtsi +++ b/arch/powerpc/dts/qoriq-i2c-1.dtsi @@ -9,7 +9,7 @@ i2c2: i2c@119000 { #size-cells = <0>; cell-index = <2>; compatible = "fsl-i2c"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x119000 0x100>; interrupts = <39 2 0 0>; }; @@ -19,7 +19,7 @@ i2c3: i2c@119100 { #size-cells = <0>; cell-index = <3>; compatible = "fsl-i2c"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x119100 0x100>; interrupts = <39 2 0 0>; }; diff --git a/arch/powerpc/dts/socrates-u-boot.dtsi b/arch/powerpc/dts/socrates-u-boot.dtsi index 88df031732..c2a28eaebf 100644 --- a/arch/powerpc/dts/socrates-u-boot.dtsi +++ b/arch/powerpc/dts/socrates-u-boot.dtsi @@ -16,7 +16,7 @@ soc8544@e0000000 { i2c@3000 { - u-boot,dm-pre-reloc; + bootph-all; i2c_eeprom0: eeprom@51{ compatible = "atmel,24c64"; @@ -34,7 +34,7 @@ }; &serial0 { - u-boot,dm-pre-reloc; + bootph-all; clock-frequency = <333333330>; }; diff --git a/arch/riscv/dts/ae350-u-boot.dtsi b/arch/riscv/dts/ae350-u-boot.dtsi index 7011f59831..aef9159b7a 100644 --- a/arch/riscv/dts/ae350-u-boot.dtsi +++ b/arch/riscv/dts/ae350-u-boot.dtsi @@ -2,51 +2,51 @@ / { cpus { - u-boot,dm-spl; + bootph-pre-ram; CPU0: cpu@0 { - u-boot,dm-spl; + bootph-pre-ram; CPU0_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; CPU1: cpu@1 { - u-boot,dm-spl; + bootph-pre-ram; CPU1_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; CPU2: cpu@2 { - u-boot,dm-spl; + bootph-pre-ram; CPU2_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; CPU3: cpu@3 { - u-boot,dm-spl; + bootph-pre-ram; CPU3_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; }; memory@0 { - u-boot,dm-spl; + bootph-pre-ram; }; soc { - u-boot,dm-spl; + bootph-pre-ram; plicsw: interrupt-controller@e6400000 { - u-boot,dm-spl; + bootph-pre-ram; }; plmt0@e6000000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; serial0: serial@f0300000 { - u-boot,dm-spl; + bootph-pre-ram; }; }; diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi b/arch/riscv/dts/fu540-c000-u-boot.dtsi index b7cd600b8c..360679a178 100644 --- a/arch/riscv/dts/fu540-c000-u-boot.dtsi +++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi @@ -9,47 +9,47 @@ cpus { assigned-clocks = <&prci PRCI_CLK_COREPLL>; assigned-clock-rates = <1000000000>; - u-boot,dm-spl; + bootph-pre-ram; cpu0: cpu@0 { clocks = <&prci PRCI_CLK_COREPLL>; - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; cpu0_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; cpu1: cpu@1 { clocks = <&prci PRCI_CLK_COREPLL>; - u-boot,dm-spl; + bootph-pre-ram; cpu1_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; cpu2: cpu@2 { clocks = <&prci PRCI_CLK_COREPLL>; - u-boot,dm-spl; + bootph-pre-ram; cpu2_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; cpu3: cpu@3 { clocks = <&prci PRCI_CLK_COREPLL>; - u-boot,dm-spl; + bootph-pre-ram; cpu3_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; cpu4: cpu@4 { clocks = <&prci PRCI_CLK_COREPLL>; - u-boot,dm-spl; + bootph-pre-ram; cpu4_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; }; soc { - u-boot,dm-spl; + bootph-pre-ram; otp: otp@10070000 { compatible = "sifive,fu540-c000-otp"; reg = <0x0 0x10070000 0x0 0x1000>; @@ -63,7 +63,7 @@ &cpu3_intc 3 &cpu3_intc 7 &cpu4_intc 3 &cpu4_intc 7>; reg = <0x0 0x2000000 0x0 0x10000>; - u-boot,dm-spl; + bootph-pre-ram; }; prci: clock-controller@10000000 { #reset-cells = <1>; @@ -82,21 +82,21 @@ 0x0 0x100b8000 0x0 0x1000>; clocks = <&prci PRCI_CLK_DDRPLL>; clock-frequency = <933333324>; - u-boot,dm-spl; + bootph-pre-ram; }; }; }; &prci { - u-boot,dm-spl; + bootph-pre-ram; }; &uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &qspi2 { - u-boot,dm-spl; + bootph-pre-ram; }; ð0 { diff --git a/arch/riscv/dts/fu740-c000-u-boot.dtsi b/arch/riscv/dts/fu740-c000-u-boot.dtsi index 917e9bf163..706224b384 100644 --- a/arch/riscv/dts/fu740-c000-u-boot.dtsi +++ b/arch/riscv/dts/fu740-c000-u-boot.dtsi @@ -9,47 +9,47 @@ cpus { assigned-clocks = <&prci FU740_PRCI_CLK_COREPLL>; assigned-clock-rates = <1200000000>; - u-boot,dm-spl; + bootph-pre-ram; cpu0: cpu@0 { clocks = <&prci FU740_PRCI_CLK_COREPLL>; - u-boot,dm-spl; + bootph-pre-ram; status = "okay"; cpu0_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; cpu1: cpu@1 { clocks = <&prci FU740_PRCI_CLK_COREPLL>; - u-boot,dm-spl; + bootph-pre-ram; cpu1_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; cpu2: cpu@2 { clocks = <&prci FU740_PRCI_CLK_COREPLL>; - u-boot,dm-spl; + bootph-pre-ram; cpu2_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; cpu3: cpu@3 { clocks = <&prci FU740_PRCI_CLK_COREPLL>; - u-boot,dm-spl; + bootph-pre-ram; cpu3_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; cpu4: cpu@4 { clocks = <&prci FU740_PRCI_CLK_COREPLL>; - u-boot,dm-spl; + bootph-pre-ram; cpu4_intc: interrupt-controller { - u-boot,dm-spl; + bootph-pre-ram; }; }; }; soc { - u-boot,dm-spl; + bootph-pre-ram; clint: clint@2000000 { compatible = "riscv,clint0"; interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7 @@ -58,7 +58,7 @@ &cpu3_intc 3 &cpu3_intc 7 &cpu4_intc 3 &cpu4_intc 7>; reg = <0x0 0x2000000 0x0 0x10000>; - u-boot,dm-spl; + bootph-pre-ram; }; prci: clock-controller@10000000 { #reset-cells = <1>; @@ -78,25 +78,25 @@ 0x0 0x100b8000 0x0 0x1000>; clocks = <&prci FU740_PRCI_CLK_DDRPLL>; clock-frequency = <933333324>; - u-boot,dm-spl; + bootph-pre-ram; }; }; }; &prci { - u-boot,dm-spl; + bootph-pre-ram; }; &uart0 { - u-boot,dm-spl; + bootph-pre-ram; }; &spi0 { - u-boot,dm-spl; + bootph-pre-ram; }; &i2c0 { - u-boot,dm-spl; + bootph-pre-ram; }; ð0 { diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi index 51b566116d..e89b7d01d0 100644 --- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi @@ -22,15 +22,15 @@ }; memory@80000000 { - u-boot,dm-spl; + bootph-pre-ram; }; hfclk { - u-boot,dm-spl; + bootph-pre-ram; }; rtcclk { - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -40,19 +40,19 @@ }; &qspi0 { - u-boot,dm-spl; + bootph-pre-ram; flash@0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &qspi2 { mmc@0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &gpio { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi index 1ee8ab1868..39d62776c7 100644 --- a/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi +++ b/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi @@ -13,7 +13,7 @@ }; memory@80000000 { - u-boot,dm-spl; + bootph-pre-ram; }; config { @@ -21,11 +21,11 @@ }; hfclk { - u-boot,dm-spl; + bootph-pre-ram; }; rtcclk { - u-boot,dm-spl; + bootph-pre-ram; }; }; @@ -35,18 +35,18 @@ }; &qspi0 { - u-boot,dm-spl; + bootph-pre-ram; flash@0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &spi0 { mmc@0 { - u-boot,dm-spl; + bootph-pre-ram; }; }; &gpio { - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi index 3cc8379133..6b8586066f 100644 --- a/arch/riscv/dts/k210.dtsi +++ b/arch/riscv/dts/k210.dtsi @@ -91,7 +91,7 @@ <&sysclk K210_CLK_SRAM1>, <&sysclk K210_CLK_AI>; clock-names = "sram0", "sram1", "aisram"; - u-boot,dm-pre-reloc; + bootph-all; }; clocks { @@ -99,7 +99,7 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -521,7 +521,7 @@ clocks = <&sysclk K210_CLK_APB1>; clock-names = "pclk"; reg-io-width = <4>; - u-boot,dm-pre-reloc; + bootph-all; sysclk: clock-controller { #clock-cells = <1>; @@ -529,7 +529,7 @@ clocks = <&in0>; assigned-clocks = <&sysclk K210_CLK_PLL1>; assigned-clock-rates = <390000000>; - u-boot,dm-pre-reloc; + bootph-all; }; sysrst: reset-controller { diff --git a/arch/riscv/dts/openpiton-riscv64.dts b/arch/riscv/dts/openpiton-riscv64.dts index abc6016a0b..e0553d520f 100644 --- a/arch/riscv/dts/openpiton-riscv64.dts +++ b/arch/riscv/dts/openpiton-riscv64.dts @@ -32,7 +32,7 @@ CPU0: cpu@0 { clocks = <&clk0>; - u-boot,dm-spl; + bootph-pre-ram; device_type = "cpu"; reg = <0>; compatible = "openhwgroup,cva6", "riscv"; @@ -74,7 +74,7 @@ }; memory@80000000 { - u-boot,dm-spl; + bootph-pre-ram; device_type = "memory"; reg = < 0x00000000 0x80000000 0x00000000 0x40000000 >; }; @@ -121,7 +121,7 @@ }; sdhci_0: sdhci@f000000000 { - u-boot,dm-spl; + bootph-pre-ram; compatible = "openpiton,piton-mmc", "openpiton,mmc"; reg = < 0x000000f0 0x00000000 0x00000000 0x00300000 >; }; @@ -137,7 +137,7 @@ }; PLIC0: plic@fff1100000 { - u-boot,dm-spl; + bootph-pre-ram; #interrupt-cells = <1>; compatible = "sifive,plic-1.0.0", "openpiton,plic"; interrupt-controller; diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts index 88b57bfb7e..a4c1b8f6cb 100644 --- a/arch/sandbox/dts/sandbox.dts +++ b/arch/sandbox/dts/sandbox.dts @@ -49,7 +49,7 @@ cros_ec: cros-ec { reg = <0 0>; - u-boot,dm-pre-proper; + bootph-some-ram; compatible = "google,cros-ec-sandbox"; }; @@ -76,7 +76,7 @@ clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; - u-boot,dm-pre-reloc; + bootph-all; }; pcic: pci@0 { @@ -90,7 +90,7 @@ }; spi: spi@0 { - u-boot,dm-pre-proper; + bootph-some-ram; #address-cells = <1>; #size-cells = <0>; reg = <0 0>; diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi index 7e7fcff6d2..1f446e62e1 100644 --- a/arch/sandbox/dts/sandbox.dtsi +++ b/arch/sandbox/dts/sandbox.dtsi @@ -49,14 +49,14 @@ }; clk_fixed: clk-fixed { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,fixed-clock"; #clock-cells = <0>; clock-frequency = <1234>; }; clk_sandbox: clk-sbox { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,clk"; #clock-cells = <1>; assigned-clocks = <&clk_sandbox 3>; @@ -64,7 +64,7 @@ }; clk-test { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,clk-test"; clocks = <&clk_fixed>, <&clk_sandbox 1>, @@ -75,7 +75,7 @@ }; gpio_a: gpios@0 { - u-boot,dm-pre-proper; + bootph-some-ram; gpio-controller; compatible = "sandbox,gpio"; #gpio-cells = <1>; @@ -84,7 +84,7 @@ }; gpio_b: gpios@1 { - u-boot,dm-spl; + bootph-pre-ram; gpio-controller; compatible = "sandbox,gpio"; #gpio-cells = <2>; @@ -93,7 +93,7 @@ }; gpio-test { - u-boot,dm-spl; + bootph-pre-ram; compatible = "sandbox,gpio-test"; test-gpios = <&gpio_b 3 0>; }; @@ -115,7 +115,7 @@ reg = <0x43>; compatible = "sandbox-rtc"; sandbox,emul = <&emul0>; - u-boot,dm-pre-reloc; + bootph-all; }; sandbox_pmic: sandbox_pmic { reg = <0x40>; @@ -126,7 +126,7 @@ }; i2c_emul: emul { - u-boot,dm-pre-reloc; + bootph-all; reg = <0xff>; compatible = "sandbox,i2c-emul-parent"; emul_eeprom: emul-eeprom { @@ -136,7 +136,7 @@ #emul-cells = <0>; }; emul0: emul0 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,i2c-rtc-emul"; #emul-cells = <0>; }; @@ -149,20 +149,20 @@ }; irq_sandbox: irq-sbox { - u-boot,dm-spl; + bootph-pre-ram; compatible = "sandbox,irq"; interrupt-controller; #interrupt-cells = <2>; }; irq-test { - u-boot,dm-spl; + bootph-pre-ram; compatible = "sandbox,irq-test"; interrupts-extended = <&irq_sandbox 3 0>; }; lcd { - u-boot,dm-pre-proper; + bootph-some-ram; compatible = "sandbox,lcd-sdl"; xres = <1366>; yres = <768>; @@ -236,7 +236,7 @@ reset@1 { compatible = "sandbox,reset"; - u-boot,dm-pre-proper; + bootph-some-ram; }; rng { @@ -260,7 +260,7 @@ spi@0 { firmware_storage_spi: flash@0 { - u-boot,dm-pre-proper; + bootph-some-ram; reg = <0>; compatible = "spansion,m25p16", "jedec,spi-nor"; spi-max-frequency = <40000000>; @@ -269,7 +269,7 @@ }; spl-test { - u-boot,dm-spl; + bootph-pre-ram; compatible = "sandbox,spl-test"; boolval; intval = <1>; @@ -283,7 +283,7 @@ }; spl-test2 { - u-boot,dm-spl; + bootph-pre-ram; compatible = "sandbox,spl-test"; intval = <3>; intarray = <5>; @@ -295,26 +295,26 @@ }; spl-test3 { - u-boot,dm-spl; + bootph-pre-ram; compatible = "sandbox,spl-test"; stringarray = "one"; maybe-empty-int = <1>; }; spl-test5 { - u-boot,dm-vpl; + bootph-verify; compatible = "sandbox,spl-test"; stringarray = "tpl"; }; spl-test6 { - u-boot,dm-pre-proper; + bootph-some-ram; compatible = "sandbox,spl-test"; stringarray = "pre-proper"; }; spl-test7 { - u-boot,dm-spl; + bootph-pre-ram; compatible = "sandbox,spl-test"; stringarray = "spl"; }; @@ -348,9 +348,9 @@ /* Needs to be available prior to relocation */ uart0: serial { - u-boot,dm-spl; - u-boot,dm-tpl; - u-boot,dm-vpl; + bootph-pre-ram; + bootph-pre-sram; + bootph-verify; compatible = "sandbox,serial"; sandbox,text-colour = "cyan"; pinctrl-names = "default"; @@ -473,6 +473,6 @@ }; keyboard-controller { - u-boot,dm-pre-proper; + bootph-some-ram; }; }; diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts index a9cd7908f8..f21fc181f3 100644 --- a/arch/sandbox/dts/sandbox64.dts +++ b/arch/sandbox/dts/sandbox64.dts @@ -46,7 +46,7 @@ /* ... */ cros_ec: cros-ec { reg = <0 0 0 0>; - u-boot,dm-pre-reloc; + bootph-all; compatible = "google,cros-ec-sandbox"; }; @@ -81,7 +81,7 @@ }; spi: spi@0 { - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <0>; reg = <0 0 0 0>; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 88d4d3cb98..05e09128a3 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -80,7 +80,7 @@ }; bootstd { - u-boot,dm-vpl; + bootph-verify; compatible = "u-boot,boot-std"; filename-prefixes = "/", "/boot/"; @@ -104,7 +104,7 @@ * before the parititon starts */ firmware0 { - u-boot,dm-vpl; + bootph-verify; compatible = "fwupd,vbe-simple"; storage = "mmc1"; skip-offset = <0x200>; @@ -125,7 +125,7 @@ * running U-Boot */ firmware1 { - u-boot,dm-vpl; + bootph-verify; status = "disabled"; compatible = "fwupd,vbe-simple"; storage = "mmc3"; @@ -260,7 +260,7 @@ compatible = "denx,u-boot-fdt-test"; ping-expect = <0>; ping-add = <0>; - u-boot,dm-pre-reloc; + bootph-all; test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>, <0>, <&gpio_a 12>; @@ -889,7 +889,7 @@ }; lcd { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,lcd-sdl"; pinctrl-names = "default"; pinctrl-0 = <&pinmux_lcd_pins>; @@ -959,21 +959,21 @@ reg = <0x1>; timebase-frequency = <3000000>; compatible = "sandbox,cpu_sandbox"; - u-boot,dm-pre-reloc; + bootph-all; }; cpu2: cpu@2 { device_type = "cpu"; reg = <0x2>; compatible = "sandbox,cpu_sandbox"; - u-boot,dm-pre-reloc; + bootph-all; }; cpu3: cpu@3 { device_type = "cpu"; reg = <0x3>; compatible = "sandbox,cpu_sandbox"; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -1213,12 +1213,12 @@ reset@0 { compatible = "sandbox,warm-reset"; - u-boot,dm-pre-proper; + bootph-some-ram; }; reset@1 { compatible = "sandbox,reset"; - u-boot,dm-pre-proper; + bootph-some-ram; }; resetc: reset-ctl { @@ -1369,7 +1369,7 @@ uart0: serial { compatible = "sandbox,serial"; - u-boot,dm-pre-reloc; + bootph-all; pinctrl-names = "default"; pinctrl-0 = <&pinmux_uart0_pins>; }; diff --git a/arch/sh/dts/sh7751-r2dplus.dts b/arch/sh/dts/sh7751-r2dplus.dts index da0648cd62..8e15331264 100644 --- a/arch/sh/dts/sh7751-r2dplus.dts +++ b/arch/sh/dts/sh7751-r2dplus.dts @@ -21,7 +21,7 @@ #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <60000000>; - u-boot,dm-pre-reloc; + bootph-all; }; scif1: serial@ffe80000 { @@ -30,7 +30,7 @@ clocks = <&scif_clks>; clock-names = "fck"; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; pci@fe200000 { diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c index 7637c9b07d..a133a5d811 100644 --- a/arch/x86/cpu/mp_init.c +++ b/arch/x86/cpu/mp_init.c @@ -69,12 +69,12 @@ DECLARE_GLOBAL_DATA_PTR; * CPUS are numbered sequentially from 0 using the device tree: * * cpus { - * u-boot,dm-pre-reloc; + * bootph-all; * #address-cells = <1>; * #size-cells = <0>; * * cpu@0 { - * u-boot,dm-pre-reloc; + * bootph-all; * device_type = "cpu"; * compatible = "intel,apl-cpu"; * reg = <0>; diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts index b92729dd0b..b197e4b6b9 100644 --- a/arch/x86/dts/bayleybay.dts +++ b/arch/x86/dts/bayleybay.dts @@ -92,7 +92,7 @@ compatible = "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 0x01000000 0x0 0x2000 0x2000 0 0xe000>; @@ -189,7 +189,7 @@ gpioa { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0 0x20>; bank-name = "A"; use-lvl-write-cache; @@ -197,7 +197,7 @@ gpiob { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x20 0x20>; bank-name = "B"; use-lvl-write-cache; @@ -205,7 +205,7 @@ gpioc { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x40 0x20>; bank-name = "C"; use-lvl-write-cache; @@ -213,7 +213,7 @@ gpiod { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x60 0x20>; bank-name = "D"; use-lvl-write-cache; @@ -221,7 +221,7 @@ gpioe { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x80 0x20>; bank-name = "E"; use-lvl-write-cache; @@ -229,7 +229,7 @@ gpiof { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0xA0 0x20>; bank-name = "F"; use-lvl-write-cache; diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts index e9b56de792..4380dde6a0 100644 --- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts +++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts @@ -116,7 +116,7 @@ compatible = "intel,pci-baytrail", "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 0x01000000 0x0 0x2000 0x2000 0 0xe000>; @@ -213,7 +213,7 @@ gpioa { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0 0x20>; bank-name = "A"; use-lvl-write-cache; @@ -221,7 +221,7 @@ gpiob { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x20 0x20>; bank-name = "B"; use-lvl-write-cache; @@ -229,7 +229,7 @@ gpioc { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x40 0x20>; bank-name = "C"; use-lvl-write-cache; @@ -237,7 +237,7 @@ gpiod { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x60 0x20>; bank-name = "D"; use-lvl-write-cache; @@ -245,7 +245,7 @@ gpioe { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x80 0x20>; bank-name = "E"; use-lvl-write-cache; @@ -253,7 +253,7 @@ gpiof { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0xA0 0x20>; bank-name = "F"; use-lvl-write-cache; diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts index 7a273670bd..3d35e4643c 100644 --- a/arch/x86/dts/cherryhill.dts +++ b/arch/x86/dts/cherryhill.dts @@ -70,7 +70,7 @@ compatible = "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 0x01000000 0x0 0x2000 0x2000 0 0xe000>; diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index 69a1c1ce29..8bfb2c0d19 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -113,17 +113,17 @@ clk: clock { compatible = "intel,apl-clk"; #clock-cells = <1>; - u-boot,dm-pre-proper; + bootph-some-ram; }; cpus { - u-boot,dm-pre-proper; + bootph-some-ram; #address-cells = <1>; #size-cells = <0>; cpu_0: cpu@0 { - u-boot,dm-pre-proper; - u-boot,dm-spl; + bootph-some-ram; + bootph-pre-ram; device_type = "cpu"; compatible = "intel,apl-cpu"; reg = <0>; @@ -154,7 +154,7 @@ }; acpi_gpe: general-purpose-events { - u-boot,dm-pre-proper; + bootph-some-ram; reg = <IOMAP_ACPI_BASE IOMAP_ACPI_SIZE>; compatible = "intel,acpi-gpe"; interrupt-controller; @@ -174,14 +174,14 @@ compatible = "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 0x42000000 0x0 0xb0000000 0xb0000000 0 0x10000000 0x01000000 0x0 0x1000 0x1000 0 0xefff>; u-boot,skip-auto-config-until-reloc; host_bridge: host-bridge@0,0 { - u-boot,dm-pre-reloc; + bootph-all; reg = <0x00000000 0 0 0 0>; compatible = "intel,apl-hostbridge"; pciex-region-size = <0x10000000>; @@ -197,7 +197,7 @@ fsp_s: fsp-s { }; fsp_m: fsp-m { - u-boot,dm-spl; + bootph-pre-ram; }; nhlt { @@ -206,20 +206,20 @@ }; punit@0,1 { - u-boot,dm-pre-proper; - u-boot,dm-spl; + bootph-some-ram; + bootph-pre-ram; reg = <0x00000800 0 0 0 0>; compatible = "intel,apl-punit"; }; gma@2,0 { - u-boot,dm-pre-proper; + bootph-some-ram; reg = <0x00001000 0 0 0 0>; compatible = "fsp-fb"; }; p2sb: p2sb@d,0 { - u-boot,dm-pre-reloc; + bootph-all; reg = <0x02006810 0 0 0 0>; compatible = "intel,p2sb"; early-regs = <IOMAP_P2SB_BAR 0x100000>; @@ -227,12 +227,12 @@ n { compatible = "intel,apl-pinctrl"; - u-boot,dm-pre-reloc; + bootph-all; intel,p2sb-port-id = <PID_GPIO_N>; acpi,path = "\\_SB.GPO0"; gpio_n: gpio-n { compatible = "intel,gpio"; - u-boot,dm-pre-reloc; + bootph-all; gpio-controller; #gpio-cells = <2>; linux-name = "INT3452:00"; @@ -240,14 +240,14 @@ }; nw { - u-boot,dm-pre-reloc; + bootph-all; compatible = "intel,apl-pinctrl"; intel,p2sb-port-id = <PID_GPIO_NW>; #gpio-cells = <2>; acpi,path = "\\_SB.GPO1"; gpio_nw: gpio-nw { compatible = "intel,gpio"; - u-boot,dm-pre-reloc; + bootph-all; gpio-controller; #gpio-cells = <2>; linux-name = "INT3452:01"; @@ -255,14 +255,14 @@ }; w { - u-boot,dm-pre-reloc; + bootph-all; compatible = "intel,apl-pinctrl"; intel,p2sb-port-id = <PID_GPIO_W>; #gpio-cells = <2>; acpi,path = "\\_SB.GPO2"; gpio_w: gpio-w { compatible = "intel,gpio"; - u-boot,dm-pre-reloc; + bootph-all; gpio-controller; #gpio-cells = <2>; linux-name = "INT3452:02"; @@ -270,14 +270,14 @@ }; sw { - u-boot,dm-pre-reloc; + bootph-all; compatible = "intel,apl-pinctrl"; intel,p2sb-port-id = <PID_GPIO_SW>; #gpio-cells = <2>; acpi,path = "\\_SB.GPO3"; gpio_sw: gpio-sw { compatible = "intel,gpio"; - u-boot,dm-pre-reloc; + bootph-all; gpio-controller; #gpio-cells = <2>; linux-name = "INT3452:03"; @@ -285,7 +285,7 @@ }; itss { - u-boot,dm-pre-reloc; + bootph-all; compatible = "intel,itss"; intel,p2sb-port-id = <PID_ITSS>; intel,pmc-routes = < @@ -301,7 +301,7 @@ }; pmc@d,1 { - u-boot,dm-pre-reloc; + bootph-all; reg = <0x6900 0 0 0 0>; /* @@ -348,8 +348,8 @@ }; spi: fast-spi@d,2 { - u-boot,dm-pre-proper; - u-boot,dm-spl; + bootph-some-ram; + bootph-pre-ram; reg = <0x02006a10 0 0 0 0>; #address-cells = <1>; #size-cells = <0>; @@ -360,8 +360,8 @@ fwstore_spi: spi-flash@0 { #size-cells = <1>; #address-cells = <1>; - u-boot,dm-pre-proper; - u-boot,dm-spl; + bootph-some-ram; + bootph-pre-ram; reg = <0>; m25p,fast-read; compatible = "winbond,w25q128fw", @@ -369,12 +369,12 @@ rw-mrc-cache { label = "rw-mrc-cache"; reg = <0x008e0000 0x00010000>; - u-boot,dm-pre-reloc; + bootph-all; }; rw-var-mrc-cache { label = "rw-mrc-cache"; reg = <0x008f0000 0x0001000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; @@ -442,7 +442,7 @@ compatible = "intel,apl-i2c", "snps,designware-i2c-pci"; reg = <0x0200b210 0 0 0 0>; early-regs = <IOMAP_I2C2_BASE 0x1000>; - u-boot,dm-pre-proper; + bootph-some-ram; #address-cells = <1>; #size-cells = <0>; clock-frequency = <400000>; @@ -453,7 +453,7 @@ tpm: tpm@50 { reg = <0x50>; compatible = "google,cr50"; - u-boot,dm-pre-proper; + bootph-some-ram; u-boot,i2c-offset-len = <0>; ready-gpios = <&gpio_n 28 GPIO_ACTIVE_LOW>; interrupts-extended = <&acpi_gpe GPIO_28_IRQ @@ -577,7 +577,7 @@ serial: serial@18,2 { reg = <0x0200c210 0 0 0 0>; - u-boot,dm-pre-reloc; + bootph-all; compatible = "intel,apl-ns16550"; early-regs = <0xde000000 0x20>; reg-shift = <2>; @@ -603,7 +603,7 @@ pch: pch@1f,0 { reg = <0x0000f800 0 0 0 0>; compatible = "intel,apl-pch"; - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <1>; @@ -611,10 +611,10 @@ compatible = "intel,apl-lpc"; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; cros_ec: cros-ec { - u-boot,dm-pre-proper; - u-boot,dm-vpl; + bootph-some-ram; + bootph-verify; compatible = "google,cros-ec-lpc"; reg = <0x204 1 0x200 1 0x880 0x80>; @@ -785,7 +785,7 @@ }; &fsp_s { - u-boot,dm-pre-proper; + bootph-some-ram; fsps,ish-enable = <0>; fsps,enable-sata = <0>; @@ -1253,5 +1253,5 @@ &rtc { #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-proper; + bootph-some-ram; }; diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index 11ff520ac2..36956f40bd 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -71,7 +71,7 @@ pch_pinctrl { compatible = "intel,x86-pinctrl"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0 0>; gpio_a0 { @@ -127,7 +127,7 @@ }; gpio_a10 { - u-boot,dm-pre-reloc; + bootph-all; gpio-offset = <0 10>; mode-gpio; direction = <PIN_INPUT>; @@ -187,21 +187,21 @@ }; gpio_b9 { - u-boot,dm-pre-reloc; + bootph-all; gpio-offset = <0x30 9>; mode-gpio; direction = <PIN_INPUT>; }; gpio_b10 { - u-boot,dm-pre-reloc; + bootph-all; gpio-offset = <0x30 10>; mode-gpio; direction = <PIN_INPUT>; }; gpio_b11 { - u-boot,dm-pre-reloc; + bootph-all; gpio-offset = <0x30 11>; mode-gpio; direction = <PIN_INPUT>; @@ -226,23 +226,23 @@ compatible = "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 0x01000000 0x0 0x1000 0x1000 0 0xefff>; northbridge@0,0 { reg = <0x00000000 0 0 0 0>; - u-boot,dm-pre-reloc; + bootph-all; compatible = "intel,bd82x6x-northbridge"; board-id-gpios = <&gpio_b 9 0>, <&gpio_b 10 0>, <&gpio_b 11 0>, <&gpio_a 10 0>; spd { - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <0>; elpida_4Gb_1600_x16 { - u-boot,dm-pre-reloc; + bootph-all; reg = <0>; data = [92 10 0b 03 04 19 02 02 03 52 01 08 0a 00 fe 00 @@ -278,7 +278,7 @@ 00 00 00 00 00 00 00 00]; }; samsung_4Gb_1600_1.35v_x16 { - u-boot,dm-pre-reloc; + bootph-all; reg = <1>; data = [92 11 0b 03 04 19 02 02 03 11 01 08 0a 00 fe 00 @@ -368,7 +368,7 @@ me@16,0 { reg = <0x0000b000 0 0 0 0>; compatible = "intel,me"; - u-boot,dm-pre-reloc; + bootph-all; }; usb_1: usb@1a,0 { @@ -410,7 +410,7 @@ pch@1f,0 { reg = <0x0000f800 0 0 0 0>; compatible = "intel,bd82x6x", "intel,pch9"; - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <1>; intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b @@ -424,11 +424,11 @@ #address-cells = <1>; #size-cells = <0>; compatible = "intel,ich9-spi"; - u-boot,dm-pre-reloc; + bootph-all; spi-flash@0 { #size-cells = <1>; #address-cells = <1>; - u-boot,dm-pre-reloc; + bootph-all; reg = <0>; m25p,fast-read; compatible = "winbond,w25q64", @@ -437,14 +437,14 @@ rw-mrc-cache { label = "rw-mrc-cache"; reg = <0x003e0000 0x00010000>; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; gpio_a: gpioa { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; #gpio-cells = <2>; gpio-controller; reg = <0 0x10>; @@ -453,7 +453,7 @@ gpio_b: gpiob { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; #gpio-cells = <2>; gpio-controller; reg = <0x30 0x10>; @@ -462,7 +462,7 @@ gpio_c: gpioc { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; #gpio-cells = <2>; gpio-controller; reg = <0x40 0x10>; @@ -473,7 +473,7 @@ compatible = "intel,bd82x6x-lpc"; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; intel,gen-dec = <0x800 0xfc 0x900 0xfc>; cros-ec@200 { compatible = "google,cros-ec"; @@ -496,7 +496,7 @@ sata@1f,2 { compatible = "intel,pantherpoint-ahci"; reg = <0x0000fa00 0 0 0 0>; - u-boot,dm-pre-reloc; + bootph-all; intel,sata-mode = "ahci"; intel,sata-port-map = <1>; intel,sata-port0-gen3-tx = <0x00880a7f>; @@ -505,7 +505,7 @@ smbus: smbus@1f,3 { compatible = "intel,ich-i2c"; reg = <0x0000fb00 0 0 0 0>; - u-boot,dm-pre-reloc; + bootph-all; }; }; @@ -515,9 +515,9 @@ }; microcode { - u-boot,dm-pre-reloc; + bootph-all; update@0 { - u-boot,dm-pre-reloc; + bootph-all; #include "microcode/m12306a9_0000001b.dtsi" }; }; diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index 930ec1ace0..96705ceed0 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -77,12 +77,12 @@ pch_pinctrl { compatible = "intel,x86-broadwell-pinctrl"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0 0>; /* Put this first: it is the default */ gpio_unused: gpio-unused { - u-boot,dm-pre-reloc; + bootph-all; mode-gpio; direction = <PIN_INPUT>; owner = <OWNER_GPIO>; @@ -90,7 +90,7 @@ }; gpio_acpi_sci: acpi-sci { - u-boot,dm-pre-reloc; + bootph-all; mode-gpio; direction = <PIN_INPUT>; invert; @@ -98,7 +98,7 @@ }; gpio_acpi_smi: acpi-smi { - u-boot,dm-pre-reloc; + bootph-all; mode-gpio; direction = <PIN_INPUT>; invert; @@ -106,14 +106,14 @@ }; gpio_input: gpio-input { - u-boot,dm-pre-reloc; + bootph-all; mode-gpio; direction = <PIN_INPUT>; owner = <OWNER_GPIO>; }; gpio_input_invert: gpio-input-invert { - u-boot,dm-pre-reloc; + bootph-all; mode-gpio; direction = <PIN_INPUT>; owner = <OWNER_GPIO>; @@ -121,11 +121,11 @@ }; gpio_native: gpio-native { - u-boot,dm-pre-reloc; + bootph-all; }; gpio_out_high: gpio-out-high { - u-boot,dm-pre-reloc; + bootph-all; mode-gpio; direction = <PIN_OUTPUT>; output-value = <1>; @@ -134,7 +134,7 @@ }; gpio_out_low: gpio-out-low { - u-boot,dm-pre-reloc; + bootph-all; mode-gpio; direction = <PIN_OUTPUT>; output-value = <0>; @@ -143,7 +143,7 @@ }; gpio_pirq: gpio-pirq { - u-boot,dm-pre-reloc; + bootph-all; mode-gpio; direction = <PIN_INPUT>; owner = <OWNER_GPIO>; @@ -151,7 +151,7 @@ }; soc_gpio@0 { - u-boot,dm-pre-reloc; + bootph-all; config = <0 &gpio_unused 0>, /* unused */ <1 &gpio_unused 0>, /* unused */ @@ -255,7 +255,7 @@ compatible = "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 0x01000000 0x0 0x1000 0x1000 0 0xefff>; @@ -265,14 +265,14 @@ compatible = "intel,broadwell-northbridge"; board-id-gpios = <&gpio_c 5 0>, <&gpio_c 4 0>, <&gpio_c 3 0>, <&gpio_c 1 0>; - u-boot,dm-pre-reloc; + bootph-all; spd { #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; samsung_4 { reg = <6>; - u-boot,dm-pre-reloc; + bootph-all; data = [91 20 f1 03 04 11 05 0b 03 11 01 08 0a 00 50 01 78 78 90 50 90 11 50 e0 @@ -312,7 +312,7 @@ * columns 10, density 4096 mb, x32 */ reg = <8>; - u-boot,dm-pre-reloc; + bootph-all; data = [91 20 f1 03 04 11 05 0b 03 11 01 08 0a 00 50 01 78 78 90 50 90 11 50 e0 @@ -348,7 +348,7 @@ }; samsung_8 { reg = <10>; - u-boot,dm-pre-reloc; + bootph-all; data = [91 20 f1 03 04 12 05 0a 03 11 01 08 0a 00 50 01 78 78 90 50 90 11 50 e0 @@ -388,7 +388,7 @@ * columns 11, density 4096 mb, x16 */ reg = <12>; - u-boot,dm-pre-reloc; + bootph-all; data = [91 20 f1 03 04 12 05 0a 03 11 01 08 0a 00 50 01 78 78 90 50 90 11 50 e0 @@ -428,7 +428,7 @@ * columns 11, density 8192 mb, x16 */ reg = <13>; - u-boot,dm-pre-reloc; + bootph-all; data = [91 20 f1 03 05 1a 05 0a 03 11 01 08 0a 00 50 01 78 78 90 50 90 11 50 e0 @@ -468,7 +468,7 @@ * columns 11, density 8192 mb, x16 */ reg = <15>; - u-boot,dm-pre-reloc; + bootph-all; data = [91 20 f1 03 05 1a 05 0a 03 11 01 08 0a 00 50 01 78 78 90 50 90 11 50 e0 @@ -557,7 +557,7 @@ me@16,0 { reg = <0x0000b000 0 0 0 0>; compatible = "intel,me"; - u-boot,dm-pre-reloc; + bootph-all; }; usb_0: usb@1d,0 { @@ -569,7 +569,7 @@ pch: pch@1f,0 { reg = <0x0000f800 0 0 0 0>; compatible = "intel,broadwell-pch"; - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <1>; intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b @@ -585,12 +585,12 @@ power-enable-gpio = <&gpio_a 23 0>; spi: spi { - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <0>; compatible = "intel,ich9-spi"; fwstore_spi: spi-flash@0 { - u-boot,dm-pre-reloc; + bootph-all; #size-cells = <1>; #address-cells = <1>; reg = <0>; @@ -599,7 +599,7 @@ "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; rw-mrc-cache { - u-boot,dm-pre-reloc; + bootph-all; label = "rw-mrc-cache"; reg = <0x003e0000 0x00010000>; }; @@ -608,7 +608,7 @@ gpio_a: gpioa { compatible = "intel,broadwell-gpio"; - u-boot,dm-pre-reloc; + bootph-all; #gpio-cells = <2>; gpio-controller; reg = <0 0>; @@ -617,7 +617,7 @@ gpio_b: gpiob { compatible = "intel,broadwell-gpio"; - u-boot,dm-pre-reloc; + bootph-all; #gpio-cells = <2>; gpio-controller; reg = <1 0>; @@ -626,7 +626,7 @@ gpio_c: gpioc { compatible = "intel,broadwell-gpio"; - u-boot,dm-pre-reloc; + bootph-all; #gpio-cells = <2>; gpio-controller; reg = <2 0>; @@ -637,10 +637,10 @@ compatible = "intel,broadwell-lpc"; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; intel,gen-dec = <0x800 0xfc 0x900 0xfc>; cros_ec: cros-ec { - u-boot,dm-pre-reloc; + bootph-all; compatible = "google,cros-ec-lpc"; reg = <0x204 1 0x200 1 0x880 0x80>; @@ -661,7 +661,7 @@ sata@1f,2 { compatible = "intel,wildcatpoint-ahci"; reg = <0x0000fa00 0 0 0 0>; - u-boot,dm-pre-proper; + bootph-some-ram; intel,sata-mode = "ahci"; intel,sata-port-map = <1>; intel,sata-port0-gen3-tx = <0x72>; @@ -671,24 +671,24 @@ smbus: smbus@1f,3 { compatible = "intel,ich-i2c"; reg = <0x0000fb00 0 0 0 0>; - u-boot,dm-pre-reloc; + bootph-all; }; }; tpm { - u-boot,dm-pre-reloc; + bootph-all; reg = <0xfed40000 0x5000>; compatible = "infineon,slb9635lpc"; secdata { - u-boot,dm-pre-reloc; + bootph-all; compatible = "google,tpm-secdata"; }; }; microcode { - u-boot,dm-pre-reloc; + bootph-all; update@0 { - u-boot,dm-pre-reloc; + bootph-all; #include "microcode/mc0306d4_00000018.dtsi" }; }; @@ -711,7 +711,7 @@ #address-cells = <1>; #size-cells = <0>; nvdata { - u-boot,dm-pre-reloc; + bootph-all; compatible = "google,cmos-nvdata"; reg = <0x26>; }; diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts index b25f759c79..242d8522db 100644 --- a/arch/x86/dts/chromebox_panther.dts +++ b/arch/x86/dts/chromebox_panther.dts @@ -29,7 +29,7 @@ compatible = "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 0x01000000 0x0 0x1000 0x1000 0 0xf000>; @@ -61,21 +61,21 @@ gpioa { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0 0x10>; bank-name = "A"; }; gpiob { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x30 0x10>; bank-name = "B"; }; gpioc { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x40 0x10>; bank-name = "C"; }; diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts index 705157ceaa..823063969d 100644 --- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts +++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts @@ -103,7 +103,7 @@ compatible = "intel,pci-baytrail", "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 0x01000000 0x0 0x2000 0x2000 0 0xe000>; @@ -200,7 +200,7 @@ gpioa { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0 0x20>; bank-name = "A"; use-lvl-write-cache; @@ -208,7 +208,7 @@ gpiob { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x20 0x20>; bank-name = "B"; use-lvl-write-cache; @@ -216,7 +216,7 @@ gpioc { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x40 0x20>; bank-name = "C"; use-lvl-write-cache; @@ -224,7 +224,7 @@ gpiod { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x60 0x20>; bank-name = "D"; use-lvl-write-cache; @@ -232,7 +232,7 @@ gpioe { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x80 0x20>; bank-name = "E"; use-lvl-write-cache; @@ -240,7 +240,7 @@ gpiof { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0xA0 0x20>; bank-name = "F"; use-lvl-write-cache; diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts index d21978d6e0..f9ff5346a7 100644 --- a/arch/x86/dts/coreboot.dts +++ b/arch/x86/dts/coreboot.dts @@ -33,11 +33,11 @@ pci { compatible = "pci-x86"; - u-boot,dm-pre-reloc; + bootph-all; }; serial: serial { - u-boot,dm-pre-reloc; + bootph-all; compatible = "coreboot-serial"; }; diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts index 58395b5eb6..4833aab21c 100644 --- a/arch/x86/dts/cougarcanyon2.dts +++ b/arch/x86/dts/cougarcanyon2.dts @@ -92,7 +92,7 @@ #address-cells = <3>; #size-cells = <2>; compatible = "pci-x86"; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 0x01000000 0x0 0x2000 0x2000 0 0xe000>; @@ -100,7 +100,7 @@ pch@1f,0 { reg = <0x0000f800 0 0 0 0>; compatible = "intel,bd82x6x"; - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <1>; @@ -164,21 +164,21 @@ gpioa { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0 0x10>; bank-name = "A"; }; gpiob { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x30 0x10>; bank-name = "B"; }; gpioc { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x40 0x10>; bank-name = "C"; }; diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 5768352531..64282303fb 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -71,7 +71,7 @@ #address-cells = <3>; #size-cells = <2>; compatible = "pci-x86"; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0x40000000 0x40000000 0 0x80000000 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 0x01000000 0x0 0x2000 0x2000 0 0xe000>; @@ -80,14 +80,14 @@ #address-cells = <3>; #size-cells = <2>; compatible = "pci-bridge"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x0000b800 0x0 0x0 0x0 0x0>; topcliff@0,0 { #address-cells = <3>; #size-cells = <2>; compatible = "pci-bridge"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x00010000 0x0 0x0 0x0 0x0>; pciuart0: uart@a,1 { @@ -96,7 +96,7 @@ "pciclass,070002", "pciclass,0700", "ns16550"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x00025100 0x0 0x0 0x0 0x0 0x01025110 0x0 0x0 0x0 0x0>; reg-shift = <0>; @@ -110,7 +110,7 @@ "pciclass,070002", "pciclass,0700", "ns16550"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x00025200 0x0 0x0 0x0 0x0 0x01025210 0x0 0x0 0x0 0x0>; reg-shift = <0>; @@ -124,7 +124,7 @@ "pciclass,070002", "pciclass,0700", "ns16550"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x00025300 0x0 0x0 0x0 0x0 0x01025310 0x0 0x0 0x0 0x0>; reg-shift = <0>; @@ -138,7 +138,7 @@ "pciclass,070002", "pciclass,0700", "ns16550"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x00025400 0x0 0x0 0x0 0x0 0x01025410 0x0 0x0 0x0 0x0>; reg-shift = <0>; @@ -233,14 +233,14 @@ gpioa { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0 0x20>; bank-name = "A"; }; gpiob { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x20 0x20>; bank-name = "B"; }; diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi index dff2345d60..9193e51dc4 100644 --- a/arch/x86/dts/dfi-bt700.dtsi +++ b/arch/x86/dts/dfi-bt700.dtsi @@ -101,7 +101,7 @@ compatible = "intel,pci-baytrail", "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 0x01000000 0x0 0x2000 0x2000 0 0xe000>; @@ -112,7 +112,7 @@ "pciclass,070002", "pciclass,0700", "ns16550"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x0200f310 0x0 0x0 0x0 0x0>; reg-shift = <2>; clock-frequency = <58982400>; @@ -211,7 +211,7 @@ gpioa { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0 0x20>; bank-name = "A"; use-lvl-write-cache; @@ -219,7 +219,7 @@ gpiob { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x20 0x20>; bank-name = "B"; use-lvl-write-cache; @@ -227,7 +227,7 @@ gpioc { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x40 0x20>; bank-name = "C"; use-lvl-write-cache; @@ -235,7 +235,7 @@ gpiod { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x60 0x20>; bank-name = "D"; use-lvl-write-cache; @@ -243,7 +243,7 @@ gpioe { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x80 0x20>; bank-name = "E"; use-lvl-write-cache; @@ -251,7 +251,7 @@ gpiof { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0xA0 0x20>; bank-name = "F"; use-lvl-write-cache; diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts index b3658b8c30..7af8507e45 100644 --- a/arch/x86/dts/edison.dts +++ b/arch/x86/dts/edison.dts @@ -55,7 +55,7 @@ compatible = "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 0x01000000 0x0 0x2000 0x2000 0 0xe000>; @@ -130,7 +130,7 @@ reset { compatible = "intel,reset-tangier"; - u-boot,dm-pre-reloc; + bootph-all; }; pinctrl { diff --git a/arch/x86/dts/efi-x86_app.dts b/arch/x86/dts/efi-x86_app.dts index a5316e2a1a..6d843a9820 100644 --- a/arch/x86/dts/efi-x86_app.dts +++ b/arch/x86/dts/efi-x86_app.dts @@ -23,7 +23,7 @@ reset { compatible = "efi,reset"; - u-boot,dm-pre-reloc; + bootph-all; }; efi-fb { compatible = "efi-fb"; diff --git a/arch/x86/dts/efi-x86_payload.dts b/arch/x86/dts/efi-x86_payload.dts index 087865f225..1a6dd7dd70 100644 --- a/arch/x86/dts/efi-x86_payload.dts +++ b/arch/x86/dts/efi-x86_payload.dts @@ -33,7 +33,7 @@ pci { compatible = "pci-x86"; - u-boot,dm-pre-reloc; + bootph-all; }; efi-fb { diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts index 4120e8f5c4..08be190eda 100644 --- a/arch/x86/dts/galileo.dts +++ b/arch/x86/dts/galileo.dts @@ -69,7 +69,7 @@ #address-cells = <3>; #size-cells = <2>; compatible = "pci-x86"; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0x90000000 0x90000000 0 0x20000000 0x42000000 0x0 0xb0000000 0xb0000000 0 0x20000000 0x01000000 0x0 0x2000 0x2000 0 0xe000>; @@ -80,7 +80,7 @@ "pciclass,070002", "pciclass,0700", "ns16550"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x0000a500 0x0 0x0 0x0 0x0 0x0200a510 0x0 0x0 0x0 0x0>; reg-shift = <2>; @@ -147,14 +147,14 @@ gpioa { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0 0x20>; bank-name = "A"; }; gpiob { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x20 0x20>; bank-name = "B"; }; diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 68e0510c68..1182b4b635 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -116,7 +116,7 @@ compatible = "intel,pci-baytrail", "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 0x01000000 0x0 0x2000 0x2000 0 0xe000>; @@ -213,7 +213,7 @@ gpioa { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0 0x20>; bank-name = "A"; use-lvl-write-cache; @@ -221,7 +221,7 @@ gpiob { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x20 0x20>; bank-name = "B"; use-lvl-write-cache; @@ -229,7 +229,7 @@ gpioc { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x40 0x20>; bank-name = "C"; use-lvl-write-cache; @@ -237,7 +237,7 @@ gpiod { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x60 0x20>; bank-name = "D"; use-lvl-write-cache; @@ -245,7 +245,7 @@ gpioe { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x80 0x20>; bank-name = "E"; use-lvl-write-cache; @@ -253,7 +253,7 @@ gpiof { compatible = "intel,ich6-gpio"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0xA0 0x20>; bank-name = "F"; use-lvl-write-cache; diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts index 6556e9ebcd..3bb2f121de 100644 --- a/arch/x86/dts/qemu-x86_i440fx.dts +++ b/arch/x86/dts/qemu-x86_i440fx.dts @@ -31,12 +31,12 @@ cpus { #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; cpu@0 { device_type = "cpu"; compatible = "cpu-qemu"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0>; intel,apic-id = <0>; }; @@ -46,7 +46,7 @@ compatible = "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 0x01000000 0x0 0x2000 0x2000 0 0xe000>; @@ -54,11 +54,11 @@ pch@1,0 { reg = <0x00000800 0 0 0 0>; compatible = "intel,pch7"; - u-boot,dm-pre-reloc; + bootph-all; irq-router { compatible = "intel,irq-router"; - u-boot,dm-pre-reloc; + bootph-all; intel,pirq-config = "pci"; intel,pirq-link = <0x60 4>; intel,pirq-mask = <0x0e40>; diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts index d0830892e8..63931cd6dd 100644 --- a/arch/x86/dts/qemu-x86_q35.dts +++ b/arch/x86/dts/qemu-x86_q35.dts @@ -42,12 +42,12 @@ cpus { #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; + bootph-all; cpu@0 { device_type = "cpu"; compatible = "cpu-qemu"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0>; intel,apic-id = <0>; }; @@ -57,7 +57,7 @@ compatible = "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 0x01000000 0x0 0x2000 0x2000 0 0xe000>; @@ -65,11 +65,11 @@ pch@1f,0 { reg = <0x0000f800 0 0 0 0>; compatible = "intel,pch9"; - u-boot,dm-pre-reloc; + bootph-all; irq-router { compatible = "intel,irq-router"; - u-boot,dm-pre-reloc; + bootph-all; intel,pirq-config = "pci"; intel,actl-8bit; intel,actl-addr = <0x44>; diff --git a/arch/x86/dts/reset.dtsi b/arch/x86/dts/reset.dtsi index f2ba2fb5e8..1f1ff9f64d 100644 --- a/arch/x86/dts/reset.dtsi +++ b/arch/x86/dts/reset.dtsi @@ -1,6 +1,6 @@ / { reset: reset { compatible = "x86,reset"; - u-boot,dm-pre-proper; + bootph-some-ram; }; }; diff --git a/arch/x86/dts/rtc.dtsi b/arch/x86/dts/rtc.dtsi index 942cc937dc..1c2eb2891a 100644 --- a/arch/x86/dts/rtc.dtsi +++ b/arch/x86/dts/rtc.dtsi @@ -1,7 +1,7 @@ / { rtc: rtc { compatible = "motorola,mc146818"; - u-boot,dm-pre-proper; + bootph-some-ram; reg = <0x70 2>; }; }; diff --git a/arch/x86/dts/serial.dtsi b/arch/x86/dts/serial.dtsi index 22f7b54fed..99022eb21e 100644 --- a/arch/x86/dts/serial.dtsi +++ b/arch/x86/dts/serial.dtsi @@ -1,6 +1,6 @@ / { serial: serial { - u-boot,dm-pre-reloc; + bootph-all; compatible = "ns16550"; reg = <0x3f8 8>; reg-shift = <0>; diff --git a/arch/x86/dts/tsc_timer.dtsi b/arch/x86/dts/tsc_timer.dtsi index 4df8e9d7fc..9d098df832 100644 --- a/arch/x86/dts/tsc_timer.dtsi +++ b/arch/x86/dts/tsc_timer.dtsi @@ -2,6 +2,6 @@ tsc-timer { compatible = "x86,tsc-timer"; clock-frequency = <CONFIG_X86_TSC_TIMER_FREQ>; - u-boot,dm-pre-reloc; + bootph-all; }; }; diff --git a/common/board_r.c b/common/board_r.c index e45003353f..6b4180b3ec 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -569,6 +569,13 @@ static int dm_announce(void) printf("Warning: Unexpected devicetree source (not from a prior stage)"); printf("Warning: U-Boot may not function properly\n"); } + if (IS_ENABLED(CONFIG_OF_TAG_MIGRATE) && + (gd->flags & GD_FLG_OF_TAG_MIGRATE)) + /* + * U-Boot will silently fail to work after 2023.07 if + * there are old tags present + */ + printf("Warning: Device tree includes old 'u-boot,dm-' tags: please fix by 2023.07!\n"); } return 0; diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index 501d0ebdd5..b7b86b668c 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -82,7 +82,6 @@ CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_DWC3=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index 6a0e2666cf..ed58b5746e 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -71,7 +71,6 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_DWC3=y diff --git a/doc/README.TPL b/doc/README.TPL index 72027fd692..95b466e4af 100644 --- a/doc/README.TPL +++ b/doc/README.TPL @@ -35,8 +35,8 @@ is set. Source files can be compiled for TPL with options chosen in the board config file. TPL use a small device tree (u-boot-tpl.dtb), containing only the nodes with -the pre-relocation properties: 'u-boot,dm-pre-reloc' and 'u-boot,dm-tpl' -(see README.SPL for details). +the pre-relocation properties: 'bootph-all' and 'bootph-pre-sram' +(see doc/develop/spl.rst for details). For example: diff --git a/doc/develop/driver-model/design.rst b/doc/develop/driver-model/design.rst index 20611e85e3..8c2c81d7ac 100644 --- a/doc/develop/driver-model/design.rst +++ b/doc/develop/driver-model/design.rst @@ -1114,12 +1114,12 @@ Pre-Relocation Support ---------------------- For pre-relocation we simply call the driver model init function. Only -drivers marked with DM_FLAG_PRE_RELOC or the device tree 'u-boot,dm-pre-reloc' +drivers marked with DM_FLAG_PRE_RELOC or the device tree 'bootph-all' property are initialised prior to relocation. This helps to reduce the driver model overhead. This flag applies to SPL and TPL as well, if device tree is enabled (CONFIG_OF_CONTROL) there. -Note when device tree is enabled, the device tree 'u-boot,dm-pre-reloc' +Note when device tree is enabled, the device tree 'bootph-all' property can provide better control granularity on which device is bound before relocation. While with DM_FLAG_PRE_RELOC flag of the driver all devices with the same driver are bound, which requires allocation a large @@ -1128,14 +1128,15 @@ only way for statically declared devices via U_BOOT_DRVINFO() to be bound prior to relocation. It is possible to limit this to specific relocation steps, by using -the more specialized 'u-boot,dm-spl' and 'u-boot,dm-tpl' flags -in the device tree node. For U-Boot proper you can use 'u-boot,dm-pre-proper' +the more specialized 'bootph-pre-ram' and 'bootph-pre-sram' flags +in the device tree node. For U-Boot proper you can use 'bootph-some-ram' which means that it will be processed (and a driver bound) in U-Boot proper prior to relocation, but will not be available in SPL or TPL. -To reduce the size of SPL and TPL, only the nodes with pre-relocation properties -('u-boot,dm-pre-reloc', 'u-boot,dm-spl' or 'u-boot,dm-tpl') are keept in their -device trees (see README.SPL for details); the remaining nodes are always bound. +To reduce the size of SPL and TPL, only the nodes with pre-relocation +properties ('bootph-all', 'bootph-pre-ram' or 'bootph-pre-sram') are kept in +their device trees (see README.SPL for details); the remaining nodes are +always bound. Then post relocation we throw that away and re-init driver model again. For drivers which require some sort of continuity between pre- and diff --git a/doc/develop/driver-model/fs_firmware_loader.rst b/doc/develop/driver-model/fs_firmware_loader.rst index a44708cb4c..b0823700a9 100644 --- a/doc/develop/driver-model/fs_firmware_loader.rst +++ b/doc/develop/driver-model/fs_firmware_loader.rst @@ -28,7 +28,7 @@ defined in fs-loader node as shown in below: Example for block device:: fs_loader0: fs-loader { - u-boot,dm-pre-reloc; + bootph-all; compatible = "u-boot,fs-loader"; phandlepart = <&mmc 1>; }; @@ -41,7 +41,7 @@ device, it can be described in FDT as shown in below: Example for ubi:: fs_loader1: fs-loader { - u-boot,dm-pre-reloc; + bootph-all; compatible = "u-boot,fs-loader"; mtdpart = "UBI", ubivol = "ubi0"; diff --git a/doc/develop/driver-model/of-plat.rst b/doc/develop/driver-model/of-plat.rst index b454f7be85..01724ba72c 100644 --- a/doc/develop/driver-model/of-plat.rst +++ b/doc/develop/driver-model/of-plat.rst @@ -67,7 +67,7 @@ device. As an example, consider this MMC node: pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>; vmmc-supply = <&vcc_sd>; status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; }; @@ -632,7 +632,7 @@ the devicetree. For example, if the devicetree has:: grf: grf@20008000 { compatible = "rockchip,rk3188-grf", "syscon"; reg = <0x20008000 0x200>; - u-boot,dm-spl; + bootph-pre-ram; }; then dtoc looks at the first compatible string ("rockchip,rk3188-grf"), @@ -685,21 +685,22 @@ indicates that the two nodes have different phase settings. Looking at the source .dts:: i2c_emul: emul { - u-boot,dm-spl; + bootph-pre-ram; reg = <0xff>; compatible = "sandbox,i2c-emul-parent"; emul0: emul0 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,i2c-rtc-emul"; #emul-cells = <0>; }; }; -you can see that the child node 'emul0' usees 'u-boot,dm-pre-reloc', indicating -that the node is present in all SPL builds, but its parent uses 'u-boot,dm-spl' -indicating it is only present in SPL, not TPL. For a TPL build, this will fail -with the above message. The fix is to change 'emul0' to use the same -'u-boot,dm-spl' condition, so that it is not present in TPL, like its parent. +you can see that the child node 'emul0' usees 'bootph-all', indicating +that the node is present in all SPL builds, but its parent uses +'bootph-pre-ram' indicating it is only present in SPL, not TPL. For a TPL +build, this will fail with the above message. The fix is to change 'emul0' to +use the same 'bootph-pre-ram' condition, so that it is not present in TPL, +like its parent. Link errors / undefined reference ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -715,16 +716,16 @@ you get a link error, e.g.:: The first one indicates that the device cannot find its driver. This means that there is a driver 'sandbox_spl_test' but it is not compiled into the build. Check your Kconfig settings to make sure it is. If you don't want that in the -build, adjust your phase settings, e.g. by using 'u-boot,dm-spl' in the node +build, adjust your phase settings, e.g. by using 'bootph-pre-ram' in the node to exclude it from the TPL build:: spl-test5 { - u-boot,dm-tpl; + bootph-pre-sram; compatible = "sandbox,spl-test"; stringarray = "tpl"; }; -We can drop the 'u-boot,dm-tpl' line so this node won't appear in the TPL +We can drop the 'bootph-pre-sram' line so this node won't appear in the TPL devicetree and thus the driver won't be needed. The second error above indicates that the MISC uclass is needed by the driver diff --git a/doc/develop/driver-model/pci-info.rst b/doc/develop/driver-model/pci-info.rst index 251601a51e..dea595b6cf 100644 --- a/doc/develop/driver-model/pci-info.rst +++ b/doc/develop/driver-model/pci-info.rst @@ -52,7 +52,7 @@ their drivers accordingly. A working example like below:: #address-cells = <3>; #size-cells = <2>; compatible = "pci-x86"; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0x40000000 0x40000000 0 0x80000000 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 0x01000000 0x0 0x2000 0x2000 0 0xe000>; @@ -61,14 +61,14 @@ their drivers accordingly. A working example like below:: #address-cells = <3>; #size-cells = <2>; compatible = "pci-bridge"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x0000b800 0x0 0x0 0x0 0x0>; topcliff@0,0 { #address-cells = <3>; #size-cells = <2>; compatible = "pci-bridge"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x00010000 0x0 0x0 0x0 0x0>; pciuart0: uart@a,1 { @@ -77,7 +77,7 @@ their drivers accordingly. A working example like below:: "pciclass,070002", "pciclass,0700", "x86-uart"; - u-boot,dm-pre-reloc; + bootph-all; reg = <0x00025100 0x0 0x0 0x0 0x0 0x01025110 0x0 0x0 0x0 0x0>; ...... @@ -98,7 +98,7 @@ bus hierarchy: on the root PCI bus, there is a PCIe root port which connects to a downstream device Topcliff chipset. Inside Topcliff chipset, it has a PCIe-to-PCI bridge and all the chipset integrated devices like the PCI UART device are on the PCI bus. Like other devices in the device tree, if we want -to bind PCI devices before relocation, "u-boot,dm-pre-reloc" must be declared +to bind PCI devices before relocation, "bootph-all" must be declared in each of these nodes. If PCI devices are not listed in the device tree, U_BOOT_PCI_DEVICE can be used diff --git a/doc/develop/driver-model/serial-howto.rst b/doc/develop/driver-model/serial-howto.rst index 5b1d57d83a..17b53e3cab 100644 --- a/doc/develop/driver-model/serial-howto.rst +++ b/doc/develop/driver-model/serial-howto.rst @@ -62,7 +62,7 @@ what you need. U-Boot automatically includes these files: see :ref:`dttweaks`. Here are some things you might need to consider: 1. The serial driver itself needs to be present before relocation, so that the - U-Boot banner appears. Make sure it has a u-boot,dm-pre-reloc tag in the device + U-Boot banner appears. Make sure it has a bootph-all tag in the device tree, so that the serial driver is bound when U-Boot starts. For example, on iMX8:: @@ -75,11 +75,11 @@ Here are some things you might need to consider: put this in your xxx-u-boot.dtsi file:: &lpuart3 { - u-boot,dm-pre-proper; + bootph-some-ram; }; 2. If your serial port requires a particular pinmux configuration, you may need - a pinctrl driver. This needs to have a u-boot,dm-pre-reloc tag also. Take care + a pinctrl driver. This needs to have a bootph-all tag also. Take care that any subnodes have the same tag, if they are needed to make the correct pinctrl available. @@ -107,15 +107,15 @@ Here are some things you might need to consider: parents, so put this in your xxx-u-boot.dtsi file:: &pinctrl { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2 { - u-boot,dm-pre-reloc; + bootph-all; }; &uart2_xfer { - u-boot,dm-pre-reloc; + bootph-all; }; 3. The same applies to power domains. For example, if a particular power domain @@ -125,11 +125,11 @@ Here are some things you might need to consider: For example, on iMX8, put this in your xxx-u-boot.dtsi file:: &pd_dma { - u-boot,dm-pre-proper; + bootph-some-ram; }; &pd_dma_lpuart3 { - u-boot,dm-pre-proper; + bootph-some-ram; }; 4. The same applies to clocks, in the same way. Make sure that when your driver @@ -168,10 +168,10 @@ some customisation. Serial in SPL ------------- -A similar process is needed in SPL, but in this case the u-boot,dm-spl or -u-boot,dm-tpl tags are used. Add these in the same way as above, to ensure that -the SPL device tree contains the required nodes (see spl/u-boot-spl.dtb for -what it actually contains). +A similar process is needed in SPL, but in this case the bootph-pre-ram or +bootph-pre-sram tags are used. Add these in the same way as above, to ensure +that the SPL device tree contains the required nodes (see spl/u-boot-spl.dtb +for what it actually contains). Removing old code ----------------- diff --git a/doc/develop/spl.rst b/doc/develop/spl.rst index aec7b562fa..a1515a7b43 100644 --- a/doc/develop/spl.rst +++ b/doc/develop/spl.rst @@ -113,17 +113,22 @@ with: - the mandatory nodes (/alias, /chosen, /config) - the nodes with one pre-relocation property: - 'u-boot,dm-pre-reloc' or 'u-boot,dm-spl' + 'bootph-all' or 'bootph-pre-ram' fdtgrep is also used to remove: - the properties defined in CONFIG_OF_SPL_REMOVE_PROPS - all the pre-relocation properties - ('u-boot,dm-pre-reloc', 'u-boot,dm-spl' and 'u-boot,dm-tpl') + ('bootph-all', 'bootph-pre-ram' (SPL), 'bootph-pre-sram' (TPL) and + 'bootph-verify' (TPL)) All the nodes remaining in the SPL devicetree are bound (see doc/driver-model/design.rst). +NOTE: U-Boot migrated to a new schema for the u-boot,dm-* tags in 2023. Please +update to use the new bootph-* tags as described in the +doc/device-tree-bindings/bootph.yaml binding file. + Debugging --------- diff --git a/doc/device-tree-bindings/bootph.yaml b/doc/device-tree-bindings/bootph.yaml new file mode 100644 index 0000000000..a3ccf06efa --- /dev/null +++ b/doc/device-tree-bindings/bootph.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: BSD-2-Clause +# Copyright 2022 Google LLC +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bootph.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Boot-phase-specific device nodes + +maintainers: + - Simon Glass <sjg@chromium.org> + +description: | + Some programs run in memory-constrained environments yet want to make use + of device tree. + + The full device tree is often quite large relative to the available memory + of a boot phase, so cannot fit into every phase of the boot process. Even + when memory is not a problem, some phases may wish to limit which device + nodes are present, so as to reduce execution time. + + This binding supports adding tags to device tree nodes to allow them to be + marked according to the phases where they should be included. + + Without any tags, nodes are included only in the final phase, where all + memory is available. Any untagged nodes are dropped from previous phases + and are ignored before the final phase is reached. + + The build process produces a separate executable for each phase. It can + use fdtgrep to drop any nodes which are not needed for a particular build. + For example, the pre-sram build will drop any nodes which are not marked + with bootph-pre-sram or bootph-all tags. + + Note that phase builds may drop the tags, since they have served their + purpose by that point. So when looking at phase-specific device tree files + you may not see these tags. + + Multiple tags can be used in the same node. + + Tags in a child node are implied to be present in all parent nodes as well. + This is important, since some missing properties (such as "ranges", or + "compatible") can cause the child node to be ignored or incorrectly + parsed. + + That said, at present, fdtgrep applies tags only to the node they are + added to, not to any parents. This means U-Boot device tree files often + add the same tag to parent nodes, rather than relying on tooling to do + this. This is a limitation of fdtgrep and it will be addressed so that + 'Linux DTs' do not need to do this. + + The available tags are described as properties below, in order of phase + execution. + +select: true + +properties: + bootph-pre-sram: + type: boolean + description: + Enable this node when SRAM is not available. This phase must set up + some SRAM or cache-as-RAM so it can obtain data/BSS space to use + during execution. + + bootph-verify: + type: boolean + description: + Enable this node in the verification step, which decides which of the + available images should be run next. + + bootph-pre-ram: + type: boolean + description: + Enable this node in the phase that sets up SDRAM. + + bootph-some-ram: + type: boolean + description: + Enable this node in the phase that is run after SDRAM is working but + before all of it is available. Some RAM is available but it is limited + (e.g. it may be split into two pieces by the location of the running + program) because the program code is not yet relocated out of the way. + + bootph-all: + type: boolean + description: + Include this node in all phases (for U-Boot see enum u_boot_phase). + +additionalProperties: true diff --git a/doc/device-tree-bindings/chosen.txt b/doc/device-tree-bindings/chosen.txt index e5ba6720ce..c8312540f5 100644 --- a/doc/device-tree-bindings/chosen.txt +++ b/doc/device-tree-bindings/chosen.txt @@ -129,7 +129,7 @@ Example }; fs_loader0: fs-loader@0 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "u-boot,fs-loader"; phandlepart = <&mmc 1>; }; diff --git a/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt b/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt index 8e7357d53d..da474fbabd 100644 --- a/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt +++ b/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt @@ -54,7 +54,7 @@ Example (for DDR3-1600K and 800MHz) #include <dt-bindings/memory/rk3368-dmc.h> dmc: dmc@ff610000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "rockchip,rk3368-dmc"; reg = <0 0xff610000 0 0x400 0 0xff620000 0 0x400>; diff --git a/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt b/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt index a15dc5d1f8..4a56f78f55 100644 --- a/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt +++ b/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt @@ -16,7 +16,7 @@ Required properties: Example: dmc: dmc { - u-boot,dm-pre-reloc; + bootph-all; compatible = "rockchip,rk3399-dmc"; devfreq-events = <&dfi>; interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>; diff --git a/doc/device-tree-bindings/clock/st,stm32mp1.txt b/doc/device-tree-bindings/clock/st,stm32mp1.txt index 4d4136d2fc..e638bcef7b 100644 --- a/doc/device-tree-bindings/clock/st,stm32mp1.txt +++ b/doc/device-tree-bindings/clock/st,stm32mp1.txt @@ -251,9 +251,9 @@ Example of clock tree initialization / { clocks { - u-boot,dm-pre-reloc; + bootph-all; clk_hse: clk-hse { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -261,28 +261,28 @@ Example of clock tree initialization }; clk_hsi: clk-hsi { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <64000000>; }; clk_lse: clk-lse { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; }; clk_lsi: clk-lsi { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32000>; }; clk_csi: clk-csi { - u-boot,dm-pre-reloc; + bootph-all; #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <4000000>; @@ -292,7 +292,7 @@ Example of clock tree initialization soc { rcc: rcc@50000000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "st,stm32mp1-rcc", "syscon"; reg = <0x50000000 0x1000>; #address-cells = <1>; @@ -371,7 +371,7 @@ Example of clock tree initialization reg = <0>; cfg = < 2 80 0 0 0 PQR(1,0,0) >; frac = < 0x800 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), @@ -381,7 +381,7 @@ Example of clock tree initialization reg = <1>; cfg = < 2 65 1 0 0 PQR(1,1,1) >; frac = < 0x1400 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ @@ -390,7 +390,7 @@ Example of clock tree initialization reg = <2>; cfg = < 1 33 1 16 36 PQR(1,1,1) >; frac = < 0x1a04 >; - u-boot,dm-pre-reloc; + bootph-all; }; /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ @@ -398,7 +398,7 @@ Example of clock tree initialization compatible = "st,stm32mp1-pll"; reg = <3>; cfg = < 3 98 5 7 7 PQR(1,1,1) >; - u-boot,dm-pre-reloc; + bootph-all; }; }; }; diff --git a/doc/device-tree-bindings/device.txt b/doc/device-tree-bindings/device.txt index 73ce2a3b5b..ef4f219e91 100644 --- a/doc/device-tree-bindings/device.txt +++ b/doc/device-tree-bindings/device.txt @@ -54,7 +54,7 @@ pcie-a0@14,0 { }; p2sb: p2sb@d,0 { - u-boot,dm-pre-reloc; + bootph-all; reg = <0x02006810 0 0 0 0>; compatible = "intel,apl-p2sb"; early-regs = <IOMAP_P2SB_BAR 0x100000>; @@ -62,12 +62,12 @@ p2sb: p2sb@d,0 { n { compatible = "intel,apl-pinctrl"; - u-boot,dm-pre-reloc; + bootph-all; intel,p2sb-port-id = <PID_GPIO_N>; acpi,path = "\\_SB.GPO0"; gpio_n: gpio-n { compatible = "intel,gpio"; - u-boot,dm-pre-reloc; + bootph-all; gpio-controller; #gpio-cells = <2>; linux-name = "INT3452:00"; diff --git a/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt index dc8e3251a3..33386ebd38 100644 --- a/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt +++ b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt @@ -474,7 +474,7 @@ Optional properties: Example: &fsp_s { - u-boot,dm-pre-proper; + bootph-some-ram; fsps,ish-enable = <0>; fsps,enable-sata = <0>; diff --git a/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt b/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt index 1ea0a70114..2e41096aa6 100644 --- a/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt +++ b/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt @@ -57,7 +57,7 @@ memorycontroller: memorycontroller@0298e000 { ti,ddr-freq2 = <DDRSS_PLL_FREQUENCY_2>; ti,ddr-fhs-cnt = <DDRSS_PLL_FHS_CNT>; - u-boot,dm-spl; + bootph-pre-ram; ti,ctl-data = < DDRSS_CTL_00_DATA diff --git a/doc/device-tree-bindings/memory-controllers/k3-am654-ddrss.txt b/doc/device-tree-bindings/memory-controllers/k3-am654-ddrss.txt index 1e11edf7b1..792560a323 100644 --- a/doc/device-tree-bindings/memory-controllers/k3-am654-ddrss.txt +++ b/doc/device-tree-bindings/memory-controllers/k3-am654-ddrss.txt @@ -42,5 +42,5 @@ Example (AM65x): reg-names = "ss", "ctl", "phy"; clocks = <&k3_clks 20 0>; power-domains = <&k3_pds 20>; - u-boot,dm-spl; + bootph-pre-ram; }; diff --git a/doc/device-tree-bindings/misc/fs_loader.txt b/doc/device-tree-bindings/misc/fs_loader.txt index 884fbf47c0..542be4b25a 100644 --- a/doc/device-tree-bindings/misc/fs_loader.txt +++ b/doc/device-tree-bindings/misc/fs_loader.txt @@ -20,28 +20,28 @@ ubi in device tree source as shown in below: sata and ubi as shown in below: Example for mmc: fs_loader0: fs-loader@0 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "u-boot,fs-loader"; phandlepart = <&mmc_0 1>; }; Example for usb: fs_loader1: fs-loader@1 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "u-boot,fs-loader"; phandlepart = <&usb0 1>; }; Example for sata: fs_loader2: fs-loader@2 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "u-boot,fs-loader"; phandlepart = <&sata0 1>; }; Example for ubi: fs_loader3: fs-loader@3 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "u-boot,fs-loader"; mtdpart = "UBI", ubivol = "ubi0"; diff --git a/doc/device-tree-bindings/net/mdio-mux-reg.txt b/doc/device-tree-bindings/net/mdio-mux-reg.txt index 0ac34dc423..0f7c295687 100644 --- a/doc/device-tree-bindings/net/mdio-mux-reg.txt +++ b/doc/device-tree-bindings/net/mdio-mux-reg.txt @@ -16,7 +16,7 @@ Example structure, used on Freescale LS1028A QDS board: &i2c0 { status = "okay"; - u-boot,dm-pre-reloc; + bootph-all; fpga@66 { #address-cells = <1>; diff --git a/doc/device-tree-bindings/pci/x86-pci.txt b/doc/device-tree-bindings/pci/x86-pci.txt index cf4e5ed595..e6d4b37535 100644 --- a/doc/device-tree-bindings/pci/x86-pci.txt +++ b/doc/device-tree-bindings/pci/x86-pci.txt @@ -31,7 +31,7 @@ pci { compatible = "pci-x86"; #address-cells = <3>; #size-cells = <2>; - u-boot,dm-pre-reloc; + bootph-all; ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 0x42000000 0x0 0xb0000000 0xb0000000 0 0x10000000 0x01000000 0x0 0x1000 0x1000 0 0xefff>; @@ -41,7 +41,7 @@ pci { serial: serial@18,2 { reg = <0x0200c210 0 0 0 0>; - u-boot,dm-pre-reloc; + bootph-all; compatible = "intel,apl-ns16550"; early-regs = <0xde000000 0x20>; reg-shift = <2>; diff --git a/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt b/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt index 115ab53a4c..38e322db81 100644 --- a/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt +++ b/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt @@ -20,7 +20,7 @@ Example: pinctrl_0: pinctrl@c0010000 { compatible = "nexell,s5pxx18-pinctrl"; reg = <0xc0010000 0xf000>; - u-boot,dm-pre-reloc; + bootph-all; }; Nexell's pin configuration nodes act as a container for an arbitrary number of diff --git a/doc/device-tree-bindings/ram/fsl,mpc83xx-mem-controller.txt b/doc/device-tree-bindings/ram/fsl,mpc83xx-mem-controller.txt index da01fe908d..de498aca78 100644 --- a/doc/device-tree-bindings/ram/fsl,mpc83xx-mem-controller.txt +++ b/doc/device-tree-bindings/ram/fsl,mpc83xx-mem-controller.txt @@ -249,7 +249,7 @@ memory@2000 { compatible = "fsl,mpc83xx-mem-controller"; reg = <0x2000 0x1000>; device_type = "memory"; - u-boot,dm-pre-reloc; + bootph-all; driver_software_override = <DSO_ENABLE>; p_impedance_override = <DSO_P_IMPEDANCE_NOMINAL>; diff --git a/doc/device-tree-bindings/video/atmel-hlcdc.txt b/doc/device-tree-bindings/video/atmel-hlcdc.txt index b378cbf9de..7c9441ae8b 100644 --- a/doc/device-tree-bindings/video/atmel-hlcdc.txt +++ b/doc/device-tree-bindings/video/atmel-hlcdc.txt @@ -15,7 +15,7 @@ Required properties: Example: hlcdc: hlcdc@f0000000 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "atmel,sama5d2-hlcdc"; reg = <0xf0000000 0x2000>; clocks = <&lcdc_clk>; diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index ff5d364f59..3b8595fe61 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -28,7 +28,10 @@ const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[] = { UNIPHIER_CLK_GATE_SIMPLE(14, 0x2104, 16), /* usb30 (Pro4, Pro5, PXs2) */ UNIPHIER_CLK_GATE_SIMPLE(15, 0x2104, 17), /* usb31 (Pro4, Pro5, PXs2) */ UNIPHIER_CLK_GATE_SIMPLE(16, 0x2104, 19), /* usb30-phy (PXs2) */ + UNIPHIER_CLK_RATE(17, 25000000), /* usb30-phy2 (PXs2) */ + UNIPHIER_CLK_RATE(18, 25000000), /* usb30-phy3 (PXs2) */ UNIPHIER_CLK_GATE_SIMPLE(20, 0x2104, 20), /* usb31-phy (PXs2) */ + UNIPHIER_CLK_RATE(21, 25000000), /* usb31-phy2 (PXs2) */ UNIPHIER_CLK_GATE_SIMPLE(24, 0x2108, 2), /* pcie (Pro5) */ { /* sentinel */ } #endif @@ -44,6 +47,8 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { UNIPHIER_CLK_GATE_SIMPLE(14, 0x210c, 14), /* usb30 (LD20) */ UNIPHIER_CLK_GATE_SIMPLE(16, 0x210c, 12), /* usb30-phy0 (LD20) */ UNIPHIER_CLK_GATE_SIMPLE(17, 0x210c, 13), /* usb30-phy1 (LD20) */ + UNIPHIER_CLK_RATE(18, 25000000), /* usb30-phy2 (LD20) */ + UNIPHIER_CLK_RATE(19, 25000000), /* usb30-phy3 (LD20) */ UNIPHIER_CLK_GATE_SIMPLE(24, 0x210c, 4), /* pcie */ { /* sentinel */ } #endif diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index d08578e9c4..f49ee493d3 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -1312,24 +1312,36 @@ bool ofnode_pre_reloc(ofnode node) { #if defined(CONFIG_SPL_BUILD) || defined(CONFIG_TPL_BUILD) /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass - * had property dm-pre-reloc or u-boot,dm-spl/tpl. + * had property bootph-all or bootph-pre-sram/bootph-pre-ram. * They are removed in final dtb (fdtgrep 2nd pass) */ return true; #else - if (ofnode_read_bool(node, "u-boot,dm-pre-reloc")) + if (ofnode_read_bool(node, "bootph-all")) return true; - if (ofnode_read_bool(node, "u-boot,dm-pre-proper")) + if (ofnode_read_bool(node, "bootph-some-ram")) return true; /* * In regular builds individual spl and tpl handling both * count as handled pre-relocation for later second init. */ - if (ofnode_read_bool(node, "u-boot,dm-spl") || - ofnode_read_bool(node, "u-boot,dm-tpl")) + if (ofnode_read_bool(node, "bootph-pre-ram") || + ofnode_read_bool(node, "bootph-pre-sram")) return true; + if (IS_ENABLED(CONFIG_OF_TAG_MIGRATE)) { + /* detect and handle old tags */ + if (ofnode_read_bool(node, "u-boot,dm-pre-reloc") || + ofnode_read_bool(node, "u-boot,dm-pre-proper") || + ofnode_read_bool(node, "u-boot,dm-spl") || + ofnode_read_bool(node, "u-boot,dm-tpl") || + ofnode_read_bool(node, "u-boot,dm-vpl")) { + gd->flags |= GD_FLG_OF_TAG_MIGRATE; + return true; + } + } + return false; #endif } diff --git a/drivers/phy/socionext/Kconfig b/drivers/phy/socionext/Kconfig index bcd579e98e..de87d5b010 100644 --- a/drivers/phy/socionext/Kconfig +++ b/drivers/phy/socionext/Kconfig @@ -10,3 +10,11 @@ config PHY_UNIPHIER_PCIE help Enable this to support PHY implemented in PCIe controller on UniPhier SoCs. + +config PHY_UNIPHIER_USB3 + bool "UniPhier USB3 PHY driver" + depends on PHY && ARCH_UNIPHIER + imply REGMAP + help + Enable this to support PHY implemented in USB3 controller + on UniPhier SoCs. diff --git a/drivers/phy/socionext/Makefile b/drivers/phy/socionext/Makefile index 5484360b70..94d3aa68cf 100644 --- a/drivers/phy/socionext/Makefile +++ b/drivers/phy/socionext/Makefile @@ -4,3 +4,4 @@ # obj-$(CONFIG_PHY_UNIPHIER_PCIE) += phy-uniphier-pcie.o +obj-$(CONFIG_PHY_UNIPHIER_USB3) += phy-uniphier-usb3.o diff --git a/drivers/phy/socionext/phy-uniphier-usb3.c b/drivers/phy/socionext/phy-uniphier-usb3.c new file mode 100644 index 0000000000..1d65b0b08f --- /dev/null +++ b/drivers/phy/socionext/phy-uniphier-usb3.c @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * phy_uniphier_usb3.c - Socionext UniPhier Usb3 PHY driver + * Copyright 2019-2023 Socionext, Inc. + */ + +#include <common.h> +#include <dm.h> +#include <generic-phy.h> + +#include <clk.h> +#include <reset.h> + +struct uniphier_usb3phy_priv { + struct clk *clk_link, *clk_phy, *clk_parent, *clk_phyext; + struct reset_ctl *rst_link, *rst_phy, *rst_parent; +}; + +static int uniphier_usb3phy_init(struct phy *phy) +{ + struct uniphier_usb3phy_priv *priv = dev_get_priv(phy->dev); + int ret; + + ret = clk_enable(priv->clk_phy); + if (ret) + return ret; + + ret = reset_deassert(priv->rst_phy); + if (ret) + goto out_clk; + + if (priv->clk_phyext) { + ret = clk_enable(priv->clk_phyext); + if (ret) + goto out_rst; + } + + return 0; + +out_rst: + reset_assert(priv->rst_phy); +out_clk: + clk_disable(priv->clk_phy); + + return ret; +} + +static int uniphier_usb3phy_exit(struct phy *phy) +{ + struct uniphier_usb3phy_priv *priv = dev_get_priv(phy->dev); + + if (priv->clk_phyext) + clk_disable(priv->clk_phyext); + + reset_assert(priv->rst_phy); + clk_disable(priv->clk_phy); + + return 0; +} + +static int uniphier_usb3phy_probe(struct udevice *dev) +{ + struct uniphier_usb3phy_priv *priv = dev_get_priv(dev); + int ret; + + priv->clk_link = devm_clk_get(dev, "link"); + if (IS_ERR(priv->clk_link)) { + printf("Failed to get link clock\n"); + return PTR_ERR(priv->clk_link); + } + + priv->clk_phy = devm_clk_get(dev, "phy"); + if (IS_ERR(priv->clk_link)) { + printf("Failed to get phy clock\n"); + return PTR_ERR(priv->clk_link); + } + + priv->clk_parent = devm_clk_get_optional(dev, "gio"); + if (IS_ERR(priv->clk_parent)) { + printf("Failed to get parent clock\n"); + return PTR_ERR(priv->clk_parent); + } + + priv->clk_phyext = devm_clk_get_optional(dev, "phy-ext"); + if (IS_ERR(priv->clk_phyext)) { + printf("Failed to get external phy clock\n"); + return PTR_ERR(priv->clk_phyext); + } + + priv->rst_link = devm_reset_control_get(dev, "link"); + if (IS_ERR(priv->rst_link)) { + printf("Failed to get link reset\n"); + return PTR_ERR(priv->rst_link); + } + + priv->rst_phy = devm_reset_control_get(dev, "phy"); + if (IS_ERR(priv->rst_phy)) { + printf("Failed to get phy reset\n"); + return PTR_ERR(priv->rst_phy); + } + + priv->rst_parent = devm_reset_control_get_optional(dev, "gio"); + if (IS_ERR(priv->rst_parent)) { + printf("Failed to get parent reset\n"); + return PTR_ERR(priv->rst_parent); + } + + if (priv->clk_parent) { + ret = clk_enable(priv->clk_parent); + if (ret) + return ret; + } + if (priv->rst_parent) { + ret = reset_deassert(priv->rst_parent); + if (ret) + goto out_clk_parent; + } + + ret = clk_enable(priv->clk_link); + if (ret) + goto out_rst_parent; + + ret = reset_deassert(priv->rst_link); + if (ret) + goto out_clk; + + return 0; + +out_clk: + clk_disable(priv->clk_link); +out_rst_parent: + if (priv->rst_parent) + reset_assert(priv->rst_parent); +out_clk_parent: + if (priv->clk_parent) + clk_disable(priv->clk_parent); + + return ret; +} + +static struct phy_ops uniphier_usb3phy_ops = { + .init = uniphier_usb3phy_init, + .exit = uniphier_usb3phy_exit, +}; + +static const struct udevice_id uniphier_usb3phy_ids[] = { + { .compatible = "socionext,uniphier-pro4-usb3-ssphy" }, + { .compatible = "socionext,uniphier-pro5-usb3-hsphy" }, + { .compatible = "socionext,uniphier-pro5-usb3-ssphy" }, + { .compatible = "socionext,uniphier-pxs2-usb3-hsphy" }, + { .compatible = "socionext,uniphier-pxs2-usb3-ssphy" }, + { .compatible = "socionext,uniphier-ld20-usb3-hsphy" }, + { .compatible = "socionext,uniphier-ld20-usb3-ssphy" }, + { .compatible = "socionext,uniphier-pxs3-usb3-hsphy" }, + { .compatible = "socionext,uniphier-pxs3-usb3-ssphy" }, + { .compatible = "socionext,uniphier-nx1-usb3-hsphy" }, + { .compatible = "socionext,uniphier-nx1-usb3-ssphy" }, + { } +}; + +U_BOOT_DRIVER(uniphier_usb3_phy) = { + .name = "uniphier-usb3-phy", + .id = UCLASS_PHY, + .of_match = uniphier_usb3phy_ids, + .ops = &uniphier_usb3phy_ops, + .probe = uniphier_usb3phy_probe, + .priv_auto = sizeof(struct uniphier_usb3phy_priv), +}; diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index 7adae51873..35e3ccebd7 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2016 Socionext Inc. * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * Author: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> */ #include <common.h> @@ -9,6 +10,8 @@ #include <log.h> #include <malloc.h> #include <reset-uclass.h> +#include <clk.h> +#include <reset.h> #include <dm/device_compat.h> #include <linux/bitops.h> #include <linux/io.h> @@ -178,10 +181,17 @@ static const struct uniphier_reset_data uniphier_pro4_peri_reset_data[] = { UNIPHIER_RESET_END, }; +/* Glue reset data */ +static const struct uniphier_reset_data uniphier_pro4_usb3_reset_data[] = { + UNIPHIER_RESETX(15, 0, 15) +}; + /* core implementaton */ struct uniphier_reset_priv { void __iomem *base; const struct uniphier_reset_data *data; + struct clk_bulk clks; + struct reset_ctl_bulk rsts; }; static int uniphier_reset_update(struct reset_ctl *reset_ctl, int assert) @@ -233,10 +243,47 @@ static const struct reset_ops uniphier_reset_ops = { .rst_deassert = uniphier_reset_deassert, }; +static int uniphier_reset_rst_init(struct udevice *dev) +{ + struct uniphier_reset_priv *priv = dev_get_priv(dev); + int ret; + + ret = reset_get_bulk(dev, &priv->rsts); + if (ret == -ENOSYS || ret == -ENOENT) + return 0; + else if (ret) + return ret; + + ret = reset_deassert_bulk(&priv->rsts); + if (ret) + reset_release_bulk(&priv->rsts); + + return ret; +} + +static int uniphier_reset_clk_init(struct udevice *dev) +{ + struct uniphier_reset_priv *priv = dev_get_priv(dev); + int ret; + + ret = clk_get_bulk(dev, &priv->clks); + if (ret == -ENOSYS || ret == -ENOENT) + return 0; + if (ret) + return ret; + + ret = clk_enable_bulk(&priv->clks); + if (ret) + clk_release_bulk(&priv->clks); + + return ret; +} + static int uniphier_reset_probe(struct udevice *dev) { struct uniphier_reset_priv *priv = dev_get_priv(dev); fdt_addr_t addr; + int ret; addr = dev_read_addr(dev->parent); if (addr == FDT_ADDR_T_NONE) @@ -248,7 +295,11 @@ static int uniphier_reset_probe(struct udevice *dev) priv->data = (void *)dev_get_driver_data(dev); - return 0; + ret = uniphier_reset_clk_init(dev); + if (ret) + return ret; + + return uniphier_reset_rst_init(dev); } static const struct udevice_id uniphier_reset_match[] = { @@ -355,6 +406,31 @@ static const struct udevice_id uniphier_reset_match[] = { .compatible = "socionext,uniphier-pxs3-peri-reset", .data = (ulong)uniphier_pro4_peri_reset_data, }, + /* USB glue reset */ + { + .compatible = "socionext,uniphier-pro4-usb3-reset", + .data = (ulong)uniphier_pro4_usb3_reset_data, + }, + { + .compatible = "socionext,uniphier-pro5-usb3-reset", + .data = (ulong)uniphier_pro4_usb3_reset_data, + }, + { + .compatible = "socionext,uniphier-pxs2-usb3-reset", + .data = (ulong)uniphier_pro4_usb3_reset_data, + }, + { + .compatible = "socionext,uniphier-ld20-usb3-reset", + .data = (ulong)uniphier_pro4_usb3_reset_data, + }, + { + .compatible = "socionext,uniphier-pxs3-usb3-reset", + .data = (ulong)uniphier_pro4_usb3_reset_data, + }, + { + .compatible = "socionext,uniphier-nx1-usb3-reset", + .data = (ulong)uniphier_pro4_usb3_reset_data, + }, { /* sentinel */ } }; diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index f010291d02..d1665f8c58 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -55,7 +55,10 @@ config USB_DWC3_MESON_GXL config USB_DWC3_UNIPHIER bool "DesignWare USB3 Host Support on UniPhier Platforms" - depends on ARCH_UNIPHIER && USB_XHCI_DWC3 + depends on ARCH_UNIPHIER && USB_DWC3 + select USB_DWC3_GENERIC + select PHY + select PHY_UNIPHIER_USB3 help Support of USB2/3 functionality in Socionext UniPhier platforms. Say 'Y' here if you have one such device. diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index ed1b9b630e..66da5a8d6f 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -28,11 +28,7 @@ #include <usb/xhci.h> #include <asm/gpio.h> -struct dwc3_glue_data { - struct clk_bulk clks; - struct reset_ctl_bulk resets; - fdt_addr_t regs; -}; +#include "dwc3-generic.h" struct dwc3_generic_plat { fdt_addr_t base; @@ -68,10 +64,27 @@ static int dwc3_generic_probe(struct udevice *dev, #if CONFIG_IS_ENABLED(OF_CONTROL) dwc3_of_parse(dwc3); + /* + * There are currently four disparate placement possibilities of DWC3 + * reference clock phandle in SoC DTs: + * - in top level glue node, with generic subnode without clock (ZynqMP) + * - in top level generic node, with no subnode (i.MX8MQ) + * - in generic subnode, with other clock in top level node (i.MX8MP) + * - in both top level node and generic subnode (Rockchip) + * Cover all the possibilities here by looking into both nodes, start + * with the top level node as that seems to be used in majority of DTs + * to reference the clock. + */ node = dev_ofnode(dev->parent); index = ofnode_stringlist_search(node, "clock-names", "ref"); if (index < 0) index = ofnode_stringlist_search(node, "clock-names", "ref_clk"); + if (index < 0) { + node = dev_ofnode(dev); + index = ofnode_stringlist_search(node, "clock-names", "ref"); + if (index < 0) + index = ofnode_stringlist_search(node, "clock-names", "ref_clk"); + } if (index >= 0) dwc3->ref_clk = &glue->clks.clks[index]; #endif @@ -258,11 +271,6 @@ U_BOOT_DRIVER(dwc3_generic_host) = { }; #endif -struct dwc3_glue_ops { - void (*glue_configure)(struct udevice *dev, int index, - enum usb_dr_mode mode); -}; - void dwc3_imx8mp_glue_configure(struct udevice *dev, int index, enum usb_dr_mode mode) { @@ -398,54 +406,74 @@ struct dwc3_glue_ops ti_ops = { .glue_configure = dwc3_ti_glue_configure, }; -static int dwc3_glue_bind(struct udevice *parent) +static int dwc3_glue_bind_common(struct udevice *parent, ofnode node) { - ofnode node; - int ret; + const char *name = ofnode_get_name(node); + const char *driver = NULL; enum usb_dr_mode dr_mode; + struct udevice *dev; + int ret; - dr_mode = usb_get_dr_mode(dev_ofnode(parent)); - - ofnode_for_each_subnode(node, dev_ofnode(parent)) { - const char *name = ofnode_get_name(node); - struct udevice *dev; - const char *driver = NULL; - - debug("%s: subnode name: %s\n", __func__, name); + debug("%s: subnode name: %s\n", __func__, name); - /* if the parent node doesn't have a mode check the leaf */ - if (!dr_mode) - dr_mode = usb_get_dr_mode(node); + /* if the parent node doesn't have a mode check the leaf */ + dr_mode = usb_get_dr_mode(dev_ofnode(parent)); + if (!dr_mode) + dr_mode = usb_get_dr_mode(node); - switch (dr_mode) { - case USB_DR_MODE_PERIPHERAL: - case USB_DR_MODE_OTG: + switch (dr_mode) { + case USB_DR_MODE_PERIPHERAL: + case USB_DR_MODE_OTG: #if CONFIG_IS_ENABLED(DM_USB_GADGET) - debug("%s: dr_mode: OTG or Peripheral\n", __func__); - driver = "dwc3-generic-peripheral"; + debug("%s: dr_mode: OTG or Peripheral\n", __func__); + driver = "dwc3-generic-peripheral"; #endif - break; + break; #if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD) - case USB_DR_MODE_HOST: - debug("%s: dr_mode: HOST\n", __func__); - driver = "dwc3-generic-host"; - break; + case USB_DR_MODE_HOST: + debug("%s: dr_mode: HOST\n", __func__); + driver = "dwc3-generic-host"; + break; #endif - default: - debug("%s: unsupported dr_mode\n", __func__); - return -ENODEV; - }; + default: + debug("%s: unsupported dr_mode\n", __func__); + return -ENODEV; + }; - if (!driver) - continue; + if (!driver) + return -ENXIO; + + ret = device_bind_driver_to_node(parent, driver, name, + node, &dev); + if (ret) { + debug("%s: not able to bind usb device mode\n", + __func__); + return ret; + } + + return 0; +} - ret = device_bind_driver_to_node(parent, driver, name, - node, &dev); - if (ret) { - debug("%s: not able to bind usb device mode\n", - __func__); +int dwc3_glue_bind(struct udevice *parent) +{ + struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(parent); + ofnode node; + int ret; + + if (ops && ops->glue_get_ctrl_dev) { + ret = ops->glue_get_ctrl_dev(parent, &node); + if (ret) + return ret; + + return dwc3_glue_bind_common(parent, node); + } + + ofnode_for_each_subnode(node, dev_ofnode(parent)) { + ret = dwc3_glue_bind_common(parent, node); + if (ret == -ENXIO) + continue; + if (ret) return ret; - } } return 0; @@ -493,7 +521,7 @@ static int dwc3_glue_clk_init(struct udevice *dev, return 0; } -static int dwc3_glue_probe(struct udevice *dev) +int dwc3_glue_probe(struct udevice *dev) { struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(dev); struct dwc3_glue_data *glue = dev_get_plat(dev); @@ -514,7 +542,7 @@ static int dwc3_glue_probe(struct udevice *dev) phy.dev = NULL; } - glue->regs = dev_read_addr(dev); + glue->regs = dev_read_addr_size_index(dev, 0, &glue->size); ret = dwc3_glue_clk_init(dev, glue); if (ret) @@ -534,6 +562,12 @@ static int dwc3_glue_probe(struct udevice *dev) if (ret) return ret; + if (glue->clks.count == 0) { + ret = dwc3_glue_clk_init(child, glue); + if (ret) + return ret; + } + if (glue->resets.count == 0) { ret = dwc3_glue_reset_init(child, glue); if (ret) @@ -553,7 +587,7 @@ static int dwc3_glue_probe(struct udevice *dev) return 0; } -static int dwc3_glue_remove(struct udevice *dev) +int dwc3_glue_remove(struct udevice *dev) { struct dwc3_glue_data *glue = dev_get_plat(dev); diff --git a/drivers/usb/dwc3/dwc3-generic.h b/drivers/usb/dwc3/dwc3-generic.h new file mode 100644 index 0000000000..40902c8923 --- /dev/null +++ b/drivers/usb/dwc3/dwc3-generic.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * dwc3-generic.h - Generic DWC3 Glue layer header + * + * Copyright (C) 2016 - 2018 Xilinx, Inc. + * Copyright (C) 2023 Socionext Inc. + */ + +#ifndef __DRIVERS_USB_DWC3_GENERIC_H +#define __DRIVERS_USB_DWC3_GENERIC_H + +#include <clk.h> +#include <reset.h> +#include <dwc3-uboot.h> + +struct dwc3_glue_data { + struct clk_bulk clks; + struct reset_ctl_bulk resets; + fdt_addr_t regs; + fdt_size_t size; +}; + +struct dwc3_glue_ops { + int (*glue_get_ctrl_dev)(struct udevice *parent, ofnode *node); + void (*glue_configure)(struct udevice *dev, int index, + enum usb_dr_mode mode); +}; + +int dwc3_glue_bind(struct udevice *parent); +int dwc3_glue_probe(struct udevice *dev); +int dwc3_glue_remove(struct udevice *dev); + +#endif diff --git a/drivers/usb/dwc3/dwc3-uniphier.c b/drivers/usb/dwc3/dwc3-uniphier.c index 54b52dcd66..ab85428a70 100644 --- a/drivers/usb/dwc3/dwc3-uniphier.c +++ b/drivers/usb/dwc3/dwc3-uniphier.c @@ -4,14 +4,17 @@ * * Copyright (C) 2016-2017 Socionext Inc. * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * Author: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> */ #include <dm.h> -#include <dm/device_compat.h> +#include <dm/lists.h> #include <linux/bitops.h> -#include <linux/errno.h> -#include <linux/io.h> -#include <linux/sizes.h> +#include <linux/usb/gadget.h> + +#include "core.h" +#include "gadget.h" +#include "dwc3-generic.h" #define UNIPHIER_PRO4_DWC3_RESET 0x40 #define UNIPHIER_PRO4_DWC3_RESET_XIOMMU BIT(5) @@ -27,8 +30,11 @@ #define UNIPHIER_PXS2_DWC3_RESET 0x00 #define UNIPHIER_PXS2_DWC3_RESET_XLINK BIT(15) -static int uniphier_pro4_dwc3_init(void __iomem *regs) +static void uniphier_pro4_dwc3_init(struct udevice *dev, int index, + enum usb_dr_mode mode) { + struct dwc3_glue_data *glue = dev_get_plat(dev); + void *regs = map_physmem(glue->regs, glue->size, MAP_NOCACHE); u32 tmp; tmp = readl(regs + UNIPHIER_PRO4_DWC3_RESET); @@ -36,11 +42,14 @@ static int uniphier_pro4_dwc3_init(void __iomem *regs) tmp |= UNIPHIER_PRO4_DWC3_RESET_XIOMMU | UNIPHIER_PRO4_DWC3_RESET_XLINK; writel(tmp, regs + UNIPHIER_PRO4_DWC3_RESET); - return 0; + unmap_physmem(regs, MAP_NOCACHE); } -static int uniphier_pro5_dwc3_init(void __iomem *regs) +static void uniphier_pro5_dwc3_init(struct udevice *dev, int index, + enum usb_dr_mode mode) { + struct dwc3_glue_data *glue = dev_get_plat(dev); + void *regs = map_physmem(glue->regs, glue->size, MAP_NOCACHE); u32 tmp; tmp = readl(regs + UNIPHIER_PRO5_DWC3_RESET); @@ -49,72 +58,97 @@ static int uniphier_pro5_dwc3_init(void __iomem *regs) tmp |= UNIPHIER_PRO5_DWC3_RESET_XLINK | UNIPHIER_PRO5_DWC3_RESET_XIOMMU; writel(tmp, regs + UNIPHIER_PRO5_DWC3_RESET); - return 0; + unmap_physmem(regs, MAP_NOCACHE); } -static int uniphier_pxs2_dwc3_init(void __iomem *regs) +static void uniphier_pxs2_dwc3_init(struct udevice *dev, int index, + enum usb_dr_mode mode) { + struct dwc3_glue_data *glue = dev_get_plat(dev); + void *regs = map_physmem(glue->regs, glue->size, MAP_NOCACHE); u32 tmp; tmp = readl(regs + UNIPHIER_PXS2_DWC3_RESET); tmp |= UNIPHIER_PXS2_DWC3_RESET_XLINK; writel(tmp, regs + UNIPHIER_PXS2_DWC3_RESET); - return 0; + unmap_physmem(regs, MAP_NOCACHE); } -static int uniphier_dwc3_probe(struct udevice *dev) +static int dwc3_uniphier_glue_get_ctrl_dev(struct udevice *dev, ofnode *node) { - fdt_addr_t base; - void __iomem *regs; - int (*init)(void __iomem *regs); - int ret; + struct udevice *child; + const char *name; + ofnode subnode; + + /* + * "controller reset" belongs to glue logic, and it should be + * accessible in .glue_configure() before access to the controller + * begins. + */ + ofnode_for_each_subnode(subnode, dev_ofnode(dev)) { + name = ofnode_get_name(subnode); + if (!strncmp(name, "reset", 5)) + device_bind_driver_to_node(dev, "uniphier-reset", + name, subnode, &child); + } + + /* Get controller node that is placed separately from the glue node */ + *node = ofnode_by_compatible(dev_ofnode(dev->parent), + "socionext,uniphier-dwc3"); - base = dev_read_addr(dev); - if (base == FDT_ADDR_T_NONE) - return -EINVAL; - - regs = ioremap(base, SZ_32K); - if (!regs) - return -ENOMEM; + return 0; +} - init = (typeof(init))dev_get_driver_data(dev); - ret = init(regs); - if (ret) - dev_err(dev, "failed to init glue layer\n"); +static const struct dwc3_glue_ops uniphier_pro4_dwc3_ops = { + .glue_get_ctrl_dev = dwc3_uniphier_glue_get_ctrl_dev, + .glue_configure = uniphier_pro4_dwc3_init, +}; - iounmap(regs); +static const struct dwc3_glue_ops uniphier_pro5_dwc3_ops = { + .glue_get_ctrl_dev = dwc3_uniphier_glue_get_ctrl_dev, + .glue_configure = uniphier_pro5_dwc3_init, +}; - return ret; -} +static const struct dwc3_glue_ops uniphier_pxs2_dwc3_ops = { + .glue_get_ctrl_dev = dwc3_uniphier_glue_get_ctrl_dev, + .glue_configure = uniphier_pxs2_dwc3_init, +}; static const struct udevice_id uniphier_dwc3_match[] = { { - .compatible = "socionext,uniphier-pro4-dwc3", - .data = (ulong)uniphier_pro4_dwc3_init, + .compatible = "socionext,uniphier-pro4-dwc3-glue", + .data = (ulong)&uniphier_pro4_dwc3_ops, + }, + { + .compatible = "socionext,uniphier-pro5-dwc3-glue", + .data = (ulong)&uniphier_pro5_dwc3_ops, }, { - .compatible = "socionext,uniphier-pro5-dwc3", - .data = (ulong)uniphier_pro5_dwc3_init, + .compatible = "socionext,uniphier-pxs2-dwc3-glue", + .data = (ulong)&uniphier_pxs2_dwc3_ops, }, { - .compatible = "socionext,uniphier-pxs2-dwc3", - .data = (ulong)uniphier_pxs2_dwc3_init, + .compatible = "socionext,uniphier-ld20-dwc3-glue", + .data = (ulong)&uniphier_pxs2_dwc3_ops, }, { - .compatible = "socionext,uniphier-ld20-dwc3", - .data = (ulong)uniphier_pxs2_dwc3_init, + .compatible = "socionext,uniphier-pxs3-dwc3-glue", + .data = (ulong)&uniphier_pxs2_dwc3_ops, }, { - .compatible = "socionext,uniphier-pxs3-dwc3", - .data = (ulong)uniphier_pxs2_dwc3_init, + .compatible = "socionext,uniphier-nx1-dwc3-glue", + .data = (ulong)&uniphier_pxs2_dwc3_ops, }, { /* sentinel */ } }; -U_BOOT_DRIVER(usb_xhci) = { +U_BOOT_DRIVER(dwc3_uniphier_wrapper) = { .name = "uniphier-dwc3", .id = UCLASS_SIMPLE_BUS, .of_match = uniphier_dwc3_match, - .probe = uniphier_dwc3_probe, + .bind = dwc3_glue_bind, + .probe = dwc3_glue_probe, + .remove = dwc3_glue_remove, + .plat_auto = sizeof(struct dwc3_glue_data), }; diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index 6aaacff10d..ab482f11e5 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -529,8 +529,8 @@ static int video_post_bind(struct udevice *dev) addr = uc_priv->video_ptr; size = alloc_fb(dev, &addr); if (addr < gd->video_bottom) { - /* Device tree node may need the 'u-boot,dm-pre-reloc' or - * 'u-boot,dm-pre-proper' tag + /* Device tree node may need the 'bootph-all' or + * 'bootph-some-ram' tag */ printf("Video device '%s' cannot allocate frame buffer memory -ensure the device is set up before relocation\n", dev->name); diff --git a/dts/Kconfig b/dts/Kconfig index 44cc6bf1f6..3b7489f0f8 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -342,6 +342,16 @@ config SPL_MULTI_DTB_FIT_USER_DEF_ADDR at compilation time. This is the address of this area. It must be aligned on 2-byte boundary. +config OF_TAG_MIGRATE + bool "Ease migration from old device trees with u-boot,dm- tags" + default y + help + U-Boot moved over to use new tags to mark device tree nodes which need + to be processed in SPL, before relocation, etc. Enable this option to + detect old tags and handle them. + + Note: This option will be removed after the 2023.07 release. + config OF_SPL_REMOVE_PROPS string "List of device tree properties to drop for SPL" depends on SPL_OF_CONTROL @@ -352,7 +362,7 @@ config OF_SPL_REMOVE_PROPS help Since SPL normally runs in a reduced memory space, the device tree is cut down to only what is needed to load and start U-Boot. Only - nodes marked with the property "u-boot,dm-pre-reloc" will be + nodes marked with the property "bootph-all" will be included. In addition, some properties are not used by U-Boot and can be discarded. This option defines the list of properties to discard. diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index da17ac8cbc..987fb66c17 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -650,6 +650,10 @@ enum gd_flags { * @GD_FLG_FDT_CHANGED: Device tree change has been detected by tests */ GD_FLG_FDT_CHANGED = 0x100000, + /** + * @GD_FLG_OF_TAG_MIGRATE: Device tree has old u-boot,dm- tags + */ + GD_FLG_OF_TAG_MIGRATE = 0x200000, }; #endif /* __ASSEMBLY__ */ diff --git a/include/dm/device.h b/include/dm/device.h index e9460386ca..b86bf90609 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -1070,7 +1070,7 @@ static inline bool device_is_on_pci_bus(const struct udevice *dev) * sub-nodes and binds drivers for each node where a driver can be found. * * If this is called prior to relocation, only pre-relocation devices will be - * bound (those marked with u-boot,dm-pre-reloc in the device tree, or where + * bound (those marked with bootph-all in the device tree, or where * the driver has the DM_FLAG_PRE_RELOC flag set). Otherwise, all devices will * be bound. * diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 3f6b0843c5..c00677275e 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -1188,12 +1188,12 @@ int ofnode_read_simple_size_cells(ofnode node); * determine if a node was bound in one of SPL/TPL stages. * * There are 4 settings currently in use - * - u-boot,dm-pre-proper: U-Boot proper pre-relocation only - * - u-boot,dm-pre-reloc: legacy and indicates any of TPL or SPL + * - bootph-some-ram: U-Boot proper pre-relocation only + * - bootph-all: all phases * Existing platforms only use it to indicate nodes needed in - * SPL. Should probably be replaced by u-boot,dm-spl for new platforms. - * - u-boot,dm-spl: SPL and U-Boot pre-relocation - * - u-boot,dm-tpl: TPL and U-Boot pre-relocation + * SPL. Should probably be replaced by bootph-pre-ram for new platforms. + * - bootph-pre-ram: SPL and U-Boot pre-relocation + * - bootph-pre-sram: TPL and U-Boot pre-relocation * * @node: node to check * Return: true if node is needed in SPL/TL, false otherwise diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index ac45a88478..7b27224b5d 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -585,24 +585,35 @@ cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \ # --------------------------------------------------------------------------- # Pass the original device tree file through fdtgrep twice. The first pass # removes any unwanted nodes (i.e. those which don't have the -# 'u-boot,dm-pre-reloc' property and thus are not needed by SPL. The second +# 'bootph-all' property and thus are not needed by SPL. The second # pass removes various unused properties from the remaining nodes. # The output is typically a much smaller device tree file. + +ifdef CONFIG_OF_TAG_MIGRATE +# Support the old tags for a migration period +migrate_tpl := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl +migrate_vpl := -b u-boot,dm-pre-reloc -b u-boot,dm-vpl +migrate_spl := -b u-boot,dm-pre-reloc -b u-boot,dm-spl +migrate_all := -P u-boot,dm-pre-reloc \ + -P u-boot,dm-spl -P u-boot,dm-tpl -P u-boot,dm-vpl +endif + ifeq ($(CONFIG_VPL_BUILD),y) -fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-vpl +fdtgrep_props := -b bootph-all -b bootph-verify $(migrate_vpl) else ifeq ($(CONFIG_TPL_BUILD),y) -fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl +fdtgrep_props := -b bootph-all -b bootph-pre-sram $(migrate_tpl) else -fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-spl +fdtgrep_props := -b bootph-all -b bootph-pre-ram $(migrate_spl) endif endif quiet_cmd_fdtgrep = FDTGREP $@ cmd_fdtgrep = $(objtree)/tools/fdtgrep $(fdtgrep_props) -RT $< \ -n /chosen -n /config -O dtb | \ $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \ - -P u-boot,dm-pre-reloc -P u-boot,dm-spl -P u-boot,dm-tpl \ - -P u-boot,dm-vpl \ + -P bootph-all -P bootph-pre-ram -P bootph-pre-sram \ + -P bootph-verify \ + $(migrate_all) \ $(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS))) # fdt_rm_props diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index ccfcbb3e12..62b764f6c3 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -2680,6 +2680,12 @@ sub u_boot_line { "DEVICE_PRIV_AUTO", $herecurr); u_boot_struct_name($line, "per_device_plat_auto", "_plat", "DEVICE_PLAT_AUTO", $herecurr); + + # Avoid using the pre-schema driver model tags + if ($line =~ /^\+.*u-boot,dm-.*/) { + ERROR("PRE_SCHEMA", + "Driver model schema uses 'bootph-...' tags now\n" . $herecurr); + } } sub exclude_global_initialisers { diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c index 1d2af94f56..8e6e42e46b 100644 --- a/test/dm/test-fdt.c +++ b/test/dm/test-fdt.c @@ -215,7 +215,7 @@ static int dm_test_fdt_pre_reloc(struct unit_test_state *uts) /* * These are 2 pre-reloc devices: - * one with "u-boot,dm-pre-reloc" property (a-test node), and the other + * one with "bootph-all" property (a-test node), and the other * one whose driver marked with DM_FLAG_PRE_RELOC flag (h-test node). */ ut_asserteq(2, list_count_items(&uc->dev_head)); diff --git a/test/nokia_rx51_test.sh b/test/nokia_rx51_test.sh index a516ec2967..dca9ef3027 100755 --- a/test/nokia_rx51_test.sh +++ b/test/nokia_rx51_test.sh @@ -83,8 +83,10 @@ echo # Download qflasher and nolo images # This is proprietary qemu flasher tool with first stage images, but license allows non-commercial redistribution -wget -c http://repository.maemo.org/qemu-n900/qemu-n900.tar.gz -tar -xf qemu-n900.tar.gz +if ! test -f qflasher || ! test -f xloader-qemu.bin || ! test -f secondary-qemu.bin; then + test -f qemu-n900.tar.gz || wget -c http://repository.maemo.org/qemu-n900/qemu-n900.tar.gz + tar -xf qemu-n900.tar.gz +fi # Download Maemo script u-boot-gen-combined if ! test -f u-boot-gen-combined; then @@ -94,16 +96,22 @@ if ! test -f u-boot-gen-combined; then fi # Download Maemo fiasco kernel -wget -c http://repository.maemo.org/pool/maemo5.0/free/k/kernel/kernel_2.6.28-20103103+0m5_armel.deb -dpkg -x kernel_2.6.28-20103103+0m5_armel.deb kernel_2.6.28 +if ! test -d kernel_2.6.28; then + test -f kernel_2.6.28-20103103+0m5_armel.deb || wget -c http://repository.maemo.org/pool/maemo5.0/free/k/kernel/kernel_2.6.28-20103103+0m5_armel.deb + dpkg -x kernel_2.6.28-20103103+0m5_armel.deb kernel_2.6.28 +fi # Download Maemo libc -wget -c http://repository.maemo.org/pool/maemo5.0/free/g/glibc/libc6_2.5.1-1eglibc27+0m5_armel.deb -dpkg -x libc6_2.5.1-1eglibc27+0m5_armel.deb libc6_2.5.1 +if ! test -d libc6_2.5.1; then + test -f libc6_2.5.1-1eglibc27+0m5_armel.deb || wget -c http://repository.maemo.org/pool/maemo5.0/free/g/glibc/libc6_2.5.1-1eglibc27+0m5_armel.deb + dpkg -x libc6_2.5.1-1eglibc27+0m5_armel.deb libc6_2.5.1 +fi # Download Maemo busybox -wget -c http://repository.maemo.org/pool/maemo5.0/free/b/busybox/busybox_1.10.2.legal-1osso30+0m5_armel.deb -dpkg -x busybox_1.10.2.legal-1osso30+0m5_armel.deb busybox_1.10.2 +if ! test -d busybox_1.10.2; then + test -f busybox_1.10.2.legal-1osso30+0m5_armel.deb || wget -c http://repository.maemo.org/pool/maemo5.0/free/b/busybox/busybox_1.10.2.legal-1osso30+0m5_armel.deb + dpkg -x busybox_1.10.2.legal-1osso30+0m5_armel.deb busybox_1.10.2 +fi echo echo "=======================================" diff --git a/test/py/multiplexed_log.py b/test/py/multiplexed_log.py index 5e79075f2e..63237594bb 100644 --- a/test/py/multiplexed_log.py +++ b/test/py/multiplexed_log.py @@ -111,7 +111,7 @@ class RunAndLog(object): """Clean up any resources managed by this object.""" pass - def run(self, cmd, cwd=None, ignore_errors=False, stdin=None): + def run(self, cmd, cwd=None, ignore_errors=False, stdin=None, env=None): """Run a command as a sub-process, and log the results. The output is available at self.output which can be useful if there is @@ -126,6 +126,7 @@ class RunAndLog(object): or exits with an error code, otherwise an exception will be raised if such problems occur. stdin: Input string to pass to the command as stdin (or None) + env: Environment to use, or None to use the current one Returns: The output as a string. @@ -139,7 +140,7 @@ class RunAndLog(object): try: p = subprocess.Popen(cmd, cwd=cwd, stdin=subprocess.PIPE if stdin else None, - stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + stdout=subprocess.PIPE, stderr=subprocess.STDOUT, env=env) (stdout, stderr) = p.communicate(input=stdin) if stdout is not None: stdout = stdout.decode('utf-8') diff --git a/test/py/tests/test_of_migrate.py b/test/py/tests/test_of_migrate.py new file mode 100644 index 0000000000..910f7c0551 --- /dev/null +++ b/test/py/tests/test_of_migrate.py @@ -0,0 +1,108 @@ +# SPDX-License-Identifier: GPL-2.0 +# Copyright 2023 Google LLC +# Written by Simon Glass <sjg@chromium.org> + +"""Test handling of unmigrated u-boot,dm- tags""" + +import os +import pytest + +import u_boot_utils as util + +# This is needed for Azure, since the default '..' directory is not writeable +TMPDIR1 = '/tmp/test_no_migrate' +TMPDIR2 = '/tmp/test_no_migrate_spl' +TMPDIR3 = '/tmp/test_migrate' + +def build_for_migrate(cons, replace_pair, board, tmpdir, disable_migrate=True): + """Build an updated U-Boot with a slightly modified device tree + + Args: + cons (ConsoleBase): U-Boot console + replace_pair (tuple): + String to find + String to replace it with + board (str): Board to build + tmpdir (str): Temporary directory to use + disable_migrate (bool): True to disable CONFIG_OF_TAG_MIGRATE in build + """ + srcdir = cons.config.source_dir + build_dir = cons.config.build_dir + + # Get the source for the existing dts + dt_dir = os.path.join(build_dir, 'arch', 'sandbox', 'dts') + orig_fname = os.path.join(dt_dir, 'sandbox.dtb') + out_dts = os.path.join(dt_dir, 'sandbox_out.dts') + util.run_and_log(cons, ['dtc', orig_fname, '-I', 'dtb', '-O', 'dts', + '-o', out_dts]) + + # Update it to use an old tag + with open(out_dts) as inf: + data = inf.read() + data = data.replace(*replace_pair) + + dts_fname = os.path.join(dt_dir, 'sandbox_oldtag.dts') + with open(dts_fname, 'w') as outf: + print(data, file=outf) + dtb_fname = os.path.join(dt_dir, 'sandbox_oldtag.dtb') + util.run_and_log(cons, ['dtc', dts_fname, '-o', dtb_fname]) + + migrate = ['-a', '~CONFIG_OF_TAG_MIGRATE'] if disable_migrate else [] + + # Build sandbox with this new dtb, turning off OF_TAG_MIGRATE + env = dict(os.environ) + env['EXT_DTB'] = dtb_fname + env['DEVICE_TREE'] = 'sandbox_new' + env['NO_LTO'] = '1' # Speed up build + out = util.run_and_log( + cons, ['./tools/buildman/buildman', '-m', '--board', board, + *migrate, '-w', '-o', tmpdir], ignore_errors=True, env=env) + return out + +@pytest.mark.slow +@pytest.mark.boardspec('sandbox') +def test_of_no_migrate(u_boot_console): + """Test sandbox with old boot phase tags like u-boot,dm-pre-proper""" + cons = u_boot_console + + build_for_migrate(cons, ['bootph-some-ram', 'u-boot,dm-pre-proper'], + 'sandbox', TMPDIR1) + + # It should fail to run, since the lcd device will not be bound before + # relocation. so won't get its frame-buffer memory + out = util.run_and_log( + cons, [os.path.join(TMPDIR1, 'u-boot'), '-D', '-c', 'help'], + ignore_errors=True) + assert "Video device 'lcd' cannot allocate frame buffer memory" in out + + +@pytest.mark.slow +@pytest.mark.boardspec('sandbox_spl') +@pytest.mark.boardspec('spl_of_platdata_inst') +@pytest.mark.boardspec('!sandbox_tpl') +def test_of_no_migrate_spl(u_boot_console): + """Test sandbox with old boot phase tags like u-boot,dm-spl""" + cons = u_boot_console + + out = build_for_migrate(cons, ['bootph-pre-ram', 'u-boot,dm-spl'], + 'sandbox_spl', TMPDIR2) + + # It should fail to build, since the SPL DT will not include 'spl-test' + # node, among others + assert "undefined type ‘struct dtd_sandbox_spl_test’" in out + + +@pytest.mark.slow +@pytest.mark.boardspec('sandbox') +def test_of_migrate(u_boot_console): + """Test sandbox shows a message when tags were migrated""" + cons = u_boot_console + + build_for_migrate(cons, ['bootph-some-ram', 'u-boot,dm-pre-proper'], + 'sandbox', TMPDIR3, disable_migrate=False) + + # It should show a migration message + out = util.run_and_log( + cons, [os.path.join(TMPDIR3, 'u-boot'), '-D', '-c', 'help'], + ignore_errors=True) + assert "Warning: Device tree includes old 'u-boot,dm-' tags" in out diff --git a/test/py/tests/test_ofplatdata.py b/test/py/tests/test_ofplatdata.py index e9cce4daf4..51a188454f 100644 --- a/test/py/tests/test_ofplatdata.py +++ b/test/py/tests/test_ofplatdata.py @@ -13,10 +13,10 @@ def test_spl_devicetree(u_boot_console): fdtgrep = cons.config.build_dir + '/tools/fdtgrep' output = util.run_and_log(cons, [fdtgrep, '-l', dtb]) - assert "u-boot,dm-pre-reloc" not in output - assert "u-boot,dm-pre-proper" not in output - assert "u-boot,dm-spl" not in output - assert "u-boot,dm-tpl" not in output + assert "bootph-all" not in output + assert "bootph-some-ram" not in output + assert "bootph-pre-ram" not in output + assert "bootph-pre-sram" not in output assert "spl-test5" not in output assert "spl-test6" not in output diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py index c4fc23aeda..9e161fbc23 100644 --- a/test/py/u_boot_utils.py +++ b/test/py/u_boot_utils.py @@ -157,7 +157,7 @@ def wait_until_file_open_fails(fn, ignore_errors): return raise Exception('File can still be opened') -def run_and_log(u_boot_console, cmd, ignore_errors=False, stdin=None): +def run_and_log(u_boot_console, cmd, ignore_errors=False, stdin=None, env=None): """Run a command and log its output. Args: @@ -170,6 +170,7 @@ def run_and_log(u_boot_console, cmd, ignore_errors=False, stdin=None): an error code, otherwise an exception will be raised if such problems occur. stdin: Input string to pass to the command as stdin (or None) + env: Environment to use, or None to use the current one Returns: The output as a string. @@ -177,7 +178,7 @@ def run_and_log(u_boot_console, cmd, ignore_errors=False, stdin=None): if isinstance(cmd, str): cmd = cmd.split() runner = u_boot_console.log.get_runner(cmd[0], sys.stdout) - output = runner.run(cmd, ignore_errors=ignore_errors, stdin=stdin) + output = runner.run(cmd, ignore_errors=ignore_errors, stdin=stdin, env=env) runner.close() return output diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst index 03a99a19bc..2bcb7d3886 100644 --- a/tools/binman/binman.rst +++ b/tools/binman/binman.rst @@ -1122,8 +1122,7 @@ It is sometimes inconvenient to add a 'binman' node to the .dts file for each board. This can be done by using #include to bring in a common file. Another approach supported by the U-Boot build system is to automatically include a common header. You can then put the binman node (and anything else that is -specific to U-Boot, such as u-boot,dm-pre-reloc properies) in that header -file. +specific to U-Boot, such as bootph-all properies) in that header file. Binman will search for the following files in arch/<arch>/dts:: diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile index 33e2bd2add..fdcb0c7f3d 100644 --- a/tools/docker/Dockerfile +++ b/tools/docker/Dockerfile @@ -186,6 +186,27 @@ RUN git clone https://gitlab.com/qemu-project/qemu.git /tmp/qemu && \ make -j$(nproc) all install && \ rm -rf /tmp/qemu +# Build QEMU supporting Nokia n900 emulation +RUN mkdir -p /opt/nokia && \ + cd /tmp && \ + git clone https://git.linaro.org/qemu/qemu-linaro.git && \ + cd /tmp/qemu-linaro && \ + git checkout 8f8d8e0796efe1a6f34cdd83fb798f3c41217ec1 && \ + ./configure --enable-system --target-list=arm-softmmu \ + --python=/usr/bin/python2.7 --disable-sdl --disable-gtk \ + --disable-curses --audio-drv-list= --audio-card-list= \ + --disable-werror --disable-xen --disable-xen-pci-passthrough \ + --disable-brlapi --disable-vnc --disable-curl --disable-slirp \ + --disable-kvm --disable-user --disable-linux-user --disable-bsd-user \ + --disable-guest-base --disable-uuid --disable-vde --disable-linux-aio \ + --disable-cap-ng --disable-attr --disable-blobs --disable-docs \ + --disable-spice --disable-libiscsi --disable-smartcard-nss \ + --disable-usb-redir --disable-guest-agent --disable-seccomp \ + --disable-glusterfs --disable-nptl --disable-fdt && \ + make -j$(nproc) && \ + cp /tmp/qemu-linaro/arm-softmmu/qemu-system-arm /opt/nokia && \ + rm -rf /tmp/qemu-linaro + # Build genimage (required by some targets to generate disk images) RUN wget -O - https://github.com/pengutronix/genimage/releases/download/v14/genimage-14.tar.xz | tar -C /tmp -xJ && \ cd /tmp/genimage-14 && \ @@ -229,6 +250,16 @@ RUN mkdir /tmp/trace && \ sudo make install && \ rm -rf /tmp/trace +# Files to run Nokia RX-51 (aka N900) tests +RUN mkdir -p /opt/nokia && \ + cd /opt/nokia && \ + wget https://raw.githubusercontent.com/pali/u-boot-maemo/master/debian/u-boot-gen-combined && \ + chmod 0755 u-boot-gen-combined && \ + wget http://repository.maemo.org/qemu-n900/qemu-n900.tar.gz && \ + wget http://repository.maemo.org/pool/maemo5.0/free/k/kernel/kernel_2.6.28-20103103+0m5_armel.deb && \ + wget http://repository.maemo.org/pool/maemo5.0/free/g/glibc/libc6_2.5.1-1eglibc27+0m5_armel.deb && \ + wget http://repository.maemo.org/pool/maemo5.0/free/b/busybox/busybox_1.10.2.legal-1osso30+0m5_armel.deb + # Create our user/group RUN echo uboot ALL=NOPASSWD: ALL > /etc/sudoers.d/uboot RUN useradd -m -U uboot diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py index a69a7889ce..39f416cfd8 100644 --- a/tools/dtoc/dtb_platdata.py +++ b/tools/dtoc/dtb_platdata.py @@ -35,9 +35,9 @@ PROP_IGNORE_LIST = [ 'linux,phandle', "status", 'phandle', - 'u-boot,dm-pre-reloc', - 'u-boot,dm-tpl', - 'u-boot,dm-spl', + 'bootph-all', + 'bootph-pre-sram', + 'bootph-pre-ram', ] # C type declarations for the types we support @@ -442,7 +442,7 @@ class DtbPlatdata(): """ parent = node.parent if parent and not parent.props: - raise ValueError("Parent node '%s' has no properties - do you need u-boot,dm-spl or similar?" % + raise ValueError("Parent node '%s' has no properties - do you need bootph-pre-ram or similar?" % parent.path) num_addr, num_size = 2, 2 if parent: @@ -754,7 +754,7 @@ class DtbPlatdata(): # This might indicate that the parent node is not in the # SPL/TPL devicetree but the child is. For example if we are # dealing with of-platdata in TPL, the parent has a - # u-boot,dm-tpl tag but the child has u-boot,dm-pre-reloc. In + # bootph-pre-sram tag but the child has bootph-all. In # this case the child node exists in TPL but the parent does # not. raise ValueError("Node '%s' requires parent node '%s' but it is not in the valid list" % diff --git a/tools/dtoc/test/dtoc_test_add_prop.dts b/tools/dtoc/test/dtoc_test_add_prop.dts index fa296e5552..8225de36d2 100644 --- a/tools/dtoc/test/dtoc_test_add_prop.dts +++ b/tools/dtoc/test/dtoc_test_add_prop.dts @@ -11,13 +11,13 @@ #address-cells = <1>; #size-cells = <1>; spl-test { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; intval = <1>; }; spl-test2 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; intarray = <5>; }; diff --git a/tools/dtoc/test/dtoc_test_addr32.dts b/tools/dtoc/test/dtoc_test_addr32.dts index 239045497c..3e7dc56729 100644 --- a/tools/dtoc/test/dtoc_test_addr32.dts +++ b/tools/dtoc/test/dtoc_test_addr32.dts @@ -12,13 +12,13 @@ #size-cells = <1>; test1 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "test1"; reg = <0x1234 0x5678>; }; test2 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "test2"; reg = <0x12345678 0x98765432 2 3>; }; diff --git a/tools/dtoc/test/dtoc_test_addr32_64.dts b/tools/dtoc/test/dtoc_test_addr32_64.dts index 7599d5b0a5..7ce16feef1 100644 --- a/tools/dtoc/test/dtoc_test_addr32_64.dts +++ b/tools/dtoc/test/dtoc_test_addr32_64.dts @@ -12,19 +12,19 @@ #size-cells = <2>; test1 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "test1"; reg = <0x1234 0x5678 0x0>; }; test2 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "test2"; reg = <0x12345678 0x98765432 0x10987654>; }; test3 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "test3"; reg = <0x12345678 0x98765432 0x10987654 2 0 3>; }; diff --git a/tools/dtoc/test/dtoc_test_addr64.dts b/tools/dtoc/test/dtoc_test_addr64.dts index 263d251386..5f8c23f04b 100644 --- a/tools/dtoc/test/dtoc_test_addr64.dts +++ b/tools/dtoc/test/dtoc_test_addr64.dts @@ -12,19 +12,19 @@ #size-cells = <2>; test1 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "test1"; reg = /bits/ 64 <0x1234 0x5678>; }; test2 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "test2"; reg = /bits/ 64 <0x1234567890123456 0x9876543210987654>; }; test3 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "test3"; reg = /bits/ 64 <0x1234567890123456 0x9876543210987654 2 3>; }; diff --git a/tools/dtoc/test/dtoc_test_addr64_32.dts b/tools/dtoc/test/dtoc_test_addr64_32.dts index 85e4f5fdae..bfbfd87b8d 100644 --- a/tools/dtoc/test/dtoc_test_addr64_32.dts +++ b/tools/dtoc/test/dtoc_test_addr64_32.dts @@ -12,19 +12,19 @@ #size-cells = <1>; test1 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "test1"; reg = <0x1234 0x0 0x5678>; }; test2 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "test2"; reg = <0x12345678 0x90123456 0x98765432>; }; test3 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "test3"; reg = <0x12345678 0x90123456 0x98765432 0 2 3>; }; diff --git a/tools/dtoc/test/dtoc_test_alias_bad.dts b/tools/dtoc/test/dtoc_test_alias_bad.dts index d4f502ad0a..69761f9114 100644 --- a/tools/dtoc/test/dtoc_test_alias_bad.dts +++ b/tools/dtoc/test/dtoc_test_alias_bad.dts @@ -18,20 +18,20 @@ }; spl-test { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; boolval; intval = <1>; }; i2c: i2c { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,i2c"; intval = <3>; }; spl-test3 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; stringarray = "one"; longbytearray = [09 0a 0b 0c 0d 0e 0f 10]; diff --git a/tools/dtoc/test/dtoc_test_alias_bad_path.dts b/tools/dtoc/test/dtoc_test_alias_bad_path.dts index 0beca4f0d0..6f566fe4ab 100644 --- a/tools/dtoc/test/dtoc_test_alias_bad_path.dts +++ b/tools/dtoc/test/dtoc_test_alias_bad_path.dts @@ -18,20 +18,20 @@ }; spl-test { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; boolval; intval = <1>; }; i2c: i2c { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,i2c"; intval = <3>; }; spl-test3 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; stringarray = "one"; longbytearray = [09 0a 0b 0c 0d 0e 0f 10]; diff --git a/tools/dtoc/test/dtoc_test_alias_bad_uc.dts b/tools/dtoc/test/dtoc_test_alias_bad_uc.dts index ae64f5b3b2..5d23c63a63 100644 --- a/tools/dtoc/test/dtoc_test_alias_bad_uc.dts +++ b/tools/dtoc/test/dtoc_test_alias_bad_uc.dts @@ -18,20 +18,20 @@ }; spl-test { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; boolval; intval = <1>; }; i2c: i2c { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,i2c"; intval = <3>; }; spl-test3 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; stringarray = "one"; longbytearray = [09 0a 0b 0c 0d 0e 0f 10]; diff --git a/tools/dtoc/test/dtoc_test_aliases.dts b/tools/dtoc/test/dtoc_test_aliases.dts index ae33716863..018b834046 100644 --- a/tools/dtoc/test/dtoc_test_aliases.dts +++ b/tools/dtoc/test/dtoc_test_aliases.dts @@ -9,13 +9,13 @@ / { spl-test { - u-boot,dm-pre-reloc; + bootph-all; compatible = "compat1", "compat2.1-fred", "compat3"; intval = <1>; }; spl-test2 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "compat1", "simple_bus"; intval = <1>; }; diff --git a/tools/dtoc/test/dtoc_test_driver_alias.dts b/tools/dtoc/test/dtoc_test_driver_alias.dts index da7973b2e5..22369a4406 100644 --- a/tools/dtoc/test/dtoc_test_driver_alias.dts +++ b/tools/dtoc/test/dtoc_test_driver_alias.dts @@ -9,7 +9,7 @@ / { gpio_a: gpios@0 { - u-boot,dm-pre-reloc; + bootph-all; gpio-controller; compatible = "sandbox_gpio_alias"; #gpio-cells = <1>; diff --git a/tools/dtoc/test/dtoc_test_inst.dts b/tools/dtoc/test/dtoc_test_inst.dts index b8177fcef5..9689be391b 100644 --- a/tools/dtoc/test/dtoc_test_inst.dts +++ b/tools/dtoc/test/dtoc_test_inst.dts @@ -18,20 +18,20 @@ }; spl-test { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; boolval; intval = <1>; }; i2c: i2c { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,i2c"; intval = <3>; }; spl-test3 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; stringarray = "one"; longbytearray = [09 0a 0b 0c 0d 0e 0f 10]; diff --git a/tools/dtoc/test/dtoc_test_invalid_driver.dts b/tools/dtoc/test/dtoc_test_invalid_driver.dts index 914ac3e899..042a325913 100644 --- a/tools/dtoc/test/dtoc_test_invalid_driver.dts +++ b/tools/dtoc/test/dtoc_test_invalid_driver.dts @@ -9,7 +9,7 @@ / { spl-test { - u-boot,dm-pre-reloc; + bootph-all; compatible = "invalid"; }; }; diff --git a/tools/dtoc/test/dtoc_test_noparent.dts b/tools/dtoc/test/dtoc_test_noparent.dts index e976dd2b8a..0efb17e0cb 100644 --- a/tools/dtoc/test/dtoc_test_noparent.dts +++ b/tools/dtoc/test/dtoc_test_noparent.dts @@ -12,18 +12,18 @@ #size-cells = <1>; i2c@0 { compatible = "sandbox,i2c"; - u-boot,dm-tpl; + bootph-pre-sram; #address-cells = <1>; #size-cells = <0>; spl-test { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; pmic@9 { compatible = "sandbox,pmic"; - u-boot,dm-pre-reloc; + bootph-all; reg = <9>; low-power; }; diff --git a/tools/dtoc/test/dtoc_test_noprops.dts b/tools/dtoc/test/dtoc_test_noprops.dts index e6fdd11b83..75296beb31 100644 --- a/tools/dtoc/test/dtoc_test_noprops.dts +++ b/tools/dtoc/test/dtoc_test_noprops.dts @@ -13,7 +13,7 @@ i2c@0 { pmic@9 { compatible = "sandbox,pmic"; - u-boot,dm-pre-reloc; + bootph-all; reg = <9>; low-power; }; diff --git a/tools/dtoc/test/dtoc_test_phandle.dts b/tools/dtoc/test/dtoc_test_phandle.dts index d9aa433503..74a146b9a3 100644 --- a/tools/dtoc/test/dtoc_test_phandle.dts +++ b/tools/dtoc/test/dtoc_test_phandle.dts @@ -9,34 +9,34 @@ / { phandle: phandle-target { - u-boot,dm-pre-reloc; + bootph-all; compatible = "target"; intval = <0>; #clock-cells = <0>; }; phandle_1: phandle2-target { - u-boot,dm-pre-reloc; + bootph-all; compatible = "target"; intval = <1>; #clock-cells = <1>; }; phandle_2: phandle3-target { - u-boot,dm-pre-reloc; + bootph-all; compatible = "target"; intval = <2>; #clock-cells = <2>; }; phandle-source { - u-boot,dm-pre-reloc; + bootph-all; compatible = "source"; clocks = <&phandle &phandle_1 11 &phandle_2 12 13 &phandle>; phandle-name-offset = <&phandle_2>, "fred", <123>; }; phandle-source2 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "source"; clocks = <&phandle>; }; diff --git a/tools/dtoc/test/dtoc_test_phandle_bad.dts b/tools/dtoc/test/dtoc_test_phandle_bad.dts index a3ddc59585..94cfada95b 100644 --- a/tools/dtoc/test/dtoc_test_phandle_bad.dts +++ b/tools/dtoc/test/dtoc_test_phandle_bad.dts @@ -9,7 +9,7 @@ / { phandle-source { - u-boot,dm-pre-reloc; + bootph-all; compatible = "source"; clocks = <20>; /* Invalid phandle */ }; diff --git a/tools/dtoc/test/dtoc_test_phandle_bad2.dts b/tools/dtoc/test/dtoc_test_phandle_bad2.dts index fe25f565fb..4d24b96ce6 100644 --- a/tools/dtoc/test/dtoc_test_phandle_bad2.dts +++ b/tools/dtoc/test/dtoc_test_phandle_bad2.dts @@ -9,13 +9,13 @@ / { phandle: phandle-target { - u-boot,dm-pre-reloc; + bootph-all; compatible = "target"; intval = <0>; }; phandle-source2 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "source"; clocks = <&phandle>; }; diff --git a/tools/dtoc/test/dtoc_test_phandle_cd_gpios.dts b/tools/dtoc/test/dtoc_test_phandle_cd_gpios.dts index 241743e73e..6ad8006266 100644 --- a/tools/dtoc/test/dtoc_test_phandle_cd_gpios.dts +++ b/tools/dtoc/test/dtoc_test_phandle_cd_gpios.dts @@ -9,33 +9,33 @@ / { phandle: phandle-target { - u-boot,dm-pre-reloc; + bootph-all; compatible = "target"; intval = <0>; #gpio-cells = <0>; }; phandle_1: phandle2-target { - u-boot,dm-pre-reloc; + bootph-all; compatible = "target"; intval = <1>; #gpio-cells = <1>; }; phandle_2: phandle3-target { - u-boot,dm-pre-reloc; + bootph-all; compatible = "target"; intval = <2>; #gpio-cells = <2>; }; phandle-source { - u-boot,dm-pre-reloc; + bootph-all; compatible = "source"; cd-gpios = <&phandle &phandle_1 11 &phandle_2 12 13 &phandle>; }; phandle-source2 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "source"; cd-gpios = <&phandle>; }; diff --git a/tools/dtoc/test/dtoc_test_phandle_reorder.dts b/tools/dtoc/test/dtoc_test_phandle_reorder.dts index aa71d56f27..573a4f6396 100644 --- a/tools/dtoc/test/dtoc_test_phandle_reorder.dts +++ b/tools/dtoc/test/dtoc_test_phandle_reorder.dts @@ -10,13 +10,13 @@ / { phandle-source2 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "source"; clocks = <&phandle>; }; phandle: phandle-target { - u-boot,dm-pre-reloc; + bootph-all; compatible = "target"; #clock-cells = <0>; }; diff --git a/tools/dtoc/test/dtoc_test_phandle_single.dts b/tools/dtoc/test/dtoc_test_phandle_single.dts index aacd0b15fa..1b1763932c 100644 --- a/tools/dtoc/test/dtoc_test_phandle_single.dts +++ b/tools/dtoc/test/dtoc_test_phandle_single.dts @@ -9,14 +9,14 @@ / { phandle: phandle-target { - u-boot,dm-pre-reloc; + bootph-all; compatible = "target"; intval = <0>; #clock-cells = <0>; }; phandle-source2 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "source"; clocks = <&phandle>; }; diff --git a/tools/dtoc/test/dtoc_test_simple.dts b/tools/dtoc/test/dtoc_test_simple.dts index aef07efeae..08f667ee5a 100644 --- a/tools/dtoc/test/dtoc_test_simple.dts +++ b/tools/dtoc/test/dtoc_test_simple.dts @@ -11,7 +11,7 @@ #address-cells = <1>; #size-cells = <1>; spl-test { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; boolval; maybe-empty-int = <>; @@ -27,7 +27,7 @@ }; spl-test2 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; intval = <3>; intarray = <5>; @@ -40,7 +40,7 @@ }; spl-test3 { - u-boot,dm-pre-reloc; + bootph-all; compatible = "sandbox,spl-test"; stringarray = "one"; longbytearray = [09 0a 0b 0c 0d 0e 0f 10]; @@ -49,12 +49,12 @@ i2c@0 { compatible = "sandbox,i2c"; - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <0>; pmic@9 { compatible = "sandbox,pmic"; - u-boot,dm-pre-reloc; + bootph-all; reg = <9>; low-power; }; diff --git a/tools/dtoc/test/dtoc_test_single_reg.dts b/tools/dtoc/test/dtoc_test_single_reg.dts index 804b67855b..035937cfbf 100644 --- a/tools/dtoc/test/dtoc_test_single_reg.dts +++ b/tools/dtoc/test/dtoc_test_single_reg.dts @@ -13,12 +13,12 @@ i2c@0 { compatible = "sandbox,i2c"; - u-boot,dm-pre-reloc; + bootph-all; #address-cells = <1>; #size-cells = <0>; pmic@9 { compatible = "sandbox,pmic"; - u-boot,dm-pre-reloc; + bootph-all; reg = <9>; low-power; diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py index 3b8ee00d4e..dffa86fc19 100755 --- a/tools/dtoc/test_fdt.py +++ b/tools/dtoc/test_fdt.py @@ -132,10 +132,10 @@ class TestFdt(unittest.TestCase): """Tests obtaining a list of properties""" node = self.dtb.GetNode('/spl-test') props = self.dtb.GetProps(node) - self.assertEqual(['boolval', 'bytearray', 'byteval', 'compatible', - 'int64val', 'intarray', 'intval', 'longbytearray', - 'maybe-empty-int', 'notstring', 'stringarray', - 'stringval', 'u-boot,dm-pre-reloc'], + self.assertEqual(['boolval', 'bootph-all', 'bytearray', 'byteval', + 'compatible', 'int64val', 'intarray', 'intval', + 'longbytearray', 'maybe-empty-int', 'notstring', + 'stringarray', 'stringval', ], sorted(props.keys())) def test_check_error(self): diff --git a/tools/patman/test_checkpatch.py b/tools/patman/test_checkpatch.py index 4c2ab6e590..a8bb364e42 100644 --- a/tools/patman/test_checkpatch.py +++ b/tools/patman/test_checkpatch.py @@ -452,6 +452,12 @@ index 0000000..2234c87 self.check_strl("cat"); self.check_strl("cpy"); + def test_schema(self): + """Check for uses of strn(cat|cpy)""" + pm = PatchMaker() + pm.add_line('arch/sandbox/dts/sandbox.dtsi', '\tu-boot,dm-pre-proper;') + self.check_single_message(pm, 'PRE_SCHEMA', 'error') + if __name__ == "__main__": unittest.main() gitutil.RunTests() |