diff options
52 files changed, 880 insertions, 278 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index b549f3c8b8..a88aecc5bd 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -829,6 +829,7 @@ dtb-$(CONFIG_MX6UL) += \ dtb-$(CONFIG_MX6ULL) += \ imx6ull-14x14-evk.dtb \ imx6ull-colibri.dtb \ + imx6ull-colibri-emmc.dtb \ imx6ull-myir-mys-6ulx-eval.dtb \ imx6ull-seeed-npi-imx6ull-dev-board.dtb \ imx6ull-phytec-segin-ff-rdk-emmc.dtb \ diff --git a/arch/arm/dts/imx6ull-colibri-emmc.dts b/arch/arm/dts/imx6ull-colibri-emmc.dts new file mode 100644 index 0000000000..cbb561ffb4 --- /dev/null +++ b/arch/arm/dts/imx6ull-colibri-emmc.dts @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2021 Toradex AG + */ + +#include "imx6ull-colibri.dtsi" +#include "imx6ull-colibri-u-boot.dtsi" + +/ { + model = "Toradex Colibri iMX6ULL 1GB (eMMC)"; + compatible = "toradex,colibri-imx6ull-emmc", "toradex,colibri-imx6ull", "fsl,imx6ull"; + + aliases { + mmc0 = &usdhc2; + mmc1 = &usdhc1; + }; +}; + +/* eMMC */ +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2emmc>; + assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>; + assigned-clock-rates = <0>, <198000000>; + bus-width = <8>; + keep-power-in-suspend; + no-1-8-v; + non-removable; + vmmc-supply = <®_module_3v3>; + status = "okay"; +}; + +&iomuxc { + pinctrl_usdhc2emmc: usdhc2emmcgrp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; +}; diff --git a/arch/arm/dts/imx6ull-colibri.dts b/arch/arm/dts/imx6ull-colibri.dts index 15338a1ae3..dbe3e0206e 100644 --- a/arch/arm/dts/imx6ull-colibri.dts +++ b/arch/arm/dts/imx6ull-colibri.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2018-2019 Toradex AG + * Copyright 2018-2021 Toradex AG */ #include "imx6ull-colibri.dtsi" @@ -10,3 +10,35 @@ model = "Toradex Colibri iMX6ULL"; compatible = "toradex,colibri-imx6ull", "fsl,imx6ull"; }; + +/* NAND */ +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + nand-on-flash-bbt; + nand-ecc-mode = "hw"; + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; + status = "okay"; +}; + +&iomuxc { + pinctrl_gpmi_nand: gpmi-nand-grp { + fsl,pins = < + MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9 + MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x100a9 + MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0x100a9 + MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0x100a9 + MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0x100a9 + MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0x100a9 + MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0x100a9 + MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0x100a9 + MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0x100a9 + MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0x100a9 + MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0x100a9 + MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0x100a9 + MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0x100a9 + MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x100a9 + >; + }; +}; diff --git a/arch/arm/dts/imx6ull-colibri.dtsi b/arch/arm/dts/imx6ull-colibri.dtsi index b7bf79f28c..1fa9d10412 100644 --- a/arch/arm/dts/imx6ull-colibri.dtsi +++ b/arch/arm/dts/imx6ull-colibri.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2019 Toradex AG + * Copyright 2019-2021 Toradex AG */ /dts-v1/; @@ -92,17 +92,6 @@ }; }; -/* NAND */ -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand>; - nand-on-flash-bbt; - nand-ecc-mode = "hw"; - nand-ecc-strength = <8>; - nand-ecc-step-size = <512>; - status = "okay"; -}; - /* * I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) */ @@ -340,25 +329,6 @@ >; }; - pinctrl_gpmi_nand: gpmi-nand-grp { - fsl,pins = < - MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9 - MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x100a9 - MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0x100a9 - MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0x100a9 - MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0x100a9 - MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0x100a9 - MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0x100a9 - MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0x100a9 - MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0x100a9 - MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0x100a9 - MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0x100a9 - MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0x100a9 - MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0x100a9 - MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x100a9 - >; - }; - pinctrl_i2c1: i2c1-grp { fsl,pins = < MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index f200afac9f..3c75415e8f 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -150,7 +150,9 @@ }; - flash { + spl { + filename = "spl.bin"; + mkimage { args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; @@ -217,4 +219,19 @@ }; }; }; + + imx-boot { + filename = "flash.bin"; + pad-byte = <0x00>; + + spl: blob-ext@1 { + offset = <0x0>; + filename = "spl.bin"; + }; + + uboot: blob-ext@2 { + offset = <0x57c00>; + filename = "u-boot.itb"; + }; + }; }; diff --git a/arch/arm/dts/imx8mm-verdin-u-boot.dtsi b/arch/arm/dts/imx8mm-verdin-u-boot.dtsi index 67c31c49b6..9fb4d8aa8c 100644 --- a/arch/arm/dts/imx8mm-verdin-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-verdin-u-boot.dtsi @@ -1,18 +1,37 @@ // SPDX-License-Identifier: GPL-2.0+ OR MIT /* - * Copyright 2020 Toradex + * Copyright 2020-2021 Toradex */ #include "imx8mm-u-boot.dtsi" / { + binman: binman { + multiple-images; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + wdt-reboot { compatible = "wdt-reboot"; - wdt = <&wdog1>; u-boot,dm-spl; + wdt = <&wdog1>; }; }; +&{/soc@0/bus@30800000/i2c@30a20000/pmic} { + u-boot,dm-spl; +}; + +&{/soc@0/bus@30800000/i2c@30a20000/pmic/regulators} { + u-boot,dm-spl; +}; + &gpio1 { u-boot,dm-spl; }; @@ -57,11 +76,7 @@ u-boot,dm-spl; }; -&{/soc@0/bus@30800000/i2c@30a20000/pmic} { - u-boot,dm-spl; -}; - -&{/soc@0/bus@30800000/i2c@30a20000/pmic/regulators} { +&pinctrl_wdog { u-boot,dm-spl; }; @@ -84,3 +99,121 @@ &wdog1 { u-boot,dm-spl; }; + +&binman { + u-boot-spl-ddr { + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + align-size = <4>; + align = <4>; + + u-boot-spl { + align-end = <4>; + }; + + blob_1: blob-ext@1 { + filename = "lpddr4_pmu_train_1d_imem.bin"; + size = <0x8000>; + }; + + blob_2: blob-ext@2 { + filename = "lpddr4_pmu_train_1d_dmem.bin"; + size = <0x4000>; + }; + + blob_3: blob-ext@3 { + filename = "lpddr4_pmu_train_2d_imem.bin"; + size = <0x8000>; + }; + + blob_4: blob-ext@4 { + filename = "lpddr4_pmu_train_2d_dmem.bin"; + size = <0x4000>; + }; + }; + + spl { + filename = "spl.bin"; + + mkimage { + args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; + + blob { + filename = "u-boot-spl-ddr.bin"; + }; + }; + }; + + itb { + filename = "u-boot.itb"; + + fit { + description = "Configuration to load ATF before U-Boot"; + #address-cells = <1>; + fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>; + + images { + uboot { + description = "U-Boot (64-bit)"; + type = "standalone"; + arch = "arm64"; + compression = "none"; + load = <CONFIG_SYS_TEXT_BASE>; + + uboot_blob: blob-ext { + filename = "u-boot-nodtb.bin"; + }; + }; + + atf { + description = "ARM Trusted Firmware"; + type = "firmware"; + arch = "arm64"; + compression = "none"; + load = <0x920000>; + entry = <0x920000>; + + atf_blob: blob-ext { + filename = "bl31.bin"; + }; + }; + + fdt { + description = "NAME"; + type = "flat_dt"; + compression = "none"; + + uboot_fdt_blob: blob-ext { + filename = "u-boot.dtb"; + }; + }; + }; + + configurations { + default = "conf"; + + conf { + description = "NAME"; + firmware = "uboot"; + loadables = "atf"; + fdt = "fdt"; + }; + }; + }; + }; + + imx-boot { + filename = "flash.bin"; + pad-byte = <0x00>; + + spl: blob-ext@1 { + offset = <0x0>; + filename = "spl.bin"; + }; + + uboot: blob-ext@2 { + offset = <0x5fc00>; + filename = "u-boot.itb"; + }; + }; +}; diff --git a/arch/arm/dts/imx8mm-verdin.dts b/arch/arm/dts/imx8mm-verdin.dts index ac2a4b69d3..a2331627d7 100644 --- a/arch/arm/dts/imx8mm-verdin.dts +++ b/arch/arm/dts/imx8mm-verdin.dts @@ -196,6 +196,18 @@ }; }; +&gpio5 { + ctrl_sleep_moci { + gpio-hog; + /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */ + gpios = <1 GPIO_ACTIVE_HIGH>; + line-name = "CTRL_SLEEP_MOCI#"; + output-high; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ctrl_sleep_moci>; + }; +}; + /* On-module I2C */ &i2c1 { clock-frequency = <400000>; @@ -548,6 +560,12 @@ >; }; + pinctrl_ctrl_sleep_moci: ctrlsleepmocigrp { + fsl,pins = < + MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x1c4 /* SODIMM 256 */ + >; + }; + pinctrl_dsi_bkl_en: dsi_bkl_en { fsl,pins = < MX8MM_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x1c4 /* SODIMM 21 */ diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 2abcf1f03d..ab849ebaac 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -111,6 +111,19 @@ u-boot,dm-spl; }; +&eqos { + compatible = "fsl,imx-eqos"; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + /delete-property/ assigned-clock-rates; +}; + +ðphy0 { + reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; + reset-delay-us = <15000>; + reset-post-delay-us = <100000>; +}; + &fec { phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; phy-reset-duration = <15>; diff --git a/arch/arm/dts/imx8mp-evk.dts b/arch/arm/dts/imx8mp-evk.dts index b10dce8767..f846d69dac 100644 --- a/arch/arm/dts/imx8mp-evk.dts +++ b/arch/arm/dts/imx8mp-evk.dts @@ -74,6 +74,26 @@ status = "okay"; }; +&eqos { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eqos>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + eee-broken-1000t; + }; + }; +}; + &flexcan2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan2>; @@ -160,6 +180,26 @@ }; &iomuxc { + pinctrl_eqos: eqosgrp { + fsl,pins = < + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3 + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3 + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91 + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91 + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91 + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91 + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91 + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91 + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x1f + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x1f + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x1f + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x1f + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f + MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x19 + >; + }; + pinctrl_fec: fecgrp { fsl,pins = < MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3 diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi index afb3995482..120c4c4dbb 100644 --- a/arch/arm/dts/imx8mp-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-u-boot.dtsi @@ -18,6 +18,9 @@ &clk { u-boot,dm-spl; u-boot,dm-pre-reloc; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + /delete-property/ assigned-clock-rates; }; &osc_32k { diff --git a/arch/arm/dts/phycore-imx8mm-u-boot.dtsi b/arch/arm/dts/phycore-imx8mm-u-boot.dtsi index 91515b8df9..f842e02c77 100644 --- a/arch/arm/dts/phycore-imx8mm-u-boot.dtsi +++ b/arch/arm/dts/phycore-imx8mm-u-boot.dtsi @@ -7,6 +7,10 @@ #include "imx8mm-u-boot.dtsi" / { + binman: binman { + multiple-images; + }; + wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; @@ -30,6 +34,10 @@ u-boot,dm-spl; }; +&pinctrl_wdog { + u-boot,dm-spl; +}; + &gpio1 { u-boot,dm-spl; }; @@ -65,3 +73,121 @@ &wdog1 { u-boot,dm-spl; }; + +&binman { + u-boot-spl-ddr { + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + align-size = <4>; + align = <4>; + + u-boot-spl { + align-end = <4>; + }; + + blob_1: blob-ext@1 { + filename = "lpddr4_pmu_train_1d_imem.bin"; + size = <0x8000>; + }; + + blob_2: blob-ext@2 { + filename = "lpddr4_pmu_train_1d_dmem.bin"; + size = <0x4000>; + }; + + blob_3: blob-ext@3 { + filename = "lpddr4_pmu_train_2d_imem.bin"; + size = <0x8000>; + }; + + blob_4: blob-ext@4 { + filename = "lpddr4_pmu_train_2d_dmem.bin"; + size = <0x4000>; + }; + }; + + spl { + filename = "spl.bin"; + + mkimage { + args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; + + blob { + filename = "u-boot-spl-ddr.bin"; + }; + }; + }; + + itb { + filename = "u-boot.itb"; + + fit { + description = "Configuration to load ATF before U-Boot"; + #address-cells = <1>; + fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>; + + images { + uboot { + description = "U-Boot (64-bit)"; + type = "standalone"; + arch = "arm64"; + compression = "none"; + load = <CONFIG_SYS_TEXT_BASE>; + + uboot_blob: blob-ext { + filename = "u-boot-nodtb.bin"; + }; + }; + + atf { + description = "ARM Trusted Firmware"; + type = "firmware"; + arch = "arm64"; + compression = "none"; + load = <0x920000>; + entry = <0x920000>; + + atf_blob: blob-ext { + filename = "bl31.bin"; + }; + }; + + fdt { + description = "NAME"; + type = "flat_dt"; + compression = "none"; + + uboot_fdt_blob: blob-ext { + filename = "u-boot.dtb"; + }; + }; + }; + + configurations { + default = "conf"; + + conf { + description = "NAME"; + firmware = "uboot"; + loadables = "atf"; + fdt = "fdt"; + }; + }; + }; + }; + + imx-boot { + filename = "flash.bin"; + pad-byte = <0x00>; + + spl: blob-ext@1 { + filename = "spl.bin"; + offset = <0x0>; + }; + + uboot: blob-ext@2 { + filename = "u-boot.itb"; + offset = <0x57c00>; + }; + }; +}; diff --git a/arch/arm/dts/phycore-imx8mm.dts b/arch/arm/dts/phycore-imx8mm.dts index c46d3c72ce..e57dfd368d 100644 --- a/arch/arm/dts/phycore-imx8mm.dts +++ b/arch/arm/dts/phycore-imx8mm.dts @@ -14,7 +14,7 @@ compatible = "phytec,imx8mm-phycore-som", "fsl,imx8mm"; chosen { - stdout-patch = &uart3; + stdout-path = &uart3; }; reg_usdhc2_vmmc: regulator-usdhc2 { @@ -54,6 +54,23 @@ }; }; +/* SPI nor flash */ +&flexspi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexspi0>; + status = "okay"; + + flash0: norflash@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <80000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + /* i2c eeprom */ &i2c1 { clock-frequency = <400000>; @@ -140,6 +157,17 @@ >; }; + pinctrl_flexspi0: flexspi0grp { + fsl,pins = < + MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2 + MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82 + MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82 + MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82 + MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82 + MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index bfff79f88c..07954bc201 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_IMX_BOOTAUX) += imx_bootaux.o endif obj-$(CONFIG_ENV_IS_IN_MMC) += mmc_env.o obj-$(CONFIG_FEC_MXC) += mac.o +obj-$(CONFIG_DWC_ETH_QOS) += mac.o obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o obj-$(CONFIG_IMX_HAB) += hab.o obj-y += cpu.o diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index 41088a2dcd..276b8bd974 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -25,14 +25,14 @@ config SYS_SOC default "imx8m" choice - prompt "NXP i.MX8M board select" + prompt "NXP i.MX8M board select" optional config TARGET_IMX8MQ_CM - bool "Ronetix iMX8MQ-CM SoM" + bool "Ronetix iMX8MQ-CM SoM" select BINMAN - select IMX8MQ - select IMX8M_LPDDR4 + select IMX8MQ + select IMX8M_LPDDR4 config TARGET_IMX8MQ_EVK bool "imx8mq_evk" @@ -109,10 +109,11 @@ config TARGET_PICO_IMX8MQ select IMX8M_LPDDR4 config TARGET_VERDIN_IMX8MM - bool "Support Toradex Verdin iMX8M Mini module" - select IMX8MM - select SUPPORT_SPL - select IMX8M_LPDDR4 + bool "Support Toradex Verdin iMX8M Mini module" + select BINMAN + select IMX8MM + select SUPPORT_SPL + select IMX8M_LPDDR4 config TARGET_IMX8MM_BEACON bool "imx8mm Beacon Embedded devkit" @@ -128,15 +129,16 @@ config TARGET_IMX8MN_BEACON config TARGET_PHYCORE_IMX8MM bool "PHYTEC PHYCORE i.MX8MM" + select BINMAN select IMX8MM - select SUPPORT_SPL + select SUPPORT_SPL select IMX8M_LPDDR4 config TARGET_PHYCORE_IMX8MP bool "PHYTEC PHYCORE i.MX8MP" select BINMAN select IMX8MP - select SUPPORT_SPL + select SUPPORT_SPL select IMX8M_LPDDR4 config TARGET_IMX8MM_CL_IOT_GATE diff --git a/arch/arm/mach-imx/mac.c b/arch/arm/mach-imx/mac.c index 3b1496b203..9bb63d25b4 100644 --- a/arch/arm/mach-imx/mac.c +++ b/arch/arm/mach-imx/mac.c @@ -31,7 +31,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) offset = is_mx6() ? MAC_FUSE_MX6_OFFSET : MAC_FUSE_MX7_OFFSET; fuse = (struct imx_mac_fuse *)(ulong)(OCOTP_BASE_ADDR + offset); - has_second_mac = is_mx7() || is_mx6sx() || is_mx6ul() || is_mx6ull(); + has_second_mac = is_mx7() || is_mx6sx() || is_mx6ul() || is_mx6ull() || is_imx8mp(); if (has_second_mac && dev_id == 1) { u32 value = readl(&fuse->mac_addr2); diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c index 7f097d6850..c90ce22404 100644 --- a/arch/arm/mach-imx/mx7ulp/soc.c +++ b/arch/arm/mach-imx/mx7ulp/soc.c @@ -13,6 +13,7 @@ #include <asm/arch/sys_proto.h> #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/hab.h> +#include <asm/setup.h> #include <linux/bitops.h> #define PMC0_BASE_ADDR 0x410a1000 @@ -380,3 +381,25 @@ enum boot_device get_boot_device(void) return boot_dev; } + +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG +/* + * OCOTP_CFG (SJC CHALLENGE, Unique ID) + * i.MX 7ULP Applications Processor Reference Manual, Rev. 0, 09/2020 + * + * OCOTP_CFG0 offset 0x4B0: 15:0 -> 15:0 bits of Unique ID + * OCOTP_CFG1 offset 0x4C0: 15:0 -> 31:16 bits of Unique ID + * OCOTP_CFG2 offset 0x4D0: 15:0 -> 47:32 bits of Unique ID + * OCOTP_CFG3 offset 0x4E0: 15:0 -> 63:48 bits of Unique ID + */ +void get_board_serial(struct tag_serialnr *serialnr) +{ + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + struct fuse_bank *bank = &ocotp->bank[1]; + struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; + + serialnr->low = (fuse->cfg0 & 0xFFFF) + ((fuse->cfg1 & 0xFFFF) << 16); + serialnr->high = (fuse->cfg2 & 0xFFFF) + ((fuse->cfg3 & 0xFFFF) << 16); +} +#endif /* CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG */ diff --git a/board/ea/mx7ulp_com/mx7ulp_com.c b/board/ea/mx7ulp_com/mx7ulp_com.c index 5b2d444366..7fce75ade9 100644 --- a/board/ea/mx7ulp_com/mx7ulp_com.c +++ b/board/ea/mx7ulp_com/mx7ulp_com.c @@ -20,6 +20,10 @@ int dram_init(void) { gd->ram_size = imx_ddr_size(); +#ifdef CONFIG_OPTEE_TZDRAM_SIZE + gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE; +#endif + return 0; } diff --git a/board/freescale/imx8mm_evk/imximage-8mm-lpddr4.cfg b/board/freescale/imx8mm_evk/imximage-8mm-lpddr4.cfg index b89092a559..90573be5fd 100644 --- a/board/freescale/imx8mm_evk/imximage-8mm-lpddr4.cfg +++ b/board/freescale/imx8mm_evk/imximage-8mm-lpddr4.cfg @@ -6,4 +6,4 @@ #define __ASSEMBLY__ BOOT_FROM sd -LOADER mkimage.flash.mkimage 0x7E1000 +LOADER u-boot-spl-ddr.bin 0x7E1000 diff --git a/board/freescale/imx8mp_evk/imx8mp_evk.c b/board/freescale/imx8mp_evk/imx8mp_evk.c index 89cc17cbea..62096c24fb 100644 --- a/board/freescale/imx8mp_evk/imx8mp_evk.c +++ b/board/freescale/imx8mp_evk/imx8mp_evk.c @@ -54,30 +54,11 @@ static void setup_fec(void) setbits_le32(&gpr->gpr[1], BIT(22)); } -#define EQOS_RST_PAD IMX_GPIO_NR(4, 22) -static iomux_v3_cfg_t const eqos_rst_pads[] = { - MX8MP_PAD_SAI2_RXC__GPIO4_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static void setup_iomux_eqos(void) -{ - imx_iomux_v3_setup_multiple_pads(eqos_rst_pads, - ARRAY_SIZE(eqos_rst_pads)); - - gpio_request(EQOS_RST_PAD, "eqos_rst"); - gpio_direction_output(EQOS_RST_PAD, 0); - mdelay(15); - gpio_direction_output(EQOS_RST_PAD, 1); - mdelay(100); -} - static int setup_eqos(void) { struct iomuxc_gpr_base_regs *gpr = (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; - setup_iomux_eqos(); - /* set INTF as RGMII, enable RGMII TXC clock */ clrsetbits_le32(&gpr->gpr[1], IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16)); @@ -101,9 +82,10 @@ int board_init(void) if (CONFIG_IS_ENABLED(FEC_MXC)) { setup_fec(); + } - if (CONFIG_IS_ENABLED(DWC_ETH_QOS)) - ret = setup_eqos(); + if (CONFIG_IS_ENABLED(DWC_ETH_QOS)) { + ret = setup_eqos(); } return ret; diff --git a/board/phytec/phycore_imx8mm/Kconfig b/board/phytec/phycore_imx8mm/Kconfig index 9868e98487..25e4bf2f83 100644 --- a/board/phytec/phycore_imx8mm/Kconfig +++ b/board/phytec/phycore_imx8mm/Kconfig @@ -10,6 +10,6 @@ config SYS_CONFIG_NAME default "phycore_imx8mm" config IMX_CONFIG - default "arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" + default "board/phytec/phycore_imx8mm/imximage-8mm-sd.cfg" endif diff --git a/board/phytec/phycore_imx8mm/imximage-8mm-sd.cfg b/board/phytec/phycore_imx8mm/imximage-8mm-sd.cfg new file mode 100644 index 0000000000..ea74fb7e59 --- /dev/null +++ b/board/phytec/phycore_imx8mm/imximage-8mm-sd.cfg @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2021 Phytec Messtechnik GmbH + */ + +#define __ASSEMBLY__ + +BOOT_FROM sd +LOADER u-boot-spl-ddr.bin 0x7E1000 diff --git a/board/phytec/phycore_imx8mm/spl.c b/board/phytec/phycore_imx8mm/spl.c index 64f0780f6e..d54145ef99 100644 --- a/board/phytec/phycore_imx8mm/spl.c +++ b/board/phytec/phycore_imx8mm/spl.c @@ -12,8 +12,6 @@ #include <asm/global_data.h> #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/iomux-v3.h> -#include <dm/device.h> -#include <dm/uclass.h> #include <hang.h> #include <init.h> #include <log.h> @@ -39,7 +37,7 @@ int spl_board_boot_device(enum boot_device boot_dev_spl) } } -void spl_dram_init(void) +static void spl_dram_init(void) { ddr_init(&dram_timing); } @@ -54,15 +52,10 @@ void spl_board_init(void) puts("Normal Boot\n"); } -#ifdef CONFIG_SPL_LOAD_FIT int board_fit_config_name_match(const char *name) { - /* Just empty function now - can't decide what to choose */ - debug("%s: %s\n", __func__, name); - return 0; } -#endif #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE) @@ -91,7 +84,6 @@ int board_early_init_f(void) void board_init_f(ulong dummy) { - struct udevice *dev; int ret; arch_cpu_init(); @@ -100,8 +92,6 @@ void board_init_f(ulong dummy) board_early_init_f(); - timer_init(); - preloader_console_init(); /* Clear the BSS. */ @@ -113,13 +103,6 @@ void board_init_f(ulong dummy) hang(); } - ret = uclass_get_device_by_name(UCLASS_CLK, - "clock-controller@30380000", &dev); - if (ret < 0) { - printf("Failed to find clock node. Check device tree\n"); - hang(); - } - enable_tzc380(); /* DDR initialization */ diff --git a/board/toradex/apalis-imx8x/MAINTAINERS b/board/toradex/apalis-imx8x/MAINTAINERS index 5272154447..93d6cdd474 100644 --- a/board/toradex/apalis-imx8x/MAINTAINERS +++ b/board/toradex/apalis-imx8x/MAINTAINERS @@ -1,5 +1,5 @@ Apalis iMX8X -M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> +M: Marcel Ziswiler <marcel.ziswiler@toradex.com> W: http://developer.toradex.com/software/linux/linux-software S: Maintained F: arch/arm/dts/fsl-imx8x-apalis.dts diff --git a/board/toradex/apalis_imx6/MAINTAINERS b/board/toradex/apalis_imx6/MAINTAINERS index fde4d92dc3..2685457013 100644 --- a/board/toradex/apalis_imx6/MAINTAINERS +++ b/board/toradex/apalis_imx6/MAINTAINERS @@ -1,5 +1,5 @@ Apalis iMX6 -M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> +M: Marcel Ziswiler <marcel.ziswiler@toradex.com> W: http://developer.toradex.com/software/linux/linux-software W: https://www.toradex.com/community S: Maintained diff --git a/board/toradex/colibri-imx6ull/Kconfig b/board/toradex/colibri-imx6ull/Kconfig index e5e4af3364..9fbc30f6b3 100644 --- a/board/toradex/colibri-imx6ull/Kconfig +++ b/board/toradex/colibri-imx6ull/Kconfig @@ -1,5 +1,24 @@ if TARGET_COLIBRI_IMX6ULL +choice + prompt "Colibri iMX6ULL variant" + optional + +config TARGET_COLIBRI_IMX6ULL_NAND + bool "Support Colibri iMX6ULL 256MB / 512MB (raw NAND) modules" + imply NAND_MXS + help + Choose this option if you build for a Toradex Colibri iMX6ULL + 256MB or 512MB module which do have raw NAND on-module. + +config TARGET_COLIBRI_IMX6ULL_EMMC + bool "Support Colibri iMX6ULL 1GB (eMMC) modules" + help + Choose this option if you build for a Toradex Colibri iMX6ULL + 1GB module which does have eMMC on-module. + +endchoice + config SYS_BOARD default "colibri-imx6ull" @@ -7,11 +26,16 @@ config SYS_VENDOR default "toradex" config SYS_CONFIG_NAME - default "colibri-imx6ull" + default "colibri-imx6ull-tezi-recovery" if (!TARGET_COLIBRI_IMX6ULL_NAND && !TARGET_COLIBRI_IMX6ULL_EMMC) config TDX_CFG_BLOCK default y +if TARGET_COLIBRI_IMX6ULL_NAND + +config SYS_CONFIG_NAME + default "colibri-imx6ull" + config TDX_HAVE_NAND default y @@ -21,6 +45,28 @@ config TDX_CFG_BLOCK_OFFSET config TDX_CFG_BLOCK_OFFSET2 default "133120" +endif + +if TARGET_COLIBRI_IMX6ULL_EMMC + +config SYS_CONFIG_NAME + default "colibri-imx6ull" + +config TDX_HAVE_MMC + default y + +config TDX_CFG_BLOCK_DEV + default "0" + +config TDX_CFG_BLOCK_PART + default "1" + +# Toradex config block in eMMC, at the end of 1st "boot sector" +config TDX_CFG_BLOCK_OFFSET + default "-512" + +endif + config TDX_CFG_BLOCK_2ND_ETHADDR default y diff --git a/board/toradex/colibri-imx6ull/MAINTAINERS b/board/toradex/colibri-imx6ull/MAINTAINERS index 899b1ff555..500c787b8e 100644 --- a/board/toradex/colibri-imx6ull/MAINTAINERS +++ b/board/toradex/colibri-imx6ull/MAINTAINERS @@ -1,11 +1,13 @@ Colibri iMX6ULL -M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> +M: Marcel Ziswiler <marcel.ziswiler@toradex.com> W: http://developer.toradex.com/software/linux/linux-software W: https://www.toradex.com/community S: Maintained F: arch/arm/dts/imx6ull-colibri.dts -F: arch/arm/dts/imx6ull-colibri-u-boot.dtsi F: arch/arm/dts/imx6ull-colibri.dtsi +F: arch/arm/dts/imx6ull-colibri-emmc.dts +F: arch/arm/dts/imx6ull-colibri-u-boot.dtsi F: board/toradex/colibri-imx6ull/ F: configs/colibri-imx6ull_defconfig +F: configs/colibri-imx6ull-emmc_defconfig F: include/configs/colibri-imx6ull.h diff --git a/board/toradex/colibri-imx6ull/colibri-imx6ull.c b/board/toradex/colibri-imx6ull/colibri-imx6ull.c index 01f5561596..02ab5889b9 100644 --- a/board/toradex/colibri-imx6ull/colibri-imx6ull.c +++ b/board/toradex/colibri-imx6ull/colibri-imx6ull.c @@ -43,6 +43,14 @@ DECLARE_GLOBAL_DATA_PTR; #define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_PUS_22K_UP) +#define FLASH_DETECTION_CTRL (PAD_CTL_HYS | PAD_CTL_PUE) +#define FLASH_DET_GPIO IMX_GPIO_NR(4, 1) +static const iomux_v3_cfg_t flash_detection_pads[] = { + MX6_PAD_NAND_WE_B__GPIO4_IO01 | MUX_PAD_CTRL(FLASH_DETECTION_CTRL), +}; + +static bool is_emmc; + int dram_init(void) { gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); @@ -53,13 +61,14 @@ int dram_init(void) #ifdef CONFIG_NAND_MXS static void setup_gpmi_nand(void) { - setup_gpmi_io_clk((3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) | - (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET)); + setup_gpmi_io_clk((MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) | + MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) | + MXC_CCM_CS2CDR_ENFC_CLK_SEL(3))); } #endif /* CONFIG_NAND_MXS */ #ifdef CONFIG_DM_VIDEO -static iomux_v3_cfg_t const backlight_pads[] = { +static const iomux_v3_cfg_t backlight_pads[] = { /* Backlight On */ MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), /* Backlight PWM<A> (multiplexed pin) */ @@ -120,6 +129,16 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + /* + * Enable GPIO on NAND_WE_B/eMMC_RST with 100k pull-down. eMMC_RST + * is pulled high with 4.7k for eMMC devices. This allows to reliably + * detect eMMC/NAND flash + */ + imx_iomux_v3_setup_multiple_pads(flash_detection_pads, ARRAY_SIZE(flash_detection_pads)); + gpio_request(FLASH_DET_GPIO, "flash-detection-gpio"); + is_emmc = gpio_get_value(FLASH_DET_GPIO); + gpio_free(FLASH_DET_GPIO); + #ifdef CONFIG_FEC_MXC setup_fec(); #endif @@ -148,8 +167,15 @@ int board_late_init(void) * Wi-Fi/Bluetooth make sure we use the -wifi device tree. */ if (tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT_IT || - tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT) + tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT) { env_set("variant", "-wifi"); + } else { + if (is_emmc) + env_set("variant", "-emmc"); + } +#else + if (is_emmc) + env_set("variant", "-emmc"); #endif /* diff --git a/board/toradex/colibri-imx6ull/imximage.cfg b/board/toradex/colibri-imx6ull/imximage.cfg index 8d869d9f79..e162cff90f 100644 --- a/board/toradex/colibri-imx6ull/imximage.cfg +++ b/board/toradex/colibri-imx6ull/imximage.cfg @@ -83,16 +83,14 @@ DATA 4 0x021B08C0 0x00944009 DATA 4 0x021B08b8 0x00000800 DATA 4 0x021B0004 0x0002002D DATA 4 0x021B0008 0x1B333030 -DATA 4 0x021B000C 0x676B52F3 +DATA 4 0x021B000C 0x8B8F52F3 DATA 4 0x021B0010 0xB66D0B63 DATA 4 0x021B0014 0x01FF00DB DATA 4 0x021B0018 0x00201740 -DATA 4 0x021B001C 0x00008000 DATA 4 0x021B002C 0x000026D2 -DATA 4 0x021B0030 0x006B1023 -DATA 4 0x021B0040 0x0000004F -DATA 4 0x021B0000 0x84180000 -DATA 4 0x021B0890 0x00400000 +DATA 4 0x021B0030 0x008F1023 +DATA 4 0x021B0040 0x0000005F +DATA 4 0x021B0000 0x85180000 DATA 4 0x021B001C 0x02008032 DATA 4 0x021B001C 0x00008033 DATA 4 0x021B001C 0x00048031 @@ -100,7 +98,6 @@ DATA 4 0x021B001C 0x15208030 DATA 4 0x021B001C 0x04008040 DATA 4 0x021B0020 0x00000800 DATA 4 0x021B0818 0x00000227 -DATA 4 0x021B0004 0x0002552D +DATA 4 0x021B0004 0x0002556D DATA 4 0x021B0404 0x00011006 DATA 4 0x021B001C 0x00000000 - diff --git a/board/toradex/colibri_imx6/MAINTAINERS b/board/toradex/colibri_imx6/MAINTAINERS index 2cbf65433d..d2ed4147e9 100644 --- a/board/toradex/colibri_imx6/MAINTAINERS +++ b/board/toradex/colibri_imx6/MAINTAINERS @@ -1,5 +1,5 @@ Colibri iMX6 -M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> +M: Marcel Ziswiler <marcel.ziswiler@toradex.com> W: http://developer.toradex.com/software/linux/linux-software W: https://www.toradex.com/community S: Maintained diff --git a/board/toradex/colibri_imx7/MAINTAINERS b/board/toradex/colibri_imx7/MAINTAINERS index 3d7d010d8a..24bec3ef14 100644 --- a/board/toradex/colibri_imx7/MAINTAINERS +++ b/board/toradex/colibri_imx7/MAINTAINERS @@ -1,5 +1,5 @@ Colibri iMX7 -M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> +M: Marcel Ziswiler <marcel.ziswiler@toradex.com> W: http://developer.toradex.com/software/linux/linux-software W: https://www.toradex.com/community S: Maintained diff --git a/board/toradex/colibri_t20/MAINTAINERS b/board/toradex/colibri_t20/MAINTAINERS index 61fbd2c1e0..77c2fc39e6 100644 --- a/board/toradex/colibri_t20/MAINTAINERS +++ b/board/toradex/colibri_t20/MAINTAINERS @@ -1,5 +1,5 @@ COLIBRI_T20 -M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> +M: Marcel Ziswiler <marcel.ziswiler@toradex.com> S: Maintained F: board/toradex/colibri_t20/ F: include/configs/colibri_t20.h diff --git a/board/toradex/colibri_t30/MAINTAINERS b/board/toradex/colibri_t30/MAINTAINERS index ded9e28295..c2d6587ed0 100644 --- a/board/toradex/colibri_t30/MAINTAINERS +++ b/board/toradex/colibri_t30/MAINTAINERS @@ -1,5 +1,5 @@ Colibri T30 -M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> +M: Marcel Ziswiler <marcel.ziswiler@toradex.com> S: Maintained F: board/toradex/colibri_t30/ F: include/configs/colibri_t30.h diff --git a/board/toradex/colibri_vf/MAINTAINERS b/board/toradex/colibri_vf/MAINTAINERS index c6627654a2..9f18b9a39d 100644 --- a/board/toradex/colibri_vf/MAINTAINERS +++ b/board/toradex/colibri_vf/MAINTAINERS @@ -1,5 +1,5 @@ Colibri VFxx -M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> +M: Marcel Ziswiler <marcel.ziswiler@toradex.com> W: http://developer.toradex.com/software/linux/linux-software W: https://www.toradex.com/community S: Maintained diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index fe47cddad8..7cadd05c0a 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -145,6 +145,11 @@ const char * const toradex_modules[] = { [59] = "Verdin iMX8M Mini Quad 2GB IT", [60] = "Verdin iMX8M Mini DualLite 1GB WB IT", [61] = "Verdin iMX8M Plus Quad 2GB", + [62] = "Colibri iMX6ULL 1GB IT (eMMC)", + [63] = "Verdin iMX8M Plus Quad 4GB IT", + [64] = "Verdin iMX8M Plus Quad 2GB Wi-Fi / BT IT", + [65] = "Verdin iMX8M Plus QuadLite 1GB IT", + [66] = "Verdin iMX8M Plus Quad 8GB Wi-Fi / BT", }; const char * const toradex_carrier_boards[] = { @@ -368,7 +373,10 @@ static int get_cfgblock_interactive(void) if (cpu_is_pxa27x()) sprintf(message, "Is the module the 312 MHz version? [y/N] "); else - it = 'y'; + sprintf(message, "Is the module an IT version? [y/N] "); + + len = cli_readline(message); + it = console_buffer[0]; #if defined(CONFIG_TARGET_APALIS_IMX8) || \ defined(CONFIG_TARGET_APALIS_IMX8X) || \ @@ -412,7 +420,10 @@ static int get_cfgblock_interactive(void) if (wb == 'y' || wb == 'Y') tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT_IT; else - tdx_hw_tag.prodid = COLIBRI_IMX6ULL_IT; + if (gd->ram_size == 0x20000000) + tdx_hw_tag.prodid = COLIBRI_IMX6ULL_IT; + else + tdx_hw_tag.prodid = COLIBRI_IMX6ULL_IT_EMMC; } else { if (wb == 'y' || wb == 'Y') tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT; @@ -421,7 +432,10 @@ static int get_cfgblock_interactive(void) } #endif } else if (!strcmp("imx7d", soc)) - tdx_hw_tag.prodid = COLIBRI_IMX7D; + if (gd->ram_size == 0x20000000) + tdx_hw_tag.prodid = COLIBRI_IMX7D; + else + tdx_hw_tag.prodid = COLIBRI_IMX7D_EMMC; else if (!strcmp("imx7s", soc)) tdx_hw_tag.prodid = COLIBRI_IMX7S; else if (is_cpu_type(MXC_CPU_IMX8QM)) { @@ -471,11 +485,21 @@ static int get_cfgblock_interactive(void) tdx_hw_tag.prodid = VERDIN_IMX8MMQ_IT; } else if (is_cpu_type(MXC_CPU_IMX8MN)) { tdx_hw_tag.prodid = VERDIN_IMX8MNQ_WIFI_BT; + } else if (is_cpu_type(MXC_CPU_IMX8MPL)) { + tdx_hw_tag.prodid = VERDIN_IMX8MPQL_IT; } else if (is_cpu_type(MXC_CPU_IMX8MP)) { if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = VERDIN_IMX8MPQ_WIFI_BT_IT; + if (gd->ram_size == 0x80000000) + tdx_hw_tag.prodid = VERDIN_IMX8MPQ_2GB_WIFI_BT_IT; + else if (gd->ram_size == 0x200000000) + tdx_hw_tag.prodid = VERDIN_IMX8MPQ_8GB_WIFI_BT; + else + tdx_hw_tag.prodid = VERDIN_IMX8MPQ_WIFI_BT_IT; else - tdx_hw_tag.prodid = VERDIN_IMX8MPQ; + if (it == 'y' || it == 'Y') + tdx_hw_tag.prodid = VERDIN_IMX8MPQ_IT; + else + tdx_hw_tag.prodid = VERDIN_IMX8MPQ; } else if (!strcmp("tegra20", soc)) { if (it == 'y' || it == 'Y') if (gd->ram_size == 0x10000000) diff --git a/board/toradex/common/tdx-cfg-block.h b/board/toradex/common/tdx-cfg-block.h index 9debd5f046..ddcf699748 100644 --- a/board/toradex/common/tdx-cfg-block.h +++ b/board/toradex/common/tdx-cfg-block.h @@ -82,6 +82,11 @@ enum { VERDIN_IMX8MMQ_IT, VERDIN_IMX8MMDL_WIFI_BT_IT, /* 60 */ VERDIN_IMX8MPQ, + COLIBRI_IMX6ULL_IT_EMMC, + VERDIN_IMX8MPQ_IT, + VERDIN_IMX8MPQ_2GB_WIFI_BT_IT, + VERDIN_IMX8MPQL_IT, /* 65 */ + VERDIN_IMX8MPQ_8GB_WIFI_BT, }; enum { diff --git a/board/toradex/verdin-imx8mm/MAINTAINERS b/board/toradex/verdin-imx8mm/MAINTAINERS index 08c370178c..7965975d0b 100644 --- a/board/toradex/verdin-imx8mm/MAINTAINERS +++ b/board/toradex/verdin-imx8mm/MAINTAINERS @@ -1,5 +1,5 @@ Verdin iMX8M Mini -M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> +M: Marcel Ziswiler <marcel.ziswiler@toradex.com> W: https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-mini S: Maintained F: arch/arm/dts/imx8mm-verdin.dts diff --git a/board/toradex/verdin-imx8mm/imximage.cfg b/board/toradex/verdin-imx8mm/imximage.cfg index b8b25ff420..fcc92009f3 100644 --- a/board/toradex/verdin-imx8mm/imximage.cfg +++ b/board/toradex/verdin-imx8mm/imximage.cfg @@ -1,16 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2020 Toradex + * Copyright 2020-2021 Toradex */ #define __ASSEMBLY__ -FIT BOOT_FROM emmc_fastboot -LOADER spl/u-boot-spl-ddr.bin 0x7E1000 -SECOND_LOADER u-boot.itb 0x40200000 0x60000 - -DDR_FW lpddr4_pmu_train_1d_imem.bin -DDR_FW lpddr4_pmu_train_1d_dmem.bin -DDR_FW lpddr4_pmu_train_2d_imem.bin -DDR_FW lpddr4_pmu_train_2d_dmem.bin +LOADER u-boot-spl-ddr.bin 0x7e1000 diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c index 76f4a1e209..c51c99b515 100644 --- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c +++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2020 Toradex + * Copyright 2020-2021 Toradex */ #include <common.h> @@ -9,10 +9,11 @@ #include <asm/arch/sys_proto.h> #include <asm/global_data.h> #include <asm/io.h> +#include <hang.h> #include <i2c.h> +#include <micrel.h> #include <miiphy.h> #include <netdev.h> -#include <micrel.h> #include "../common/tdx-cfg-block.h" @@ -36,70 +37,6 @@ static int setup_fec(void) return 0; } - -int board_phy_config(struct phy_device *phydev) -{ - int tmp; - - switch (ksz9xx1_phy_get_id(phydev) & MII_KSZ9x31_SILICON_REV_MASK) { - case PHY_ID_KSZ9031: - /* - * The PHY adds 1.2ns for the RXC and 0ns for TXC clock by - * default. The MAC and the layout don't add a skew between - * clock and data. - * Add 0.3ns for the RXC path and 0.96 + 0.42 ns (1.38 ns) for - * the TXC path to get the required clock skews. - */ - /* control data pad skew - devaddr = 0x02, register = 0x04 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x0070); - /* rx data pad skew - devaddr = 0x02, register = 0x05 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x7777); - /* tx data pad skew - devaddr = 0x02, register = 0x06 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x0000); - /* gtx and rx clock pad skew - devaddr = 0x02,register = 0x08 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x03f4); - break; - case PHY_ID_KSZ9131: - default: - /* read rxc dll control - devaddr = 0x2, register = 0x4c */ - tmp = ksz9031_phy_extended_read(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC); - /* disable rxdll bypass (enable 2ns skew delay on RXC) */ - tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS; - /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4c */ - tmp = ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp); - /* read txc dll control - devaddr = 0x02, register = 0x4d */ - tmp = ksz9031_phy_extended_read(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC); - /* disable txdll bypass (enable 2ns skew delay on TXC) */ - tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS; - /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4d */ - tmp = ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp); - break; - } - - if (phydev->drv->config) - phydev->drv->config(phydev); - return 0; -} #endif int board_init(void) @@ -151,17 +88,13 @@ static void select_dt_from_module_version(void) switch (get_pcb_revision()) { case PCB_VERSION_1_0: - printf("Detected a V1.0 module\n"); - if (is_wifi) - strncpy(&variant[0], "wifi", sizeof(variant)); - else - strncpy(&variant[0], "nonwifi", sizeof(variant)); - break; + printf("Detected a V1.0 module which is no longer supported in this BSP version\n"); + hang(); default: if (is_wifi) - strncpy(&variant[0], "wifi-v1.1", sizeof(variant)); + strlcpy(&variant[0], "wifi", sizeof(variant)); else - strncpy(&variant[0], "nonwifi-v1.1", sizeof(variant)); + strlcpy(&variant[0], "nonwifi", sizeof(variant)); break; } diff --git a/configs/colibri-imx6ull-emmc_defconfig b/configs/colibri-imx6ull-emmc_defconfig new file mode 100644 index 0000000000..4b346a9879 --- /dev/null +++ b/configs/colibri-imx6ull-emmc_defconfig @@ -0,0 +1,88 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0xFFFFDE00 +CONFIG_MX6ULL=y +CONFIG_TARGET_COLIBRI_IMX6ULL=y +CONFIG_DM_GPIO=y +CONFIG_TARGET_COLIBRI_IMX6ULL_EMMC=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ull-colibri-emmc" +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_BOOTDELAY=1 +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb" +# CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_PROMPT="Colibri iMX6ULL # " +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_SDP=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_BMP=y +CONFIG_CMD_BOOTCOUNT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_REGULATOR=y +# CONFIG_ISO_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_PART=1 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_VERSION_VARIABLE=y +CONFIG_IP_DEFRAG=y +CONFIG_TFTP_BLOCKSIZE=16352 +CONFIG_TFTP_TSIZE=y +CONFIG_BOUNCE_BUFFER=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ENV=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index edb21c8772..d3cf72d98c 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -10,6 +10,7 @@ CONFIG_MX6ULL=y CONFIG_TARGET_COLIBRI_IMX6ULL=y CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_DM_GPIO=y +CONFIG_TARGET_COLIBRI_IMX6ULL_NAND=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-colibri" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y @@ -71,7 +72,6 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_SYS_NAND_USE_FLASH_BBT=y -CONFIG_NAND_MXS=y CONFIG_NAND_MXS_DT=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_MTD_UBI_FASTMAP=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 0abe137027..c507b5823c 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -73,9 +73,12 @@ CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_FSL_ESDHC_IMX=y CONFIG_PHY_REALTEK=y +CONFIG_PHYLIB=y CONFIG_DM_ETH=y +CONFIG_DM_ETH_PHY=y CONFIG_PHY_GIGE=y CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_IMX=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 91360b7d1a..c221398747 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -21,7 +21,7 @@ CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_BOARD_LATE_INIT=y @@ -29,6 +29,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " @@ -40,10 +41,12 @@ CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_SIZE=4096 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 +CONFIG_CMD_CLK=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_SF_TEST=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -78,6 +81,20 @@ CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_FSL_ESDHC_IMX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_BUS=3 +CONFIG_SF_DEFAULT_MODE=0x0 +CONFIG_SF_DEFAULT_SPEED=80000000 +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y CONFIG_PHY_TI_DP83867=y CONFIG_DM_ETH=y @@ -91,6 +108,9 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_MXC_UART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_NXP_FSPI=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 98799994ce..ed14ff3b11 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -23,10 +23,11 @@ CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set -CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-verdin-dev.dtb" +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="setenv fdtfile imx8mm-verdin-${variant}-${fdt_board}.dtb" CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -69,6 +70,7 @@ CONFIG_SPL_CLK_COMPOSITE_CCF=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_SPL_CLK_IMX8MM=y CONFIG_CLK_IMX8MM=y +CONFIG_GPIO_HOG=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_MISC=y diff --git a/doc/board/nxp/imx8mm_evk.rst b/doc/board/nxp/imx8mm_evk.rst index 7fd3d72564..b377c4de27 100644 --- a/doc/board/nxp/imx8mm_evk.rst +++ b/doc/board/nxp/imx8mm_evk.rst @@ -50,7 +50,6 @@ Burn the flash.bin to MicroSD card offset 33KB: .. code-block:: bash $sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=notrunc - $sudo dd if=u-boot.itb of=/dev/sdc bs=1024 seek=384 conv=sync Boot ---- diff --git a/doc/board/nxp/psb.rst b/doc/board/nxp/psb.rst index 71ac09fac8..2eccdcfccd 100644 --- a/doc/board/nxp/psb.rst +++ b/doc/board/nxp/psb.rst @@ -75,13 +75,15 @@ offset 0x1 means 512 Bytes from the start of SD/eMMC card data partition). For details on the addition of two numbers in recommended B-copy offset, see SIT format below. -+----------+--------------------+-----------------------+-----------------------------+ -| SoC | SIT offset (fixed) | A-copy offset (fixed) | B-copy offset (recommended) | -+----------+--------------------+-----------------------+-----------------------------+ -| iMX7D | 0x1 | 0x2 | 0x800+0x2 | -+----------+--------------------+-----------------------+-----------------------------+ -| iMX8MM | 0x41 | 0x42 | 0x1000+0x42 | -+----------+--------------------+-----------------------+-----------------------------+ ++----------+-----------------------------+--------------------+-----------------------+-----------------------------+ +| SoC | Boot Device Type | SIT offset (fixed) | A-copy offset (fixed) | B-copy offset (recommended) | ++----------+-----------------------------+--------------------+-----------------------+-----------------------------+ +| iMX7D | | 0x1 | 0x2 | 0x800+0x2 | ++----------+-----------------------------+--------------------+-----------------------+-----------------------------+ +| iMX8MM | SD/eSD/MMC/eMMC normal boot | 0x41 | 0x42 | 0x1000+0x42 | ++----------+-----------------------------+--------------------+-----------------------+-----------------------------+ +| iMX8MM | eMMC Fast boot fuse blown | 0x1 | 0x2 | 0x1000+0x2 | ++----------+-----------------------------+--------------------+-----------------------+-----------------------------+ SIT format ~~~~~~~~~~ @@ -159,7 +161,7 @@ WARM reset into B-copy using WDT ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ To perform a reboot into B-copy, the PERSIST_SECONDARY_BOOT must be set -in SRC_GPR0 register. Example on iMX8MM:: +in SRC_GPR10 register. Example on iMX8MM:: => mw 0x30390098 0x40000000 diff --git a/doc/board/toradex/verdin-imx8mm.rst b/doc/board/toradex/verdin-imx8mm.rst index b9f7dc39c9..a11c82da2f 100644 --- a/doc/board/toradex/verdin-imx8mm.rst +++ b/doc/board/toradex/verdin-imx8mm.rst @@ -34,10 +34,10 @@ Get the DDR Firmware .. code-block:: bash $ cd .. - $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.4.1.bin - $ chmod +x firmware-imx-8.4.1.bin - $ ./firmware-imx-8.4.1.bin - $ cp firmware-imx-8.4.1/firmware/ddr/synopsys/lpddr4*.bin ./ + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.10.1.bin + $ chmod +x firmware-imx-8.10.1.bin + $ ./firmware-imx-8.10.1.bin + $ cp firmware-imx-8.10.1/firmware/ddr/synopsys/lpddr4*.bin ./ Build U-Boot ------------ @@ -46,7 +46,7 @@ Build U-Boot $ export CROSS_COMPILE=aarch64-linux-gnu- $ export ATF_LOAD_ADDR=0x920000 $ make verdin-imx8mm_defconfig - $ make flash.bin + $ make Flash to eMMC ------------- @@ -78,21 +78,28 @@ Output: .. code-block:: bash - U-Boot SPL 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100) - Normal Boot - Trying to boot from MMC1 - - U-Boot 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100) - - CPU: Freescale i.MX8MMQ rev1.0 at 0 MHz - Reset cause: POR - DRAM: 2 GiB - MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 - Loading Environment from MMC... OK - In: serial - Out: serial - Err: serial - Model: Toradex Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT V1.0A, Serial: - Net: eth0: ethernet@30be0000 - Hit any key to stop autoboot: 0 - Verdin iMX8MM # +U-Boot SPL 2021.10-rc2-00028-gee010ba1129 (Aug 23 2021 - 16:56:02 +0200) +Normal Boot +WDT: Started with servicing (60s timeout) +Trying to boot from MMC1 +NOTICE: BL31: v2.2(release):rel_imx_5.4.70_2.3.2_rc1-5-g835a8f67b +NOTICE: BL31: Built : 18:02:12, Aug 16 2021 + + +U-Boot 2021.10-rc2-00028-gee010ba1129 (Aug 23 2021 - 16:56:02 +0200) + +CPU: Freescale i.MX8MMQ rev1.0 at 1200 MHz +Reset cause: POR +DRAM: 2 GiB +WDT: Started with servicing (60s timeout) +MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 +Loading Environment from MMC... OK +In: serial +Out: serial +Err: serial +Model: Toradex Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT V1.1A, Serial# 06760554 +Carrier: Toradex Verdin Development Board V1.1A, Serial# 10754333 +Setting variant to wifi +Net: eth0: ethernet@30be0000 +Hit any key to stop autoboot: 0 +Verdin iMX8MM # diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 8059454887..ce5681499c 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2019 Toradex + * Copyright 2019-2021 Toradex */ #ifndef __APALIS_IMX8_H @@ -42,12 +42,12 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ + "boot_file=Image\0" \ "console=ttyLP1 earlycon\0" \ "fdt_addr=0x83000000\0" \ "fdt_file=fsl-imx8qm-apalis-eval.dtb\0" \ "fdtfile=fsl-imx8qm-apalis-eval.dtb\0" \ "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ - "image=Image\0" \ "initrd_addr=0x83800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ @@ -57,7 +57,7 @@ "netargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \ "\0" \ - "nfsboot=run netargs; dhcp ${loadaddr} ${image}; tftp ${fdt_addr} " \ + "nfsboot=run netargs; dhcp ${loadaddr} ${boot_file}; tftp ${fdt_addr} " \ "apalis-imx8/${fdt_file}; booti ${loadaddr} - ${fdt_addr}\0" \ "panel=NULL\0" \ "script=boot.scr\0" \ diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 741c3fedec..6b3e1c665a 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2018-2019 Toradex AG + * Copyright 2018-2021 Toradex AG * * Configuration settings for the Colibri iMX6ULL module. * @@ -13,7 +13,7 @@ #include "mx6_common.h" #define CONFIG_IOMUX_LPSR -#define PHYS_SDRAM_SIZE SZ_512M +#define PHYS_SDRAM_SIZE SZ_1G /* ENET1 */ #define IMX_FEC_BASE ENET2_BASE_ADDR @@ -26,6 +26,22 @@ #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_SERVERIP 192.168.10.1 +#if defined(CONFIG_TARGET_COLIBRI_IMX6ULL_EMMC) +#define UBOOT_UPDATE \ + "uboot_hwpart=1\0" \ + "uboot_blk=2\0" \ + "set_blkcnt=setexpr blkcnt ${filesize} + 0x1ff && " \ + "setexpr blkcnt ${blkcnt} / 0x200\0" \ + "update_uboot=run set_blkcnt && mmc dev 0 ${uboot_hwpart} && " \ + "mmc write ${loadaddr} ${uboot_blk} ${blkcnt}\0" +#elif defined(CONFIG_TARGET_COLIBRI_IMX6ULL_NAND) +#define UBOOT_UPDATE \ + "update_uboot=nand erase.part u-boot1 && " \ + "nand write ${loadaddr} u-boot1 ${filesize} && " \ + "nand erase.part u-boot2 && " \ + "nand write ${loadaddr} u-boot2 ${filesize}\0" +#endif + #define MEM_LAYOUT_ENV_SETTINGS \ "bootm_size=0x10000000\0" \ "fdt_addr_r=0x82100000\0" \ @@ -34,12 +50,6 @@ "ramdisk_addr_r=0x82200000\0" \ "scriptaddr=0x87000000\0" -#define UBOOT_UPDATE \ - "update_uboot=nand erase.part u-boot1 && " \ - "nand write ${loadaddr} u-boot1 ${filesize} && " \ - "nand erase.part u-boot2 && " \ - "nand write ${loadaddr} u-boot2 ${filesize}\0" - #define NFS_BOOTCMD \ "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ "nfsboot=run setup; " \ @@ -60,17 +70,32 @@ "ubi read ${fdt_addr_r} dtb && " \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ +#if defined(CONFIG_TARGET_COLIBRI_IMX6ULL_NAND) /* Run Distro Boot script if ubiboot fails */ #define CONFIG_BOOTCOMMAND "run ubiboot || run distro_bootcmd;" +#define DFU_ALT_NAND_INFO "imx6ull-bcb part 0,1;u-boot1 part 0,2;u-boot2 part 0,3;u-boot-env part 0,4;ubi partubi 0,5" +#define MODULE_EXTRA_ENV_SETTINGS \ + "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ + UBI_BOOTCMD +#else +#define MODULE_EXTRA_ENV_SETTINGS "" +#endif +#if defined(CONFIG_TARGET_COLIBRI_IMX6ULL_NAND) +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) \ + func(DHCP, dhcp, na) +#elif defined(CONFIG_TARGET_COLIBRI_IMX6ULL_EMMC) #define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ func(DHCP, dhcp, na) +#endif #include <config_distro_bootcmd.h> -#define DFU_ALT_NAND_INFO "imx6ull-bcb part 0,1;u-boot1 part 0,2;u-boot2 part 0,3;u-boot-env part 0,4;ubi partubi 0,5" - #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ @@ -80,12 +105,10 @@ "bootubipart=ubi\0" \ "console=ttymxc0\0" \ "defargs=user_debug=30\0" \ - "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ "fdt_board=eval-v3\0" \ "fdt_fixup=;\0" \ "ip_dyn=yes\0" \ "kernel_file=zImage\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ "${board}/flash_eth.img && source ${loadaddr}\0" \ @@ -117,10 +140,16 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) +/* environment organization */ + +/* Environment in eMMC, before config block at the end of 1st "boot sector" */ + +#ifdef CONFIG_TARGET_COLIBRI_IMX6ULL_NAND /* NAND stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* used to initialize CONFIG_SYS_NAND_BASE_LIST which is unused */ #define CONFIG_SYS_NAND_BASE -1 +#endif /* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index bec6c1d8e9..2427603d00 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -43,9 +43,6 @@ #define FEC_QUIRK_ENET_MAC #define DWC_NET_PHYADDR 1 -#ifdef CONFIG_DWC_ETH_QOS -#define CONFIG_SYS_NONCACHED_MEMORY (1 * SZ_1M) /* 1M */ -#endif #define PHY_ANEG_TIMEOUT 20000 diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 8d1fd153f6..e74f2b2795 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -37,10 +37,7 @@ "console=ttymxc2,115200\0" \ "fdt_addr=0x48000000\0" \ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "ipaddr=192.168.3.11\0" \ - "serverip=192.168.3.10\0" \ - "netmask=255.225.255.0\0" \ - "ip_dyn=no\0" \ + "ip_dyn=yes\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ "mmcroot=2\0" \ @@ -94,30 +91,21 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define PHYS_SDRAM SZ_1G +#define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ /* UART */ #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR /* Monitor Command Prompt */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) + /* USDHC */ #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 -/* ENET1 */ -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_FEC_MXC_PHYADDR 0 -#define FEC_QUIRK_ENET_MAC -#define IMX_FEC_BASE 0x30BE0000 - #endif /* __PHYCORE_IMX8MM_H */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 50c808383d..693fd6907e 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2020 Toradex + * Copyright 2020-2021 Toradex */ #ifndef __VERDIN_IMX8MM_H @@ -54,16 +54,16 @@ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ "bootcmd_mfg=fastboot 0\0" \ + "boot_file=Image\0" \ "console=ttymxc0\0" \ "fdt_addr=0x43000000\0" \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "fdt_board=dev\0" \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_image=Image\0" \ "netargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \ "\0" \ - "nfsboot=run netargs; dhcp ${loadaddr} ${kernel_image}; " \ + "nfsboot=run netargs; dhcp ${loadaddr} ${boot_file}; " \ "tftp ${fdt_addr} verdin/${fdtfile}; " \ "booti ${loadaddr} - ${fdt_addr}\0" \ "setup=setenv setupargs console=${console},${baudrate} " \ @@ -118,4 +118,4 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#endif /*_VERDIN_IMX8MM_H */ +#endif /* __VERDIN_IMX8MM_H */ diff --git a/tools/imx8m_image.sh b/tools/imx8m_image.sh index ba60104443..4ab3116ee0 100755 --- a/tools/imx8m_image.sh +++ b/tools/imx8m_image.sh @@ -41,6 +41,13 @@ if [ $post_process = 1 ]; then cat spl/u-boot-spl-pad.bin ddr4_1d_fw.bin ddr4_2d_fw.bin > spl/u-boot-spl-ddr.bin rm -f ddr4_1d_fw.bin ddr4_2d_fw.bin ddr4_imem_1d_pad.bin ddr4_dmem_1d_pad.bin ddr4_imem_2d_pad.bin spl/u-boot-spl-pad.bin fi + if [ -f ddr3_imem_1d.bin ]; then + objcopy -I binary -O binary --pad-to 0x8000 --gap-fill=0x0 ddr3_imem_1d.bin ddr3_imem_1d_pad.bin + cat ddr3_imem_1d_pad.bin ddr3_dmem_1d.bin > ddr3_1d_fw.bin + dd if=spl/u-boot-spl.bin of=spl/u-boot-spl-pad.bin bs=4 conv=sync + cat spl/u-boot-spl-pad.bin ddr3_1d_fw.bin > spl/u-boot-spl-ddr.bin + rm -f ddr3_1d_fw.bin ddr3_imem_1d_pad.bin spl/u-boot-spl-pad.bin + fi fi exit 0 |