diff options
| -rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-mini-emmc.dts | 76 | ||||
| -rw-r--r-- | configs/xilinx_zynqmp_mini_emmc_defconfig | 44 | ||||
| -rw-r--r-- | include/configs/xilinx_zynqmp_mini_emmc.h | 23 |
4 files changed, 144 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f2888177d9..3f4f5e7390 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -147,6 +147,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-zybo.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-ep108.dtb \ + zynqmp-mini-emmc.dtb \ zynqmp-mini-nand.dtb \ zynqmp-zcu102-revA.dtb \ zynqmp-zcu102-revB.dtb \ diff --git a/arch/arm/dts/zynqmp-mini-emmc.dts b/arch/arm/dts/zynqmp-mini-emmc.dts new file mode 100644 index 0000000000..e65934046b --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-emmc.dts @@ -0,0 +1,76 @@ +/* + * dts file for Xilinx ZynqMP Mini Configuration + * + * (C) Copyright 2018, Xilinx, Inc. + * + * Siva Durga Prasad <siva.durga.paladugu@xilinx.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +/ { + model = "ZynqMP MINI EMMC"; + compatible = "xlnx,zynqmp"; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &dcc; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x20000000>; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "disabled"; + u-boot,dm-pre-reloc; + }; + + amba: amba { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + sdhci0: sdhci@ff160000 { + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; + status = "disabled"; + reg = <0x0 0xff160000 0x0 0x1000>; + clock-names = "clk_xin", "clk_ahb"; + xlnx,device_id = <0>; + }; + + sdhci1: sdhci@ff170000 { + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; + status = "disabled"; + reg = <0x0 0xff170000 0x0 0x1000>; + clock-names = "clk_xin", "clk_ahb"; + xlnx,device_id = <1>; + }; + }; +}; + +&dcc { + status = "okay"; +}; + +&sdhci0 { + status = "okay"; +}; + +&sdhci1 { + status = "okay"; +}; diff --git a/configs/xilinx_zynqmp_mini_emmc_defconfig b/configs/xilinx_zynqmp_mini_emmc_defconfig new file mode 100644 index 0000000000..5d854d9b8b --- /dev/null +++ b/configs/xilinx_zynqmp_mini_emmc_defconfig @@ -0,0 +1,44 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc" +CONFIG_FIT=y +CONFIG_BOOTDELAY=-1 +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_BOOTI is not set +# CONFIG_CMD_GO is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_DM is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_EMBED=y +# CONFIG_DM_WARN is not set +# CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +# CONFIG_EFI_LOADER is not set diff --git a/include/configs/xilinx_zynqmp_mini_emmc.h b/include/configs/xilinx_zynqmp_mini_emmc.h new file mode 100644 index 0000000000..6f56cf61a6 --- /dev/null +++ b/include/configs/xilinx_zynqmp_mini_emmc.h @@ -0,0 +1,23 @@ +/* + * Configuration for Xilinx ZynqMP eMMC Flash utility + * + * (C) Copyright 2018 Xilinx, Inc. + * Michal Simek <michal.simek@xilinx.com> + * Siva Durga Prasad Paladugu <sivadur@xilinx.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQMP_MINI_EMMC_H +#define __CONFIG_ZYNQMP_MINI_EMMC_H + +#include <configs/xilinx_zynqmp_mini.h> + +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_ENV_SIZE 0x10000 +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MALLOC_LEN 0x800000 +#define CONFIG_SYS_LONGHELP + +#endif /* __CONFIG_ZYNQMP_MINI_EMMC_H */ |