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-rw-r--r--arch/arm/cpu/armv8/start.S13
-rw-r--r--arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi49
-rw-r--r--arch/arm/include/asm/macro.h18
-rw-r--r--arch/arm/include/asm/system.h6
-rw-r--r--arch/arm/mach-snapdragon/Kconfig1
-rw-r--r--arch/arm/mach-snapdragon/include/mach/boot0.h54
-rw-r--r--board/qualcomm/dragonboard410c/MAINTAINERS1
-rw-r--r--board/qualcomm/dragonboard410c/Makefile2
-rw-r--r--board/qualcomm/dragonboard410c/dragonboard410c.c16
-rw-r--r--board/qualcomm/dragonboard410c/head.S33
-rw-r--r--board/qualcomm/dragonboard410c/lowlevel_init.S27
-rw-r--r--board/qualcomm/dragonboard410c/readme.txt73
-rw-r--r--board/qualcomm/dragonboard410c/u-boot.lds118
-rw-r--r--board/socionext/developerbox/developerbox.c15
-rw-r--r--cmd/smccc.c6
-rw-r--r--configs/dragonboard410c_defconfig3
-rw-r--r--configs/synquacer_developerbox_defconfig11
-rw-r--r--doc/board/index.rst1
-rw-r--r--doc/board/qualcomm/dragonboard410c.rst45
-rw-r--r--doc/board/qualcomm/index.rst9
-rw-r--r--drivers/net/sni_netsec.c7
-rw-r--r--drivers/reset/reset-ast2600.c8
-rw-r--r--drivers/serial/serial_msm.c4
-rw-r--r--drivers/serial/serial_pl01x.c11
-rw-r--r--include/configs/dragonboard410c.h7
-rw-r--r--include/configs/synquacer.h2
26 files changed, 245 insertions, 295 deletions
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 9e9c6140cd..b3eef705a5 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -127,10 +127,6 @@ pie_fixup_done:
orr x0, x0, #0xf /* SCR_EL3.NS|IRQ|FIQ|EA */
msr scr_el3, x0
msr cptr_el3, xzr /* Enable FP/SIMD */
-#ifdef COUNTER_FREQUENCY
- ldr x0, =COUNTER_FREQUENCY
- msr cntfrq_el0, x0 /* Initialize CNTFRQ */
-#endif
b 0f
2: mrs x1, hcr_el2
tbnz x1, #34, 1f /* HCR_EL2.E2H */
@@ -142,7 +138,14 @@ pie_fixup_done:
mov x0, #3 << 20
msr cpacr_el1, x0 /* Enable FP/SIMD */
0:
- isb
+
+#ifdef COUNTER_FREQUENCY
+ branch_if_not_highest_el x0, 4f
+ ldr x0, =COUNTER_FREQUENCY
+ msr cntfrq_el0, x0 /* Initialize CNTFRQ */
+#endif
+
+4: isb
/*
* Enable SMPEN bit for coherency.
diff --git a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
index 2f13a42235..7a56116d6f 100644
--- a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
+++ b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
@@ -31,6 +31,55 @@
spi-max-frequency = <31250000>;
spi-rx-bus-width = <0x1>;
spi-tx-bus-width = <0x1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "BootStrap-BL1";
+ reg = <0x0 0x70000>;
+ read-only;
+ };
+
+ partition@70000 {
+ label = "Flash-Writer";
+ reg = <0x70000 0x90000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "SCP-BL2";
+ reg = <0x100000 0x80000>;
+ read-only;
+ };
+
+ partition@180000 {
+ label = "FIP-TFA";
+ reg = <0x180000 0x78000>;
+ };
+
+ partition@1f8000 {
+ label = "Stage2Tables";
+ reg = <0x1f8000 0x8000>;
+ };
+
+ partition@200000 {
+ label = "U-Boot";
+ reg = <0x200000 0x100000>;
+ };
+
+ partition@300000 {
+ label = "UBoot-Env";
+ reg = <0x300000 0x100000>;
+ };
+
+ partition@500000 {
+ label = "Ex-OPTEE";
+ reg = <0x500000 0x200000>;
+ };
+ };
};
};
diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
index bb33b4bc89..485310d660 100644
--- a/arch/arm/include/asm/macro.h
+++ b/arch/arm/include/asm/macro.h
@@ -78,6 +78,24 @@ lr .req x30
.endm
/*
+ * Branch if we are not in the highest exception level
+ */
+.macro branch_if_not_highest_el, xreg, label
+ switch_el \xreg, 3f, 2f, 1f
+
+2: mrs \xreg, ID_AA64PFR0_EL1
+ and \xreg, \xreg, #(ID_AA64PFR0_EL1_EL3)
+ cbnz \xreg, \label
+ b 3f
+
+1: mrs \xreg, ID_AA64PFR0_EL1
+ and \xreg, \xreg, #(ID_AA64PFR0_EL1_EL3 | ID_AA64PFR0_EL1_EL2)
+ cbnz \xreg, \label
+
+3:
+.endm
+
+/*
* Branch if current processor is a Cortex-A57 core.
*/
.macro branch_if_a57_core, xreg, a57_label
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 11fceec4d2..8b3a54e64c 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -80,6 +80,12 @@
#define HCR_EL2_HCD_DIS (1 << 29) /* Hypervisor Call disabled */
/*
+ * ID_AA64PFR0_EL1 bits definitions
+ */
+#define ID_AA64PFR0_EL1_EL3 (0xF << 12) /* EL3 implemented */
+#define ID_AA64PFR0_EL1_EL2 (0xF << 8) /* EL2 implemented */
+
+/*
* CPACR_EL1 bits definitions
*/
#define CPACR_EL1_FPEN_EN (3 << 20) /* SIMD and FP instruction enabled */
diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig
index e562d693c6..0ec74fa5d3 100644
--- a/arch/arm/mach-snapdragon/Kconfig
+++ b/arch/arm/mach-snapdragon/Kconfig
@@ -15,6 +15,7 @@ choice
config TARGET_DRAGONBOARD410C
bool "96Boards Dragonboard 410C"
select BOARD_LATE_INIT
+ select ENABLE_ARM_SOC_BOOT0_HOOK
help
Support for 96Boards Dragonboard 410C. This board complies with
96Board Open Platform Specifications. Features:
diff --git a/arch/arm/mach-snapdragon/include/mach/boot0.h b/arch/arm/mach-snapdragon/include/mach/boot0.h
new file mode 100644
index 0000000000..953cccad79
--- /dev/null
+++ b/arch/arm/mach-snapdragon/include/mach/boot0.h
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Workaround for "PSCI bug" on DragonBoard 410c
+ * Copyright (C) 2021 Stephan Gerhold <stephan@gerhold.net>
+ *
+ * Syscall parameters taken from Qualcomm's LK fork (scm.h):
+ * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
+ *
+ * The PSCI implementation in the TrustZone/tz firmware on DragonBoard 410c has
+ * a bug that starts all other CPU cores in 32-bit mode unless the TZ syscall
+ * that switches from 32-bit to 64-bit mode is executed at least once.
+ *
+ * Normally this happens inside Qualcomm's LK bootloader which runs in 32-bit
+ * mode and uses the TZ syscall to boot a kernel in 64-bit mode. However, if
+ * U-Boot is installed to the "aboot" partition (replacing LK) the switch to
+ * 64-bit mode never happens since U-Boot is already running in 64-bit mode.
+ *
+ * A workaround for this "PSCI bug" is to execute the TZ syscall when entering
+ * U-Boot. That way PSCI is made aware of the 64-bit switch and starts all other
+ * CPU cores in 64-bit mode as well.
+ */
+#include <linux/arm-smccc.h>
+
+#define ARM_SMCCC_SIP32_FAST_CALL \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_32, ARM_SMCCC_OWNER_SIP, 0)
+
+ /*
+ * U-Boot might be started in EL2 or EL3 with custom firmware.
+ * In that case, we assume that the workaround is not necessary or is
+ * handled already by the alternative firmware. Using the syscall in EL2
+ * would demote U-Boot to EL1; in EL3 it would probably just crash.
+ */
+ mrs x0, CurrentEL
+ cmp x0, #(1 << 2) /* EL1 */
+ bne reset
+
+ /* Prepare TZ syscall parameters */
+ mov x0, #ARM_SMCCC_SIP32_FAST_CALL
+ movk x0, #0x10f /* SCM_SVC_MILESTONE_CMD_ID */
+ mov x1, #0x12 /* MAKE_SCM_ARGS(0x2, SMC_PARAM_TYPE_BUFFER_READ) */
+ adr x2, el1_system_param
+ mov x3, el1_system_param_end - el1_system_param
+
+ /* Switch PSCI to 64-bit mode. Resets CPU and returns at el1_elr */
+ smc #0
+
+ /* Something went wrong, perhaps PSCI is already in 64-bit mode? */
+ b reset
+
+ .align 3
+el1_system_param:
+ .quad 0, 0, 0, 0, 0, 0, 0, 0, 0 /* el1_x0-x8 */
+ .quad reset /* el1_elr */
+el1_system_param_end:
diff --git a/board/qualcomm/dragonboard410c/MAINTAINERS b/board/qualcomm/dragonboard410c/MAINTAINERS
index 83448f5c13..e78f5b2d64 100644
--- a/board/qualcomm/dragonboard410c/MAINTAINERS
+++ b/board/qualcomm/dragonboard410c/MAINTAINERS
@@ -4,3 +4,4 @@ S: Maintained
F: board/qualcomm/dragonboard410c/
F: include/configs/dragonboard410c.h
F: configs/dragonboard410c_defconfig
+F: doc/board/qualcomm/dragonboard410c.rst
diff --git a/board/qualcomm/dragonboard410c/Makefile b/board/qualcomm/dragonboard410c/Makefile
index 9b452041f4..1b99c8b0ef 100644
--- a/board/qualcomm/dragonboard410c/Makefile
+++ b/board/qualcomm/dragonboard410c/Makefile
@@ -3,5 +3,3 @@
# (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
obj-y := dragonboard410c.o
-obj-y += lowlevel_init.o
-extra-y += head.o
diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c
index 0d282de958..371b3262f8 100644
--- a/board/qualcomm/dragonboard410c/dragonboard410c.c
+++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
@@ -22,19 +22,6 @@
DECLARE_GLOBAL_DATA_PTR;
-/* pointer to the device tree ammended by the firmware */
-extern void *fw_dtb;
-
-void *board_fdt_blob_setup(void)
-{
- if (fdt_magic(fw_dtb) != FDT_MAGIC) {
- printf("Firmware provided invalid dtb!\n");
- return NULL;
- }
-
- return fw_dtb;
-}
-
int dram_init(void)
{
gd->ram_size = PHYS_SDRAM_1_SIZE;
@@ -145,8 +132,7 @@ int misc_init_r(void)
}
if (dm_gpio_get_value(&resin)) {
- env_set("bootdelay", "-1");
- env_set("bootcmd", "fastboot 0");
+ env_set("preboot", "setenv preboot; fastboot 0");
printf("key_vol_down pressed - Starting fastboot.\n");
}
diff --git a/board/qualcomm/dragonboard410c/head.S b/board/qualcomm/dragonboard410c/head.S
deleted file mode 100644
index 33e9d305f9..0000000000
--- a/board/qualcomm/dragonboard410c/head.S
+++ /dev/null
@@ -1,33 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * ARM64 header for proper chain-loading with Little Kernel.
- *
- * Little Kernel shipped with Dragonboard410C boots standard Linux images for
- * ARM64. This file adds header that is required to boot U-Boot properly.
- *
- * For details see:
- * https://www.kernel.org/doc/Documentation/arm64/booting.txt
- *
- * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
- */
-
-#include <config.h>
-
-.global _arm64_header
-_arm64_header:
- b _start
- .word 0
- /* Image load offset from start of RAM, little-endian */
- .quad CONFIG_SYS_TEXT_BASE-PHYS_SDRAM_1
- /* Effective size of kernel image, little-endian */
- .quad 0 /* 0x60000 - ignored */
- /* Informative flags, little-endian */
- .quad 0
- .quad 0 /* reserved */
- .quad 0 /* reserved */
- .quad 0 /* reserved */
- .byte 0x41 /* Magic number, "ARM\x64" */
- .byte 0x52
- .byte 0x4d
- .byte 0x64
- .word 0 /* reserved */
diff --git a/board/qualcomm/dragonboard410c/lowlevel_init.S b/board/qualcomm/dragonboard410c/lowlevel_init.S
deleted file mode 100644
index 762fed5617..0000000000
--- a/board/qualcomm/dragonboard410c/lowlevel_init.S
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2016
- * Cédric Schieli <cschieli@gmail.com>
- */
-
-#include <config.h>
-
-.align 8
-.global fw_dtb
-fw_dtb:
- .dword 0x0
-
-/*
- * Routine: save_boot_params (called after reset from start.S)
- * Description: save ATAG/FDT address provided by the firmware at boot time
- */
-
-.global save_boot_params
-save_boot_params:
-
- /* The firmware provided ATAG/FDT address can be found in r2/x0 */
- adr x8, fw_dtb
- str x0, [x8]
-
- /* Returns */
- b save_boot_params_ret
diff --git a/board/qualcomm/dragonboard410c/readme.txt b/board/qualcomm/dragonboard410c/readme.txt
index a90d0f52e7..dfdb299fb7 100644
--- a/board/qualcomm/dragonboard410c/readme.txt
+++ b/board/qualcomm/dragonboard410c/readme.txt
@@ -1,69 +1,6 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
+Documentation for DragonBoard 410c is now located at:
+ doc/board/qualcomm/dragonboard410c.rst
-Build & Run instructions:
-
-1) Install mkbootimg and dtbTool from
- git://codeaurora.org/quic/kernel/skales (15ece94f09 worked for me)
-2) Setup CROSS_COMPILE to aarch64 compiler
-3) make dragonboard410c_config
-4) make
-5) generate fake, empty ramdisk (can have 0 bytes)
-$ touch rd
-
-6) Generate qualcomm device tree table with dtbTool [1]
-$ dtbTool -o dt.img arch/arm/dts
-
-7) Generate Android boot image with mkbootimg [2]:
-$ mkbootimg --kernel=u-boot-dtb.bin --output=u-boot.img --dt=dt.img \
- --pagesize 2048 --base 0x80000000 --ramdisk=rd --cmdline=""
-
-8) Enter fastboot (reboot board with vol- button pressed)
-
-9) Boot it:
-$ fastboot boot u-boot.img
-or flash as kernel:
-$ fastboot flash boot u-boot.img
-$ fastboot reboot
-
-
-What is working:
-- UART
-- GPIO (SoC)
-- SD
-- eMMC
-- Reset
-- USB in EHCI mode (usb starts does switch device->host, usb stop does the opposite)
-- PMIC GPIOS (but not in generic subsystem)
-- PMIC "special" buttons (power, vol-)
-
-What is not working / known bugs:
-- SDHCI is slow (~2.5MiB/s for SD and eMMC)
-
-[1] To boot any kernel image, Little Kernel requires valid device tree for the
-platform it runs on. dtbTool creates device tree table that Little Kernel scans.
-Later on proper device tree is passed to next boot stage.
-Full device tree is not required to boot u-boot. Enough would be:
-/dts-v1/;
-
-/ {
- model = "Qualcomm Technologies, Inc. Dragonboard 410c";
- compatible = "qcom,dragonboard", "qcom,apq8016-sbc";
- qcom,msm-id = <0xce 0x0 0xf8 0x0 0xf9 0x0 0xfa 0x0 0xf7 0x0>;
- qcom,board-id = <0x10018 0x0>;
- #address-cells = <0x2>;
- #size-cells = <0x2>;
- chosen { };
- aliases { };
-
- memory {
- device_type = "memory";
- reg = <0 0x80000000 0 0x3da00000>;
- };
-};
-
-but for simplicity (and because size of image is not that critical) we use
-existing Qualcomm device trees.
-
-[2] Note that ramdisk is required, even if it is unused.
+Note that the installation method has changed: U-Boot is now installed into the
+"aboot" partition (replacing Little Kernel/LK). It is no longer packaged into
+an Android boot image and loaded through Qualcomm's LK bootloader.
diff --git a/board/qualcomm/dragonboard410c/u-boot.lds b/board/qualcomm/dragonboard410c/u-boot.lds
deleted file mode 100644
index fc1bba8cf0..0000000000
--- a/board/qualcomm/dragonboard410c/u-boot.lds
+++ /dev/null
@@ -1,118 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Override linker script for fastboot-readable images
- *
- * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
- *
- * Based on arch/arm/cpu/armv8/u-boot.lds (Just add header)
- */
-
-OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64")
-OUTPUT_ARCH(aarch64)
-ENTRY(_arm64_header)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(8);
- .text :
- {
- *(.__image_copy_start)
- board/qualcomm/dragonboard410c/head.o (.text*)
- CPUDIR/start.o (.text*)
- }
-
- /* This needs to come before *(.text*) */
- .efi_runtime : {
- __efi_runtime_start = .;
- *(.text.efi_runtime*)
- *(.rodata.efi_runtime*)
- *(.data.efi_runtime*)
- __efi_runtime_stop = .;
- }
-
- .text_rest :
- {
- *(.text*)
- }
-
- . = ALIGN(8);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = ALIGN(8);
- .data : {
- *(.data*)
- }
-
- . = ALIGN(8);
-
- . = .;
-
- . = ALIGN(8);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
- . = ALIGN(8);
-
- .efi_runtime : {
- __efi_runtime_start = .;
- *(efi_runtime_text)
- *(efi_runtime_data)
- __efi_runtime_stop = .;
- }
-
- .efi_runtime_rel : {
- __efi_runtime_rel_start = .;
- *(.rel*.efi_runtime)
- *(.rel*.efi_runtime.*)
- __efi_runtime_rel_stop = .;
- }
-
- . = ALIGN(8);
-
- .image_copy_end :
- {
- *(.__image_copy_end)
- }
-
- . = ALIGN(8);
-
- .rel_dyn_start :
- {
- *(.__rel_dyn_start)
- }
-
- .rela.dyn : {
- *(.rela*)
- }
-
- .rel_dyn_end :
- {
- *(.__rel_dyn_end)
- }
-
- _end = .;
-
- . = ALIGN(8);
-
- .bss_start : {
- KEEP(*(.__bss_start));
- }
-
- .bss : {
- *(.bss*)
- . = ALIGN(8);
- }
-
- .bss_end : {
- KEEP(*(.__bss_end));
- }
-
- /DISCARD/ : { *(.dynsym) }
- /DISCARD/ : { *(.dynstr*) }
- /DISCARD/ : { *(.dynamic*) }
- /DISCARD/ : { *(.plt*) }
- /DISCARD/ : { *(.interp*) }
- /DISCARD/ : { *(.gnu*) }
-}
diff --git a/board/socionext/developerbox/developerbox.c b/board/socionext/developerbox/developerbox.c
index 34335baec3..9552bfcdc3 100644
--- a/board/socionext/developerbox/developerbox.c
+++ b/board/socionext/developerbox/developerbox.c
@@ -62,6 +62,19 @@ DECLARE_GLOBAL_DATA_PTR;
#define LOAD_OFFSET 0x100
+/* SCBM System MMU is used for eMMC and NETSEC */
+#define SCBM_SMMU_ADDR (0x52e00000UL)
+#define SMMU_SCR0_OFFS (0x0)
+#define SMMU_SCR0_SHCFG_INNER (0x2 << 22)
+#define SMMU_SCR0_MTCFG (0x1 << 20)
+#define SMMU_SCR0_MEMATTR_INNER_OUTER_WB (0xf << 16)
+
+static void synquacer_setup_scbm_smmu(void)
+{
+ writel(SMMU_SCR0_SHCFG_INNER | SMMU_SCR0_MTCFG | SMMU_SCR0_MEMATTR_INNER_OUTER_WB,
+ SCBM_SMMU_ADDR + SMMU_SCR0_OFFS);
+}
+
/*
* Miscellaneous platform dependent initialisations
*/
@@ -71,6 +84,8 @@ int board_init(void)
gd->env_addr = (ulong)&default_environment[0];
+ synquacer_setup_scbm_smmu();
+
return 0;
}
diff --git a/cmd/smccc.c b/cmd/smccc.c
index 0b19f6c68c..0ff9a08021 100644
--- a/cmd/smccc.c
+++ b/cmd/smccc.c
@@ -50,7 +50,7 @@ static int do_call(struct cmd_tbl *cmdtp, int flag, int argc,
#ifdef CONFIG_CMD_SMC
U_BOOT_CMD(
- smc, 8, 2, do_call,
+ smc, 9, 2, do_call,
"Issue a Secure Monitor Call",
"<fid> [arg1 ... arg6] [id]\n"
" - fid Function ID\n"
@@ -61,9 +61,9 @@ U_BOOT_CMD(
#ifdef CONFIG_CMD_HVC
U_BOOT_CMD(
- hvc, 8, 2, do_call,
+ hvc, 9, 2, do_call,
"Issue a Hypervisor Call",
- "<fid> [arg1...arg7] [id]\n"
+ "<fid> [arg1...arg6] [id]\n"
" - fid Function ID\n"
" - arg HVC arguments, passed to X1-X6 (default to zero)\n"
" - id Session ID, passed to W7 (defaults to zero)\n"
diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig
index 7b7b32c0a2..a46283f980 100644
--- a/configs/dragonboard410c_defconfig
+++ b/configs/dragonboard410c_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_SNAPDRAGON=y
-CONFIG_SYS_TEXT_BASE=0x80080000
+CONFIG_SYS_TEXT_BASE=0x8f600000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
@@ -10,6 +10,7 @@ CONFIG_DISTRO_DEFAULTS=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig
index 090bc47524..ed372f7df9 100644
--- a/configs/synquacer_developerbox_defconfig
+++ b/configs/synquacer_developerbox_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
+CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_SYNQUACER=y
-CONFIG_SYS_TEXT_BASE=0x08200000
+CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_ENV_SIZE=0x30000
CONFIG_ENV_OFFSET=0x300000
CONFIG_ENV_SECT_SIZE=0x10000
@@ -31,13 +32,9 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_RTC=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nor1=nor1"
-CONFIG_MTDPARTS_DEFAULT="nor1:448k(BootStrap-BL1),576k(Flash-Writer),512k(SCP-BL2),480k(FIP-TFA),32k(Stg2-Tables),1m@2m(U-Boot),1m@3m(UBoot-Env),2m@5m(Ex-OPTEE)"
CONFIG_CMD_LOG=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
@@ -94,4 +91,6 @@ CONFIG_USB_STORAGE=y
CONFIG_EFI_SET_TIME=y
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_ON_DISK=y
-CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y
+CONFIG_EFI_IGNORE_OSINDICATIONS=y
+CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
+CONFIG_EFI_SECURE_BOOT=y
diff --git a/doc/board/index.rst b/doc/board/index.rst
index 196b597609..a6b395238a 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -20,6 +20,7 @@ Board-specific doc
kontron/index
microchip/index
openpiton/index
+ qualcomm/index
rockchip/index
sifive/index
sipeed/index
diff --git a/doc/board/qualcomm/dragonboard410c.rst b/doc/board/qualcomm/dragonboard410c.rst
new file mode 100644
index 0000000000..d0de9dbcbc
--- /dev/null
+++ b/doc/board/qualcomm/dragonboard410c.rst
@@ -0,0 +1,45 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Stephan Gerhold <stephan@gerhold.net>
+
+DragonBoard 410c
+================
+
+The DragonBoard 410c is a development board based on the Qualcomm APQ8016E SoC.
+More information can be found on the `96Boards product page`_.
+
+U-Boot can be used as a replacement for Qualcomm's original Android bootloader
+(a fork of Little Kernel/LK). Like LK, it is installed directly into the ``aboot``
+partition. Note that the U-Boot port used to be loaded as an Android boot image
+through LK. This is no longer the case, now U-Boot can replace LK entirely.
+
+.. _96Boards product page: https://www.96boards.org/product/dragonboard410c/
+
+Installation
+------------
+First, setup ``CROSS_COMPILE`` for aarch64. Then, build U-Boot for ``dragonboard410c``::
+
+ $ export CROSS_COMPILE=<aarch64 toolchain prefix>
+ $ make dragonboard410c_defconfig
+ $ make
+
+This will build ``u-boot.elf`` in the configured output directory.
+
+Although the DragonBoard 410c does not have secure boot set up by default,
+the firmware still expects firmware ELF images to be "signed". The signature
+does not provide any security in this case, but it provides the firmware with
+some required metadata.
+
+To "sign" ``u-boot.elf`` you can use e.g. `qtestsign`_::
+
+ $ ./qtestsign.py aboot u-boot.elf
+
+Then install the resulting ``u-boot-test-signed.mbn`` to the ``aboot`` partition
+on your device, e.g. with ``fastboot flash aboot u-boot-test-signed.mbn``.
+
+U-Boot should be running after a reboot (``fastboot reboot``).
+
+.. _qtestsign: https://github.com/msm8916-mainline/qtestsign
+
+Usage
+-----
+Press Volume Down during boot to enter Fastboot mode.
diff --git a/doc/board/qualcomm/index.rst b/doc/board/qualcomm/index.rst
new file mode 100644
index 0000000000..f7e0aa9298
--- /dev/null
+++ b/doc/board/qualcomm/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Qualcomm
+========
+
+.. toctree::
+ :maxdepth: 2
+
+ dragonboard410c
diff --git a/drivers/net/sni_netsec.c b/drivers/net/sni_netsec.c
index a9ebf6af9c..4901321d0c 100644
--- a/drivers/net/sni_netsec.c
+++ b/drivers/net/sni_netsec.c
@@ -1059,18 +1059,11 @@ static int netsec_of_to_plat(struct udevice *dev)
return 0;
}
-#define SMMU_SCR0_SHCFG_INNER (0x2 << 22)
-#define SMMU_SCR0_MTCFG (0x1 << 20)
-#define SMMU_SCR0_MEMATTR_INNER_OUTER_WB (0xf << 16)
-
static int netsec_probe(struct udevice *dev)
{
struct netsec_priv *priv = dev_get_priv(dev);
int ret;
- writel(SMMU_SCR0_SHCFG_INNER | SMMU_SCR0_MTCFG | SMMU_SCR0_MEMATTR_INNER_OUTER_WB,
- (phys_addr_t)0x52E00000);
-
netsec_reset_hardware(priv, true);
ret = netsec_mdiobus_init(priv, dev->name);
diff --git a/drivers/reset/reset-ast2600.c b/drivers/reset/reset-ast2600.c
index f64adaf74e..195ddd18e0 100644
--- a/drivers/reset/reset-ast2600.c
+++ b/drivers/reset/reset-ast2600.c
@@ -41,9 +41,9 @@ static int ast2600_reset_assert(struct reset_ctl *reset_ctl)
debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
if (reset_ctl->id < 32)
- writel(BIT(reset_ctl->id), scu->modrst_ctrl1);
+ writel(BIT(reset_ctl->id), &scu->modrst_ctrl1);
else
- writel(BIT(reset_ctl->id - 32), scu->modrst_ctrl2);
+ writel(BIT(reset_ctl->id - 32), &scu->modrst_ctrl2);
return 0;
}
@@ -56,9 +56,9 @@ static int ast2600_reset_deassert(struct reset_ctl *reset_ctl)
debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
if (reset_ctl->id < 32)
- writel(BIT(reset_ctl->id), scu->modrst_clr1);
+ writel(BIT(reset_ctl->id), &scu->modrst_clr1);
else
- writel(BIT(reset_ctl->id - 32), scu->modrst_clr2);
+ writel(BIT(reset_ctl->id - 32), &scu->modrst_clr2);
return 0;
}
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
index d8dd5c1104..ac4d0824b9 100644
--- a/drivers/serial/serial_msm.c
+++ b/drivers/serial/serial_msm.c
@@ -18,6 +18,7 @@
#include <asm/global_data.h>
#include <asm/io.h>
#include <linux/compiler.h>
+#include <linux/delay.h>
#include <dm/pinctrl.h>
/* Serial registers - this driver works in uartdm mode*/
@@ -193,6 +194,9 @@ static int msm_uart_clk_init(struct udevice *dev)
static void uart_dm_init(struct msm_serial_data *priv)
{
+ /* Delay initialization for a bit to let pins stabilize if necessary */
+ mdelay(5);
+
writel(priv->clk_bit_rate, priv->base + UARTDM_CSR);
writel(0x0, priv->base + UARTDM_MR1);
writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2);
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 76b96ad414..67caa063c9 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -404,8 +404,12 @@ static void _debug_uart_init(void)
{
#ifndef CONFIG_DEBUG_UART_SKIP_INIT
struct pl01x_regs *regs = (struct pl01x_regs *)CONFIG_DEBUG_UART_BASE;
- enum pl01x_type type = CONFIG_IS_ENABLED(DEBUG_UART_PL011) ?
- TYPE_PL011 : TYPE_PL010;
+ enum pl01x_type type;
+
+ if (IS_ENABLED(CONFIG_DEBUG_UART_PL011))
+ type = TYPE_PL011;
+ else
+ type = TYPE_PL010;
pl01x_generic_serial_init(regs, type);
pl01x_generic_setbrg(regs, type,
@@ -417,7 +421,8 @@ static inline void _debug_uart_putc(int ch)
{
struct pl01x_regs *regs = (struct pl01x_regs *)CONFIG_DEBUG_UART_BASE;
- pl01x_putc(regs, ch);
+ while (pl01x_putc(regs, ch) == -EAGAIN)
+ ;
}
DEBUG_UART_FUNCS
diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h
index 65537e4778..6474e57b29 100644
--- a/include/configs/dragonboard410c.h
+++ b/include/configs/dragonboard410c.h
@@ -11,10 +11,13 @@
#include <linux/sizes.h>
#include <asm/arch/sysmap-apq8016.h>
+/* Build new ELF image from u-boot.bin (U-Boot + appended DTB) */
+#define CONFIG_REMAKE_ELF
+
/* Physical Memory Map */
#define PHYS_SDRAM_1 0x80000000
-/* 1008 MB (the last ~30Mb are secured for TrustZone by ATF*/
-#define PHYS_SDRAM_1_SIZE 0x3da00000
+/* Note: 8 MiB (0x86000000 - 0x86800000) are reserved for tz/smem/hyp/rmtfs/rfsa */
+#define PHYS_SDRAM_1_SIZE SZ_1G
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000)
diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h
index 8fe10d7485..4503cf3f6d 100644
--- a/include/configs/synquacer.h
+++ b/include/configs/synquacer.h
@@ -62,7 +62,7 @@
/* #define CONFIG_SYS_PCI_64BIT 1 */
#define DEFAULT_DFU_ALT_INFO "dfu_alt_info=" \
- "mtd nor1=u-boot.bin raw 200000 100000;" \
+ "mtd mx66u51235f=u-boot.bin raw 200000 100000;" \
"fip.bin raw 180000 78000;" \
"optee.bin raw 500000 100000\0"