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-rw-r--r--board/mimc/mimc200/mimc200.c34
-rw-r--r--include/configs/mimc200.h16
2 files changed, 50 insertions, 0 deletions
diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c
index 6df741e397..78441c3b65 100644
--- a/board/mimc/mimc200/mimc200.c
+++ b/board/mimc/mimc200/mimc200.c
@@ -28,10 +28,40 @@
#include <asm/arch/gpio.h>
#include <asm/arch/hmatrix.h>
#include <asm/arch/portmux.h>
+#include <atmel_lcdc.h>
#include <lcd.h>
#include "../../../cpu/at32ap/hsmc3.h"
+#if defined(CONFIG_LCD)
+/* 480x272x16 @ 72 Hz */
+vidinfo_t panel_info = {
+ .vl_col = 480, /* Number of columns */
+ .vl_row = 272, /* Number of rows */
+ .vl_clk = 10000000, /* pixel clock in ps */
+ .vl_sync = ATMEL_LCDC_INVCLK_INVERTED |
+ ATMEL_LCDC_INVLINE_INVERTED |
+ ATMEL_LCDC_INVFRAME_INVERTED,
+ .vl_bpix = LCD_COLOR16, /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
+ .vl_tft = 1, /* 0 = passive, 1 = TFT */
+ .vl_hsync_len = 42, /* Length of horizontal sync */
+ .vl_left_margin = 1, /* Time from sync to picture */
+ .vl_right_margin = 1, /* Time from picture to sync */
+ .vl_vsync_len = 1, /* Length of vertical sync */
+ .vl_upper_margin = 12, /* Time from sync to picture */
+ .vl_lower_margin = 1, /* Time from picture to sync */
+ .mmio = LCDC_BASE, /* Memory mapped registers */
+};
+
+void lcd_enable(void)
+{
+}
+
+void lcd_disable(void)
+{
+}
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
static const struct sdram_config sdram_config = {
@@ -110,6 +140,10 @@ int board_early_init_f(void)
portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
#endif
+#if defined(CONFIG_LCD)
+ portmux_enable_lcdc(1);
+#endif
+
return 0;
}
diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h
index 8ff2f8a21e..8f71664f32 100644
--- a/include/configs/mimc200.h
+++ b/include/configs/mimc200.h
@@ -82,6 +82,8 @@
#define CONFIG_DISABLE_CONSOLE 1 /* disable console */
#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */
+#define CONFIG_LCD 1
+
/*
* Only interrupt autoboot if <space> is pressed. Otherwise, garbage
* data on the serial line may interrupt the boot sequence.
@@ -127,6 +129,20 @@
#define CONFIG_MMC 1
#define CONFIG_ATMEL_MCI 1
+#if defined(CONFIG_LCD)
+#define CONFIG_CMD_BMP
+#define CONFIG_ATMEL_LCD 1
+#define LCD_BPP LCD_COLOR16
+#define CONFIG_BMP_16BPP 1
+#define CONFIG_FB_ADDR 0x10600000
+#define CONFIG_WHITE_ON_BLACK 1
+#define CONFIG_VIDEO_BMP_GZIP 1
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144
+#define CONFIG_ATMEL_LCD_BGR555 1
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
+#define CONFIG_SPLASH_SCREEN 1
+#endif
+
#define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32