1 files changed, 30 insertions, 30 deletions

diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index f275e3b46c..249155733a 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -15,113 +15,113 @@
 	};
 
 	memory@80000000 {
-		u-boot,dm-spl;
+		bootph-pre-ram;
 	};
 };
 
 &cbass_main{
-	u-boot,dm-spl;
+	bootph-pre-ram;
 
 	timer1: timer@2400000 {
 		compatible = "ti,omap5430-timer";
 		reg = <0x00 0x2400000 0x00 0x80>;
 		ti,timer-alwon;
 		clock-frequency = <25000000>;
-		u-boot,dm-spl;
+		bootph-pre-ram;
 	};
 };
 
 &dmss {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &secure_proxy_main {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &dmsc {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &k3_pds {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &k3_clks {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &k3_reset {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &wkup_conf {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &chipid {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &main_pmx0 {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &main_uart0 {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &main_uart0_pins_default {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &main_uart1 {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &cbass_mcu {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &cbass_wakeup {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &mcu_pmx0 {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &wkup_uart0 {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &sdhci1 {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &main_mmc1_pins_default {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &fss {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &ospi0_pins_default {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &ospi0 {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 
 	flash@0 {
-		u-boot,dm-spl;
+		bootph-pre-ram;
 
 		partitions {
-			u-boot,dm-spl;
+			bootph-pre-ram;
 
 			partition@3fc0000 {
-				u-boot,dm-spl;
+				bootph-pre-ram;
 			};
 		};
 	};
@@ -132,17 +132,17 @@
 	      <0x0 0x43000200 0x0 0x8>;
 	reg-names = "cpsw_nuss", "mac_efuse";
 	/delete-property/ ranges;
-	u-boot,dm-spl;
+	bootph-pre-ram;
 
 	cpsw-phy-sel@04044 {
 		compatible = "ti,am64-phy-gmii-sel";
 		reg = <0x0 0x00104044 0x0 0x8>;
-		u-boot,dm-spl;
+		bootph-pre-ram;
 	};
 };
 
 &cpsw_port1 {
-	u-boot,dm-spl;
+	bootph-pre-ram;
 };
 
 &cpsw_port2 {