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path: root/arch/arm/dts/k3-am642-r5-evm.dts
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Diffstat (limited to 'arch/arm/dts/k3-am642-r5-evm.dts')
-rw-r--r--arch/arm/dts/k3-am642-r5-evm.dts32
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts
index 7493362ac6..ca5ce4a35a 100644
--- a/arch/arm/dts/k3-am642-r5-evm.dts
+++ b/arch/arm/dts/k3-am642-r5-evm.dts
@@ -25,7 +25,7 @@
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
a53_0: a53@0 {
@@ -41,7 +41,7 @@
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
reserved-memory {
@@ -60,7 +60,7 @@
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
vtt_supply: vtt-supply {
@@ -70,7 +70,7 @@
regulator-max-microvolt = <3300000>;
gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
states = <0 0x0 3300000 0x1>;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
};
@@ -79,7 +79,7 @@
compatible = "ti,am654-system-controller";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>;
mbox-names = "tx", "rx";
- u-boot,dm-spl;
+ bootph-pre-ram;
};
};
@@ -88,24 +88,24 @@
compatible = "ti,j721e-esm";
reg = <0x0 0x420000 0x0 0x1000>;
ti,esm-pins = <160>, <161>;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
};
&cbass_mcu {
- u-boot,dm-spl;
+ bootph-pre-ram;
mcu_esm: esm@4100000 {
compatible = "ti,j721e-esm";
reg = <0x0 0x4100000 0x0 0x1000>;
ti,esm-pins = <0>, <1>;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
};
&main_pmx0 {
- u-boot,dm-spl;
+ bootph-pre-ram;
main_uart0_pins_default: main-uart0-pins-default {
- u-boot,dm-spl;
+ bootph-pre-ram;
pinctrl-single,pins = <
AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
@@ -115,7 +115,7 @@
};
main_uart1_pins_default: main-uart1-pins-default {
- u-boot,dm-spl;
+ bootph-pre-ram;
pinctrl-single,pins = <
AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */
AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */
@@ -125,7 +125,7 @@
};
main_mmc0_pins_default: main-mmc0-pins-default {
- u-boot,dm-spl;
+ bootph-pre-ram;
pinctrl-single,pins = <
AM64X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
AM64X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
@@ -142,7 +142,7 @@
};
main_mmc1_pins_default: main-mmc1-pins-default {
- u-boot,dm-spl;
+ bootph-pre-ram;
pinctrl-single,pins = <
AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
@@ -156,7 +156,7 @@
};
ddr_vtt_pins_default: ddr-vtt-pins-default {
- u-boot,dm-spl;
+ bootph-pre-ram;
pinctrl-single,pins = <
AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */
>;
@@ -229,7 +229,7 @@
};
&main_uart1 {
- u-boot,dm-spl;
+ bootph-pre-ram;
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
};
@@ -259,7 +259,7 @@
};
&main_gpio0 {
- u-boot,dm-spl;
+ bootph-pre-ram;
/delete-property/ power-domains;
};