diff options
Diffstat (limited to 'arch/arm/dts/k3-j721e-r5-common-proc-board.dts')
| -rw-r--r-- | arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index 28a355d49c..1f14d71438 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -40,6 +40,13 @@ clock-frequency = <200000000>; u-boot,dm-spl; }; + + clk_19_2mhz: dummy_clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <19200000>; + u-boot,dm-spl; + }; }; &cbass_mcu_wakeup { @@ -133,6 +140,13 @@ J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */ >; }; + + main_i2c0_pins_default: main-i2c0-pins-default { + pinctrl-single,pins = < + J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */ + J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */ + >; + }; }; &wkup_uart0 { @@ -207,4 +221,35 @@ u-boot,dm-spl; }; +&usbss0 { + /delete-property/ power-domains; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + clocks = <&clk_19_2mhz>; + clock-names = "usb2_refclk"; + pinctrl-names = "default"; + pinctrl-0 = <&main_usbss0_pins_default>; + ti,vbus-divider; +}; + +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + exp1: gpio@20 { + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; + + exp2: gpio@22 { + compatible = "ti,tca6424"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + #include "k3-j721e-common-proc-board-u-boot.dtsi" |