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Diffstat (limited to 'arch/arm/dts/k3-j721e-r5-common-proc-board.dts')
-rw-r--r--arch/arm/dts/k3-j721e-r5-common-proc-board.dts38
1 files changed, 19 insertions, 19 deletions
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index ab9d6e65d8..e9e50538cb 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -33,27 +33,27 @@
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
clk_200mhz: dummy_clock_200mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
clk_19_2mhz: dummy_clock_19_2mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
};
&cbass_mcu_wakeup {
mcu_secproxy: secproxy@28380000 {
- u-boot,dm-spl;
+ bootph-pre-ram;
compatible = "ti,am654-secure-proxy";
reg = <0x0 0x2a380000 0x0 0x80000>,
<0x0 0x2a400000 0x0 0x80000>,
@@ -63,7 +63,7 @@
};
sysctrler: sysctrler {
- u-boot,dm-spl;
+ bootph-pre-ram;
compatible = "ti,am654-system-controller";
mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
mbox-names = "tx", "rx";
@@ -83,7 +83,7 @@
mbox-names = "rx", "tx";
mboxes= <&mcu_secproxy 21>,
<&mcu_secproxy 23>;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
};
@@ -92,7 +92,7 @@
compatible = "ti,j721e-esm";
reg = <0x0 0x700000 0x0 0x1000>;
ti,esm-pins = <344>, <345>;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
};
@@ -105,7 +105,7 @@
&wkup_pmx0 {
wkup_uart0_pins_default: wkup_uart0_pins_default {
- u-boot,dm-spl;
+ bootph-pre-ram;
pinctrl-single,pins = <
J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */
J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */
@@ -113,7 +113,7 @@
};
mcu_uart0_pins_default: mcu_uart0_pins_default {
- u-boot,dm-spl;
+ bootph-pre-ram;
pinctrl-single,pins = <
J721E_WKUP_IOPAD(0xe8, PIN_INPUT, 0) /* (H29) WKUP_GPIO0_14.MCU_UART0_CTSn */
J721E_WKUP_IOPAD(0xec, PIN_OUTPUT, 0) /* (J27) WKUP_GPIO0_15.MCU_UART0_RTSn */
@@ -171,7 +171,7 @@
};
mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
- u-boot,dm-spl;
+ bootph-pre-ram;
pinctrl-single,pins = <
J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
@@ -187,7 +187,7 @@
&main_pmx0 {
main_uart0_pins_default: main_uart0_pins_default {
- u-boot,dm-spl;
+ bootph-pre-ram;
pinctrl-single,pins = <
J721E_IOPAD(0x1d4, PIN_INPUT, 1) /* (Y3) SPI1_CS0.UART0_CTSn */
J721E_IOPAD(0x1c0, PIN_OUTPUT, 1) /* (AA2) SPI0_CS0.UART0_RTSn */
@@ -226,7 +226,7 @@
};
&wkup_uart0 {
- u-boot,dm-spl;
+ bootph-pre-ram;
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
status = "okay";
@@ -277,17 +277,17 @@
};
&wkup_i2c0 {
- u-boot,dm-spl;
+ bootph-pre-ram;
tps659413a: tps659413a@48 {
reg = <0x48>;
compatible = "ti,tps659413";
- u-boot,dm-spl;
+ bootph-pre-ram;
pinctrl-names = "default";
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <400000>;
regulators: regulators {
- u-boot,dm-spl;
+ bootph-pre-ram;
buck12_reg: buck12 {
/*VDD_CPU*/
regulator-name = "buck12";
@@ -295,7 +295,7 @@
regulator-max-microvolt = <900000>;
regulator-always-on;
regulator-boot-on;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
};
};
@@ -303,7 +303,7 @@
&wkup_vtm0 {
vdd-supply-2 = <&buck12_reg>;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
&usbss0 {
@@ -378,7 +378,7 @@
&ospi1 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
- u-boot,dm-spl;
+ bootph-pre-ram;
reg = <0x0 0x47050000 0x0 0x100>,
<0x0 0x58000000 0x0 0x8000000>;
@@ -396,7 +396,7 @@
cdns,read-delay = <2>;
#address-cells = <1>;
#size-cells = <1>;
- u-boot,dm-spl;
+ bootph-pre-ram;
};
};