diff options
Diffstat (limited to 'arch/arm/dts/r8a77970-v3msk-u-boot.dts')
| -rw-r--r-- | arch/arm/dts/r8a77970-v3msk-u-boot.dts | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/arm/dts/r8a77970-v3msk-u-boot.dts b/arch/arm/dts/r8a77970-v3msk-u-boot.dts new file mode 100644 index 0000000000..6ee06d7c00 --- /dev/null +++ b/arch/arm/dts/r8a77970-v3msk-u-boot.dts @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source extras for U-Boot for the V3MSK board + * + * Copyright (C) 2019 Cogent Embedded, Inc. + */ + +#include "r8a77970-v3msk.dts" +#include "r8a77970-u-boot.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + aliases { + spi0 = &rpc; + }; + + cpld { + compatible = "renesas,v3msk-cpld"; + status = "okay"; + gpio-mdc = <&gpio1 21 0>; + gpio-mosi = <&gpio1 22 0>; + gpio-miso = <&gpio1 23 0>; + gpio-enablez = <&gpio1 19 0>; + /* Disable V3MSK Videobox Mini CANFD PHY */ + gpios = <&gpio0 12 0>, <&gpio0 14 0>; + }; +}; + +&avb { + pinctrl-0 = <&avb0_pins>; + pinctrl-names = "default"; + +}; + +&phy0 { + reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; +}; + +&pfc { + avb0_pins: avb { + mux { + groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk"; + function = "avb0"; + }; + }; +}; + +&rpc { + num-cs = <1>; + status = "okay"; + spi-max-frequency = <50000000>; + #address-cells = <1>; + #size-cells = <0>; + + flash0: spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "s25fs512s", "spi-flash", "jedec,spi-nor"; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + reg = <0>; + status = "okay"; + }; +}; |