summaryrefslogtreecommitdiff
path: root/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/dts/rk3188-radxarock-u-boot.dtsi')
-rw-r--r--arch/arm/dts/rk3188-radxarock-u-boot.dtsi38
1 files changed, 30 insertions, 8 deletions
diff --git a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
index 204bb3a90e..9c9016de1b 100644
--- a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
+++ b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
@@ -5,36 +5,58 @@
#include "rk3188-u-boot.dtsi"
+/ {
+ chosen {
+/* stdout-path = &uart2; */
+ stdout-path = "serial2:115200n8";
+ };
+
+ config {
+ u-boot,boot-led = "rock:red:power";
+ u-boot,dm-pre-reloc;
+ };
+};
+
&cru {
u-boot,dm-spl;
};
-&pinctrl {
- u-boot,dm-spl;
+&dmc {
+ rockchip,pctl-timing = <0x12c 0xc8 0x1f4 0x1e 0x4e 0x4 0x69 0x6
+ 0x3 0x0 0x6 0x5 0xc 0x10 0x6 0x4
+ 0x4 0x5 0x4 0x200 0x3 0xa 0x40 0x0
+ 0x1 0x5 0x5 0x3 0xc 0x1e 0x100 0x0
+ 0x4 0x0>;
+ rockchip,phy-timing = <0x208c6690 0x690878 0x10022a00
+ 0x220 0x40 0x0 0x0>;
+ rockchip,sdram-params = <0x24716310 0 2 300000000 3 9 0>;
};
-&mmc0 {
+&emmc {
fifo-mode;
max-frequency = <16000000>;
};
-&mmc1 {
+&mmc0 {
fifo-mode;
max-frequency = <16000000>;
};
-&emmc {
+&mmc1 {
fifo-mode;
max-frequency = <16000000>;
};
-&uart2 {
- status = "okay";
+&pinctrl {
u-boot,dm-spl;
};
&timer3 {
compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";
- u-boot,dm-spl;
clock-frequency = <24000000>;
+ u-boot,dm-spl;
+};
+
+&uart2 {
+ u-boot,dm-spl;
};