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Diffstat (limited to 'arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi')
-rw-r--r--arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi48
1 files changed, 24 insertions, 24 deletions
diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
index 408abaf52f..b8288273dd 100644
--- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
@@ -58,18 +58,18 @@
};
&i2c4 {
- u-boot,dm-pre-reloc;
+ bootph-all;
};
&i2c4_pins_a {
- u-boot,dm-pre-reloc;
+ bootph-all;
pins {
- u-boot,dm-pre-reloc;
+ bootph-all;
};
};
&pmic {
- u-boot,dm-pre-reloc;
+ bootph-all;
};
&rcc {
@@ -143,7 +143,7 @@
reg = <1>;
cfg = < 2 65 1 0 0 PQR(1,1,1) >;
frac = < 0x1400 >;
- u-boot,dm-pre-reloc;
+ bootph-all;
};
/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
@@ -152,7 +152,7 @@
reg = <2>;
cfg = < 1 33 1 16 36 PQR(1,1,1) >;
frac = < 0x1a04 >;
- u-boot,dm-pre-reloc;
+ bootph-all;
};
/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
@@ -160,66 +160,66 @@
compatible = "st,stm32mp1-pll";
reg = <3>;
cfg = < 3 98 5 7 7 PQR(1,1,1) >;
- u-boot,dm-pre-reloc;
+ bootph-all;
};
};
&sdmmc1 {
- u-boot,dm-spl;
+ bootph-pre-ram;
};
&sdmmc1_b4_pins_a {
- u-boot,dm-spl;
+ bootph-pre-ram;
pins1 {
- u-boot,dm-spl;
+ bootph-pre-ram;
};
pins2 {
- u-boot,dm-spl;
+ bootph-pre-ram;
};
};
&sdmmc1_dir_pins_a {
- u-boot,dm-spl;
+ bootph-pre-ram;
pins1 {
- u-boot,dm-spl;
+ bootph-pre-ram;
};
pins2 {
- u-boot,dm-spl;
+ bootph-pre-ram;
};
};
&sdmmc2 {
- u-boot,dm-spl;
+ bootph-pre-ram;
};
&sdmmc2_b4_pins_a {
- u-boot,dm-spl;
+ bootph-pre-ram;
pins1 {
- u-boot,dm-spl;
+ bootph-pre-ram;
};
pins2 {
- u-boot,dm-spl;
+ bootph-pre-ram;
};
};
&sdmmc2_d47_pins_a {
- u-boot,dm-spl;
+ bootph-pre-ram;
pins {
- u-boot,dm-spl;
+ bootph-pre-ram;
};
};
&uart4 {
- u-boot,dm-pre-reloc;
+ bootph-all;
};
&uart4_pins_a {
- u-boot,dm-pre-reloc;
+ bootph-all;
pins1 {
- u-boot,dm-pre-reloc;
+ bootph-all;
};
pins2 {
- u-boot,dm-pre-reloc;
+ bootph-all;
/* pull-up on rx to avoid floating level */
bias-pull-up;
};