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Diffstat (limited to 'arch/arm/dts/zynq-cse-qspi.dtsi')
-rw-r--r--arch/arm/dts/zynq-cse-qspi.dtsi10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/dts/zynq-cse-qspi.dtsi b/arch/arm/dts/zynq-cse-qspi.dtsi
index f7ac92b802..2e4afafebf 100644
--- a/arch/arm/dts/zynq-cse-qspi.dtsi
+++ b/arch/arm/dts/zynq-cse-qspi.dtsi
@@ -29,11 +29,11 @@
dcc: dcc {
compatible = "arm,dcc";
status = "disabled";
- u-boot,dm-pre-reloc;
+ bootph-all;
};
amba: amba {
- u-boot,dm-pre-reloc;
+ bootph-all;
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@@ -91,7 +91,7 @@
};
slcr: slcr@f8000000 {
- u-boot,dm-pre-reloc;
+ bootph-all;
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
@@ -101,7 +101,7 @@
#clock-cells = <1>;
compatible = "xlnx,ps7-clkc";
fclk-enable = <0xf>;
- u-boot,dm-pre-reloc;
+ bootph-all;
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
"cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",
"dci", "lqspi", "smc", "pcap", "gem0", "gem1",
@@ -118,7 +118,7 @@
};
scutimer: timer@f8f00600 {
- u-boot,dm-pre-reloc;
+ bootph-all;
compatible = "arm,cortex-a9-twd-timer";
reg = <0xf8f00600 0x20>;
clock-frequency = <333333333>;