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Diffstat (limited to 'arch/arm/dts/zynqmp-clk-ccf.dtsi')
-rw-r--r--arch/arm/dts/zynqmp-clk-ccf.dtsi12
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi
index 8eacd22d7c..b02ef22abd 100644
--- a/arch/arm/dts/zynqmp-clk-ccf.dtsi
+++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi
@@ -2,7 +2,7 @@
/*
* Clock specification for Xilinx ZynqMP
*
- * (C) Copyright 2017 - 2019, Xilinx, Inc.
+ * (C) Copyright 2017 - 2020, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
@@ -284,10 +284,18 @@
clocks = <&zynqmp_clk AMS_REF>;
};
+&zynqmp_dpsub {
+ clocks = <&dp_aclk>, <&zynqmp_clk DP_AUDIO_REF>, <&zynqmp_clk DP_VIDEO_REF>;
+};
+
&xlnx_dpdma {
clocks = <&zynqmp_clk DPDMA_REF>;
};
-&xlnx_dp_snd_codec0 {
+&zynqmp_dp_snd_codec0 {
clocks = <&zynqmp_clk DP_AUDIO_REF>;
};
+
+&zynqmp_pcap {
+ clocks = <&zynqmp_clk PCAP>;
+};